JPH0376406A - Bias voltage setting circuit - Google Patents

Abstract

PURPOSE:To accurately set a bias voltage with a minimum amount of externally mounted components by using four differential amplifiers so as to form two feedback loops and making a voltage generated across an external variable resistor equal to a bias voltage with respect to a reference voltage of an output voltage terminal. CONSTITUTION:A constant current source IADJ1 connects to ground via a connection terminal T1 and an external variable resistor RADJ1, the terminal T1 connects to a noninverting input of a differential amplifier A2 and an inverting input of a differential amplifier A4 and an output of a differential amplifier A1 and an output of a differential amplifier A3 are connected to an inverting input of the differential amplifier A2 and a noninverting input of the differential amplifier A4. Moreover, the noninverting input of the differential amplifier A1 connects to ground via a resistor R1 and also to the output of the differential amplifier A2 via a resistor R2, the inverting input of the differential amplifier A3 connects to the output of the differential amplifier A3 via a resistor R8 and connects to the output of the differential amplifier A4 via a resistor R7. Moreover, the inverting input of the differential amplifier A1 connects to a reference voltage source VREF, via a resistor R3 and to the output of the differential amplifier A1 via a resistor R4 and the noninverting input of the differential amplifier A3 connects to the voltage VREF via a resistor R5 and to ground via a resistor R6. Thus, a bias voltage of VTH set by the resistor RADJ1 with respect to the reference voltage source VREF is caused to output voltages VOUT1 and VOUT2.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a bias setting circuit, and more particularly to a bias voltage setting circuit that is used in a semiconductor integrated circuit and can be adjusted from the outside.

[Conventional technology]

As a conventional bias voltage setting circuit of this type, there is a circuit as shown in FIG. Ql to Q6 are transistors, and R10 and R11 are resistors.

RADJI is a variable resistor, Vya is a reference voltage source, A5 is a differential amplifier circuit, Vcc is a power supply, ■. , J7. and V. T
JT□ is the output voltage, TI is the variable resistance RADjI (hereinafter referred to as
(variable resistor is omitted) is a connection terminal, and all terminals other than RADJI are formed inside the semiconductor integrated circuit.

Next, the operation of this circuit will be explained. Reference voltage source ■R□, (
The differential amplifier circuit A5 (hereinafter abbreviated as VR11F) is the differential amplifier circuit A5 (hereinafter referred to as A5
The transistor Q6 (hereinafter referred to as Q6, etc. and the transistor is omitted) is connected to the non-inverting input of a
Since full feedback is applied from the emitter of A5 to the inverting input of A5, a potential approximately equal to VRIP is generated at terminal T2.

Therefore, the emitter current of Q6 is V RlF / R
ADJ, and therefore, since the common base current amplification factor of Q6 is approximately 1, Q4. The input current of the current mirror circuit consisting of Q5 is also approximately V R1! F/RADZ
determined by Therefore, the current flowing through resistors RIO and R11 also becomes approximately VRIF/RADJ, and furthermore, there is VRg at the connection point between resistor R10 (hereinafter referred to as "resistance") and R11.
Since A is connected, if the resistance values of RIO and R11 are equal and Ro is the output voltage. U.T.

and V. T,? The reference voltage V can be adjusted externally like 2.
Two voltages that are symmetrical about RIIP are often used as threshold voltages for window comparators of integrated circuits that operate with VRlIP as a reference.

Next, FIG. 3 shows another conventional example of this type of bias voltage setting circuit. IADJI and IADJI are current sources, RAD, and RADJ2 are variable resistors, ■.

UTI and ■. tlT2 is the output voltage, Vnzy is the reference voltage, Vcc is the power supply, T3 to T5 are RADJ l and 'RAD, 2 connection terminals, RADJl and RADJ.
The others other than 2 are formed inside the semiconductor integrated circuit.

Next, the operation of this circuit will be explained. The current values of current sources IADJ+ and IADJ2 are equal Io, the resistance values of resistors RADJI and RADJI are equal Ro, and the reference voltage terminal T
If the reference voltage VR, , is given to 4, the output voltage is ■. υ ding.

and■. tlT□ is V□y+ Ro I o
, VitzA R,I. The bias voltage is set.

These two voltages that are symmetrical with respect to V□2 are often used as threshold voltages for window pumps, etc., as in the prior art example 1.

[Problem to be solved by the invention]

In the conventional bias voltage setting circuit described above, in the circuit shown in FIG. 2, RIO and R11 are internal resistances formed inside the semiconductor integrated circuit, and variable resistance RADJI is an external resistance. Therefore, since variations in internal resistance occur in semiconductor integrated circuits, as mentioned above, the output voltage is affected by the resistance value R0 of ■R8F (1, +-) and RAD1 R11, so the values of VRlIP and RADJ are known. Even if there is, there is a drawback that an accurate voltage value cannot be obtained due to variations in the value of the internal resistance R0.

Also Q4. In the current mirror circuit composed of Q5, the output current is equal to the input current equal to the base current of Q4 and Q5, that is, 21. Lose a lot. Therefore, there is a difference of 2Ib between the currents flowing through RIO and R11, so R
Even if the resistance values of IO and R11 are equal, the output voltage V.

IJTI and V. . a.

has the disadvantage that it is impossible to obtain a symmetrical bias voltage when V, 2 is used as a reference, and furthermore, the lower the common emitter current amplification factors of Q4 and Q5, the larger 2Ib becomes, so this disadvantage becomes more significant.

Also, the output voltage ■. Ml and ■. ,j? The bias current of the circuit connected to RIO and R11 changes the current value flowing through RIO and R11, and therefore the output voltage V. tlTl r■
. It has the disadvantage that υ11 fluctuates. Further VREF
However, in order to set this value small, a variable resistor R
This has the disadvantage that adjustment in this case is difficult because ADJI must be set to an extremely large value.

Next, in the circuit of FIG. 3, RADJI and RAD.

Three connection terminals T3 to T5 are required, and an increase in the number of terminals is disadvantageous in terms of cost and the like when constructing a semiconductor integrated circuit. Furthermore, two variable resistors, RADJI and RAnz, are required for adjusting the output voltage, which has the disadvantage of increasing the number of external components, resulting in a cost disadvantage. Also, as in the case of the circuit in Figure 2, the output voltage ■. IJTI and V. RAI) J1% R due to the bias current of the circuit connected to IJTI
This has the drawback that the current flowing through ADJ2 fluctuates and therefore the bias voltage fluctuates.

An object of the present invention is to provide a bias voltage setting that allows accurate setting of bias voltage, is less affected by bias current of a circuit connected to an output terminal, and further minimizes the number of terminals and external components. The purpose is to provide circuits.

[Means to solve the problem]

The bias voltage setting circuit of the present invention includes first and second differential amplifier circuits configured to convert a differential input voltage into an absolute potential with respect to a ground potential, and an output of the first differential amplifier circuit is an inverted input. a 30th differential amplifier circuit connected to the 30th differential amplifier circuit, the non-inverting input of the first differential amplifier circuit being connected to the output;
The output of the differential amplifier circuit is connected to the non-inverting input of the second differential amplifier circuit.
a fourth differential amplifier circuit whose output is connected to the inverting input of the differential amplifier circuit; the inverting input of the first differential amplifier circuit and the non-inverting input of the second differential amplifier circuit are commonly connected; and means for applying a predetermined voltage to the non-inverting input of the third differential amplifier circuit and the inverting input of the fourth differential amplifier circuit.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a circuit diagram for explaining one embodiment of the present invention. Al to A4 are differential amplifier circuits, R1 to R8 are resistors, (2). , is the reference voltage source, IADJI is the constant current source + RA
DJI is the variable resistor, TI is the RADJI connection terminal, VO
t+Y+ and V. , J72 is the output voltage, RAD
Everything other than JI is configured inside the semiconductor integrated circuit.

■ Ground Aoz1 via T I and RAoxl,
TI is connected to the non-inverting input of A2 and the inverting input of A4, and the output of AI and the output of A3 are connected to the inverting input of A2 and the non-inverting input of A4, respectively. Also, the non-inverting input of A1 is grounded via R1, and at the same time, the non-inverting input of A1 is connected to ground via R2.
The inverting input of A3 is connected to the output of A3 through R8.
At the same time, it is connected to the output of A4 via R7. Furthermore, the inverting input of AI is connected to the V input via R3, and is also connected to the output of R1 via R4.
The non-inverting input of No. 3 is connected to VREF via R5 and to ground via R6. This creates two negative feedback loops consisting of AlA2 and A3A4.

Next, the operation of this circuit diagram will be explained. T1 has engineering, voltage □ = IADJl・RADJI due to 1 and RADII
occurs. Therefore, the potential of the non-inverting input of A2 (hereinafter abbreviated as positive input) and the inverting input of A4 (hereinafter abbreviated as negative input) becomes Vl, and if the open circuit voltage gains of A2 and A4 are sufficiently large, the negative input of A2 and the positive input of A4 Due to the potential negative feedback operation, ■1 is given from the outputs of AI and A3. At this time, the potential ■1- of the negative input of A1 is V□.

■R8□Determined by R3 and R4 and given by the following formula.

Therefore, the output voltage of A2, ie ■. tlTl is■
It is determined by I+, R1, R2, and from formula (1)...
... (3) Then, the output voltage of A4, that is, V. . T2 is ■, -
1V□, R7, and R8, and from equation (2), R1 Vouyz= (Vs--Vya) +VTIIR.

Also, the potential of the positive input of A3 is V3+l! V*gy, R
5.

and R6, and is given by the following equation.

R.

Here, if the open circuit voltage gains of AI and A3 are sufficiently large like A2 and A4, the positive input potential v1+ of A1 and the negative input potentials 2, - of A3 become equal to vl- and 2, +, respectively, due to the negative feedback operation.

...(4) It becomes. At this time, if the resistance values of R1 to R8 are all made equal, equations (3) and (4) become as follows.

V ot+t+ = V RIF + V TH・”
-(5) Vot+tz=Vnzy VTH°old°(6
) As can be seen from equations (5) and (6), the output voltage V
. tlTl and V. Reference voltage VRIIP is applied to UT'l.
A bias voltage that is symmetrical by the voltage V□ set by Rゎ, l is generated.

〔Effect of the invention〕

As explained above, in the present invention, the voltage generated in the external variable resistor RAD, , of the semiconductor integrated circuit becomes equal to the bias voltage with respect to the reference voltage at the output voltage terminal.
By adjusting the voltage across I, the bias voltage can be set accurately. Furthermore, since the output impedance of the voltage output terminal is lowered due to the negative feedback effect, it has the effect of being less affected by the bias current of the circuit connected to the output terminal.

Also, the variable resistors RA, , and RADJI connection terminals are 1
Since the output voltage can be adjusted with only one switch, the number of terminals and external parts of the semiconductor integrated circuit can be minimized, resulting in the effect of realizing low costs. Furthermore, in the present invention, the absolute value of the bias voltage with respect to the reference voltage is expressed as RADJ, ·I, 4DJl, so RADJ
Since the output voltage can be adjusted by linearly changing the value of I, the bias voltage can be more easily set within a wide range.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram for explaining a bias voltage setting circuit of the present invention, and FIGS. 2 and 3 are circuit diagrams for explaining a conventional bias voltage setting circuit. AI to A5...Differential amplifier circuit, Ql to Q6
...Transistor, R1 to R11...
Resistance% RADJl+RADJ2...Variable resistance, V,...Reference voltage source, I ADJ + *
AD, 1...Current source, Vcc...Power supply, T1 to T5...Terminals of semiconductor integrated circuit, v
out+ l VOI; 72... Voltage output terminal.

Claims (1)

[Claims] first and second differential amplifier circuits configured to convert a differential input voltage into an absolute potential with respect to a ground potential; and an output of the first differential amplifier circuit is connected to an inverting input; a third differential amplifier circuit in which the non-inverting input of the dynamic amplifier circuit is connected to the output; and an inverting input of the second differential amplifier circuit in which the output of the second differential amplifier circuit is connected to the non-inverting input. a fourth differential amplifier circuit connected to its output; a reference voltage source to which an inverting input of the first differential amplifier circuit and a non-inverting input of the second differential amplifier circuit are commonly connected; A bias voltage setting circuit comprising means for applying a predetermined voltage to a non-inverting input of the third differential amplifier circuit and an inverting input of the fourth differential amplifier circuit.