JPH0377544U - - Google Patents
Info
- Publication number
- JPH0377544U JPH0377544U JP13873789U JP13873789U JPH0377544U JP H0377544 U JPH0377544 U JP H0377544U JP 13873789 U JP13873789 U JP 13873789U JP 13873789 U JP13873789 U JP 13873789U JP H0377544 U JPH0377544 U JP H0377544U
- Authority
- JP
- Japan
- Prior art keywords
- address
- output
- section
- bus
- setting section
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Small-Scale Networks (AREA)
Description
第１図は本考案の一実施例を示す構成ブロツク
図、第２図は本考案が適用される装置の他の全体
構成の概念図、第３図は一般的なバス・スレーブ
装置の構成概念図である。
ＭＳ……マスタ装置、ＳＢ１１，ＳＢ１２……
スレーブ装置、１１，２１……アドレス設定部、
１３，２３……第１のアドレス比較部、１４，２
４……第２のアドレス比較部、１５，２５……ア
ドレスデコーダ部、１６，２６……内部比較部。
Figure 1 is a configuration block diagram showing one embodiment of the present invention, Figure 2 is a conceptual diagram of another overall configuration of a device to which the present invention is applied, and Figure 3 is a configuration concept of a general bus slave device. It is a diagram. MS...Master device, SB11, SB12...
Slave device, 11, 21...address setting section,
13, 23...first address comparison section, 14, 2
4...Second address comparison section, 15, 25...Address decoder section, 16, 26...Internal comparison section.
Claims (1)
置を含んで構成されるバス・スレーブ装置であつ
て、 メカニカルな機構で設定を実現するアドレス設
定部と、 前記データ伝送バスを介してマスタ装置からの
アクセスにより任意のデータが書き込み可能とな
つており、スレーブ装置の電源投入後の初期化状
態では、その内容がイニシヤライズ信号により「
０」になるように構成されたアドレスレジスタと
、 アドレス設定部に設定されたアドレス出力とア
ドレスレジスタの内容とを比較する第１のアドレ
ス比較部と、 自分の装置のアドレス設定部からのアドレス出
力と、相手装置のアドレス設定部からのアドレス
出力とを比較する第２のアドレス比較部と、 第１、第２の各アドレス比較部からの比較結果
に基づいて応答するアドレスデコーダ部と、 アドレスデコーダからの応答信号を受けマスタ
装置に応答する内部処理部とを備え、 前記アドレスデコーダは、第１のアドレス比較
部の出力がアドレス設定一致を示した場合、ある
いはアドレスレジスタの内容が「０」であつて、
第２のアドレス比較部の出力がアドレス設定一致
を示す場合、あるいはアドレスレジスタの内容が
「０」であつて、相手装置のアドレス設定出力が
「０」の場合のいずれかであるとき、データ伝送
バス上でマスタ装置が送出したアドレス情報とア
ドレス設定部のアドレス出力が一致したとき、マ
スタ装置に応答し、それ以外の場合は応答しない
ように構成されていることを特徴とするバス・ス
レーブ装置。[Claims for Utility Model Registration] A bus slave device comprising a plurality of slave devices connected to a data transmission bus, comprising: an address setting section that realizes settings using a mechanical mechanism; and the data transmission bus. Arbitrary data can be written by access from the master device via the slave device, and in the initialization state after the slave device is powered on, its contents are written by the initialization signal.
0''; a first address comparison section that compares the address output set in the address setting section with the contents of the address register; and an address output from the address setting section of the own device. and an address output from the address setting section of the other device; an address decoder section that responds based on the comparison results from the first and second address comparison sections; and an internal processing unit that receives a response signal from the first address comparator and responds to the master device, and the address decoder is configured to operate when the output of the first address comparison unit indicates an address setting match, or when the content of the address register is “0”. It's hot,
When the output of the second address comparison section indicates that the address settings match, or when the content of the address register is "0" and the address setting output of the destination device is "0", data is transmitted. A bus slave device characterized in that it is configured to respond to the master device when the address information sent by the master device on the bus and the address output of the address setting section match, and not to respond otherwise. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13873789U JPH0724835Y2 (en) | 1989-11-30 | 1989-11-30 | Bus / slave device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13873789U JPH0724835Y2 (en) | 1989-11-30 | 1989-11-30 | Bus / slave device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0377544U true JPH0377544U (en) | 1991-08-05 |
| JPH0724835Y2 JPH0724835Y2 (en) | 1995-06-05 |
Family
ID=31685818
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13873789U Expired - Fee Related JPH0724835Y2 (en) | 1989-11-30 | 1989-11-30 | Bus / slave device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0724835Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7549686B2 (en) | 2006-08-11 | 2009-06-23 | Fumimaru Watanabe | Finger fitting product |
-
1989
- 1989-11-30 JP JP13873789U patent/JPH0724835Y2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7549686B2 (en) | 2006-08-11 | 2009-06-23 | Fumimaru Watanabe | Finger fitting product |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0724835Y2 (en) | 1995-06-05 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |