JPH0382933U - - Google Patents
Info
- Publication number
- JPH0382933U JPH0382933U JP14398489U JP14398489U JPH0382933U JP H0382933 U JPH0382933 U JP H0382933U JP 14398489 U JP14398489 U JP 14398489U JP 14398489 U JP14398489 U JP 14398489U JP H0382933 U JPH0382933 U JP H0382933U
- Authority
- JP
- Japan
- Prior art keywords
- current
- voltage
- converting means
- output
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Logic Circuits (AREA)
Description
第１図は本考案の多値レベル信号発生器の一実
施例の回路図、第２図はサンプル／ホールド回路
２，３，４の動作を説明するためのタイミングチ
ヤート、第３図は３レベルタイミング信号発生動
作を説明するためのタイミングチヤート、第４図
は３レベルタイミング信号の一例を示す波形図、
第５図は従来例の構成を示すブロツク図である。
１……Ｄ／Ａ変換器（Ｄ／Ａ）、２，３，４…
…サンプル／ホールド回路、５，６……電圧／電
流変換回路（Ｖ／Ｉ）、７，８……電流スイツチ
、９……電流／電圧変換用抵抗、１０……定電圧
源、ＳＷ１〜ＳＷ３……サンプリングスイツチ、
Ｃ１〜Ｃ３……ホールデイングコンデンサ、１１
ａ〜１１ｃ……バツフアアンプ（サンプル／ホー
ルドアンプ）、Ｓ１……入力データ、Ｓ２……書
込みパルス、Ｓ３……アナログ変換出力、Ｓ４，
Ｓ５，Ｓ６……サンプリング制御信号、Ｓ７〜Ｓ
９……ホールドレベル出力、Ｓ１０，Ｓ１１……
電流変換出力、Ｓ１２，Ｓ１３……電流スイツチ
制御信号、Ｓ１４，Ｓ１５……電流スイツチの電
流出力、Ｓ１６……３レベルタイミング信号、Ｓ
１７……定電圧出力。
Fig. 1 is a circuit diagram of an embodiment of the multilevel signal generator of the present invention, Fig. 2 is a timing chart for explaining the operation of sample/hold circuits 2, 3, and 4, and Fig. 3 is a three-level signal generator. A timing chart for explaining the timing signal generation operation, FIG. 4 is a waveform diagram showing an example of a 3-level timing signal,
FIG. 5 is a block diagram showing the configuration of a conventional example. 1...D/A converter (D/A), 2, 3, 4...
...Sample/hold circuit, 5, 6...Voltage/current conversion circuit (V/I), 7, 8...Current switch, 9...Resistance for current/voltage conversion, 10...Constant voltage source, SW1 to SW3 ...sampling switch,
C1 to C3...Holding capacitor, 11
a to 11c...Buffer amplifier (sample/hold amplifier), S1...Input data, S2...Write pulse, S3...Analog conversion output, S4,
S5, S6...Sampling control signal, S7-S
9...Hold level output, S10, S11...
Current conversion output, S12, S13...Current switch control signal, S14, S15...Current switch current output, S16...3 level timing signal, S
17... Constant voltage output.
Claims (1)
レベル信号を出力するＤ／Ａ変換器１と、 該Ｄ／Ａ変換器１の各出力信号のレベルを保持
するための複数のサンプル／ホールド回路２，３
，４と、 サンプル／ホールド回路２，３，４のホールド
レベルを電流に変換する複数の電圧／電流変換手
段５，６と、 該複数の電圧／電流変換手段５，６の出力電流
を共通に処理する電流／電圧変換手段９と、 該電流／電圧変換手段９と前記電圧／電流変換
手段５，６との間に設けられ、前記電圧／電流変
換手段５，６の出力電流の電流／電圧変換手段９
への供給を制御する電流スイツチ７，８とを有す
ることを特徴とする多値レベル信号発生器。[Claims for Utility Model Registration] A D/A converter 1 that converts digital data into an analog signal and outputs a multilevel signal, and a device for maintaining the level of each output signal of the D/A converter 1. Multiple sample/hold circuits 2, 3
, 4, a plurality of voltage/current conversion means 5, 6 that convert the hold levels of the sample/hold circuits 2, 3, 4 into currents, and a common output current of the plurality of voltage/current conversion means 5, 6. A current/voltage converting means 9 to be processed; and a current/voltage of the output current of the voltage/current converting means 5, 6 provided between the current/voltage converting means 9 and the voltage/current converting means 5, 6. Conversion means 9
1. A multi-level signal generator, characterized in that it has current switches 7 and 8 for controlling supply to.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14398489U JPH0382933U (en) | 1989-12-13 | 1989-12-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14398489U JPH0382933U (en) | 1989-12-13 | 1989-12-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0382933U true JPH0382933U (en) | 1991-08-23 |
Family
ID=31690730
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14398489U Pending JPH0382933U (en) | 1989-12-13 | 1989-12-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0382933U (en) |
-
1989
- 1989-12-13 JP JP14398489U patent/JPH0382933U/ja active Pending
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