JPH038445U - - Google Patents
Info
- Publication number
- JPH038445U JPH038445U JP1989067679U JP6767989U JPH038445U JP H038445 U JPH038445 U JP H038445U JP 1989067679 U JP1989067679 U JP 1989067679U JP 6767989 U JP6767989 U JP 6767989U JP H038445 U JPH038445 U JP H038445U
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- substrate
- integrated circuit
- semiconductor element
- circuit device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Die Bonding (AREA)
Description
第１図は本考案の一実施例の混成集積回路装置
の側面図、第２図は他の実施例の側面図、第３図
は従来の装置の側面図である。 １３……絶縁金属基板、１４……アルミ基板、
１６……導体、１７……リードフレーム、１８…
…肉厚部、１９，２２……半田、２０……金属ワ
イヤ、２１……半導体素子、２３……セラミツク
基板。
の側面図、第２図は他の実施例の側面図、第３図
は従来の装置の側面図である。 １３……絶縁金属基板、１４……アルミ基板、
１６……導体、１７……リードフレーム、１８…
…肉厚部、１９，２２……半田、２０……金属ワ
イヤ、２１……半導体素子、２３……セラミツク
基板。
Claims (1)
- 【実用新案登録請求の範囲】 基板上に半導体素子とリードフレームを設けた
混成集積回路装置において、 基板に接続されるリードフレームの基端に蓄熱
量が大きくなるよう肉厚部を形成し、該肉厚部に
半導体素子を半田を介し実装したことを特徴とす
る混成集積回路装置におけるリードフレーム。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989067679U JPH038445U (ja) | 1989-06-09 | 1989-06-09 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989067679U JPH038445U (ja) | 1989-06-09 | 1989-06-09 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH038445U true JPH038445U (ja) | 1991-01-28 |
Family
ID=31601464
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989067679U Pending JPH038445U (ja) | 1989-06-09 | 1989-06-09 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH038445U (ja) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62115854A (ja) * | 1985-11-15 | 1987-05-27 | Sharp Corp | マルチチツプデバイス |
-
1989
- 1989-06-09 JP JP1989067679U patent/JPH038445U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62115854A (ja) * | 1985-11-15 | 1987-05-27 | Sharp Corp | マルチチツプデバイス |