JPH0385676U - - Google Patents
Info
- Publication number
- JPH0385676U JPH0385676U JP14726089U JP14726089U JPH0385676U JP H0385676 U JPH0385676 U JP H0385676U JP 14726089 U JP14726089 U JP 14726089U JP 14726089 U JP14726089 U JP 14726089U JP H0385676 U JPH0385676 U JP H0385676U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- group
- connection pads
- circuit board
- printed circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims description 3
- 239000000758 substrate Substances 0.000 claims description 2
- 238000007689 inspection Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Structure Of Printed Boards (AREA)
Description
第１図は本考案の一実施例によるプリント回路
基板を示す斜視図、第２図は本実施例の作用を示
す側断面図、第３図は従来のプリント回路基板を
示す斜視図、第４図は従来の検査方法を示す側断
面図である。
図において、２……半導体装置、２−１……パ
ツケージ、２−２……入出力端子、２−３……チ
エツク用端子、１１……絶縁基板、１１−１……
接続パツド群、１１−２……反射パターン、を示
す。
FIG. 1 is a perspective view showing a printed circuit board according to an embodiment of the present invention, FIG. 2 is a side sectional view showing the operation of this embodiment, FIG. 3 is a perspective view showing a conventional printed circuit board, and FIG. The figure is a side sectional view showing a conventional inspection method. In the figure, 2...Semiconductor device, 2-1...Package, 2-2...I/O terminal, 2-3...Check terminal, 11...Insulating substrate, 11-1...
Connection pad group 11-2...reflection pattern is shown.
Claims (1)
端子２−２と接合する接続パツド群１１−１と、
当該接続パツド群１１−１を囲むように上記半導
体装置２の接合チエツクを光学的に行う鏡面状の
反射パターン１１−２とを形成したことを特徴と
するプリント回路基板。 A group of connection pads 11-1 connected to the input/output terminals 2-2 of the semiconductor device 2 on the main surface of the insulating substrate 11;
A printed circuit board characterized in that a mirror-like reflective pattern 11-2 for optically performing a bonding check of the semiconductor device 2 is formed so as to surround the group of connection pads 11-1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14726089U JPH0631736Y2 (en) | 1989-12-20 | 1989-12-20 | Printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14726089U JPH0631736Y2 (en) | 1989-12-20 | 1989-12-20 | Printed circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0385676U true JPH0385676U (en) | 1991-08-29 |
| JPH0631736Y2 JPH0631736Y2 (en) | 1994-08-22 |
Family
ID=31693785
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14726089U Expired - Lifetime JPH0631736Y2 (en) | 1989-12-20 | 1989-12-20 | Printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0631736Y2 (en) |
-
1989
- 1989-12-20 JP JP14726089U patent/JPH0631736Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0631736Y2 (en) | 1994-08-22 |
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