JPH0397295U - - Google Patents
Info
- Publication number
- JPH0397295U JPH0397295U JP564590U JP564590U JPH0397295U JP H0397295 U JPH0397295 U JP H0397295U JP 564590 U JP564590 U JP 564590U JP 564590 U JP564590 U JP 564590U JP H0397295 U JPH0397295 U JP H0397295U
- Authority
- JP
- Japan
- Prior art keywords
- clock
- image data
- signal
- ntsc
- frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims description 8
- 229940028444 muse Drugs 0.000 claims description 4
- GMVPRGQOIOIIMI-DWKJAMRDSA-N prostaglandin E1 Chemical compound CCCCC[C@H](O)\C=C\[C@H]1[C@H](O)CC(=O)[C@@H]1CCCCCCC(O)=O GMVPRGQOIOIIMI-DWKJAMRDSA-N 0.000 claims description 4
- 238000000034 method Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 10
- 238000000926 separation method Methods 0.000 description 1
Landscapes
- Color Television Systems (AREA)
Description
第１図は本考案のＭＵＳＥ／ＮＴＳＣダウンコ
ンバータの一実施例の概略構成を示すブロツク図
、第２図は同実施例の時間軸変換動作を説明する
ための説明図、第３図は同実施例のライン変換お
よび画像表示動作を説明するための説明図、第４
図はＮＴＳＣ方式の水平有効走査時間を参考的に
示したタイムチヤート、第５図は従来のＭＵＳＥ
／ＮＴＳＣダウンコンバータの概略構成を示すブ
ロツク図、第６図はこのダウンコンバータの時間
軸変換動作を説明するための説明図、第７図ａ〜
ｃはこのダウンコンバータのライン変換および画
像表示動作を説明するための説明図、第８図はも
う一つの従来のＭＵＳＥ／ＮＴＳＣダウンコンバ
ータの概略構成を示すブロツク図、第９図はこの
ダウンコンバータの時間軸変換動作を説明するた
めの説明図、第１０図はこのダウンコンバータの
ライン変換および画像表示動作を説明するための
説明図である。
１……Ａ／Ｄ変換器、２……ＨＤＴＶ処理系、
３……時間軸変換メモリ、４……ＮＴＳＣ処理系
、５……同期分離回路、６，１１……位相比較回
路、７，１２Ｃ……発振器、８，９，１０Ｃ，１
３Ｃ，１４，１５，１６Ｃ，１７，１８……分周
回路。
FIG. 1 is a block diagram showing a schematic configuration of an embodiment of the MUSE/NTSC down converter of the present invention, FIG. 2 is an explanatory diagram for explaining the time axis conversion operation of the embodiment, and FIG. Explanatory diagram for explaining example line conversion and image display operations, 4th
The figure is a time chart showing the horizontal effective scanning time of the NTSC system for reference, and Figure 5 is a time chart of the conventional MUSE.
A block diagram showing the schematic configuration of the /NTSC down converter, FIG. 6 is an explanatory diagram for explaining the time axis conversion operation of this down converter, and FIG. 7 a-
c is an explanatory diagram for explaining the line conversion and image display operations of this down converter, Fig. 8 is a block diagram showing the schematic configuration of another conventional MUSE/NTSC down converter, and Fig. 9 is a diagram of this down converter. FIG. 10 is an explanatory diagram for explaining the time axis conversion operation, and FIG. 10 is an explanatory diagram for explaining the line conversion and image display operation of this down converter. 1...A/D converter, 2...HDTV processing system,
3... Time base conversion memory, 4... NTSC processing system, 5... Synchronization separation circuit, 6, 11... Phase comparison circuit, 7, 12C... Oscillator, 8, 9, 10C, 1
3C, 14, 15, 16C, 17, 18... Frequency dividing circuit.
Claims (1)
でサブサンプリングしたＭＵＳＥ方式の信号をＡ
／Ｄ変換し、得られた画像データを記憶装置に記
憶させ、周波数が３２．４×７９１／３６００［
ＭＨｚ］の第２のクロツクによつて前記画像デー
タのうちの輝度信号を読み出すと共に、前記第２
のクロツクに対して周波数が1/4である第３のク
ロツクによつて前記画像データのうちの色差信号
を読み出し、得られたライン情報の２本から１本
を間引いてＮＴＳＣ方式の信号を生成するＭＵＳ
Ｅ／ＮＴＳＣダウンコンバータ。 A MUSE method signal subsampled by the first clock with a frequency of 16.2 [MHz]
/D conversion, the obtained image data is stored in a storage device, and the frequency is 32.4×791/3600[
MHz], the luminance signal of the image data is read out by the second clock;
The color difference signal of the image data is read out by a third clock whose frequency is 1/4 of that of the clock, and one of the two lines of the obtained line information is thinned out to generate an NTSC signal. MUS to do
E/NTSC down converter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP564590U JPH0397295U (en) | 1990-01-26 | 1990-01-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP564590U JPH0397295U (en) | 1990-01-26 | 1990-01-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0397295U true JPH0397295U (en) | 1991-10-07 |
Family
ID=31509346
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP564590U Pending JPH0397295U (en) | 1990-01-26 | 1990-01-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0397295U (en) |
-
1990
- 1990-01-26 JP JP564590U patent/JPH0397295U/ja active Pending
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