JPH04101453A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH04101453A JPH04101453A JP2218816A JP21881690A JPH04101453A JP H04101453 A JPH04101453 A JP H04101453A JP 2218816 A JP2218816 A JP 2218816A JP 21881690 A JP21881690 A JP 21881690A JP H04101453 A JPH04101453 A JP H04101453A
- Authority
- JP
- Japan
- Prior art keywords
- film
- titanium
- electrode
- silicon oxide
- ammonia
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 6
- 239000004065 semiconductor Substances 0.000 title claims description 6
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 claims abstract description 34
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims abstract description 27
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 24
- 229910021341 titanium silicide Inorganic materials 0.000 claims abstract description 23
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims abstract description 22
- 239000010936 titanium Substances 0.000 claims abstract description 22
- 229910052719 titanium Inorganic materials 0.000 claims abstract description 22
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 19
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 19
- 229910021529 ammonia Inorganic materials 0.000 claims abstract description 17
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 16
- 229920005591 polysilicon Polymers 0.000 claims abstract description 16
- 238000010438 heat treatment Methods 0.000 claims abstract description 15
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 12
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 claims abstract description 10
- 239000000758 substrate Substances 0.000 claims abstract description 10
- 238000005121 nitriding Methods 0.000 claims abstract description 7
- 238000000034 method Methods 0.000 claims description 9
- 238000000151 deposition Methods 0.000 claims description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 7
- 229910052710 silicon Inorganic materials 0.000 abstract description 7
- 239000010703 silicon Substances 0.000 abstract description 7
- 239000007789 gas Substances 0.000 abstract description 4
- 229910004481 Ta2O3 Inorganic materials 0.000 abstract description 2
- 238000010276 construction Methods 0.000 abstract 1
- 238000009413 insulation Methods 0.000 abstract 1
- 239000003990 capacitor Substances 0.000 description 13
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 150000004767 nitrides Chemical class 0.000 description 3
- 229920002120 photoresistant polymer Polymers 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- PBCFLUZVCVVTBY-UHFFFAOYSA-N tantalum pentoxide Inorganic materials O=[Ta](=O)O[Ta](=O)=O PBCFLUZVCVVTBY-UHFFFAOYSA-N 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000007598 dipping method Methods 0.000 description 2
- 229910044991 metal oxide Inorganic materials 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(IV) oxide Inorganic materials O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、半導体装置の製造方法に関し、特に窒化チタ
ン膜上に容量絶縁膜かある容量部の形成方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming a capacitor portion having a capacitor insulating film on a titanium nitride film.
ポリシリコン膜の第１電極、窒化チタン膜、容量絶縁膜
及び第２の電極からなる容量部をもつ半導体装置の製造
方法の従来技術を第３図を用いて説明する。A conventional method of manufacturing a semiconductor device having a capacitor section including a first electrode of a polysilicon film, a titanium nitride film, a capacitor insulating film, and a second electrode will be described with reference to FIG.
まず、基板上にポリシリコン膜の第１の電極３を形成後
（第３図（ａ））、次に第１の電極３」二に、窒化チタ
ン膜４４をスパッタあるいはＣＶＤ法等で形成する（第
３図（１）））。そして、フォトレジストを用いてエツ
チングでパターニングを行う（第３図（Ｃ）〉。窒化チ
タン膜４４上に、容量絶縁膜５及び第２の電［６を形成
して、容量部を形成する（第３図（ｄ））。なお、窒化
チタン膜上に容量絶縁膜を形成する理由は、窒化シリコ
ン膜あるいはＴａ２ ｏ５．ＨｆＯ２等の金属酸化膜を
容量絶縁膜としてポリシリコン膜上に直接形成すると、
ポリシリコン膜と容量絶縁膜との間に酸化シリコン膜か
形成されるので、窒化チタン膜上に容量絶縁膜を設ける
ことで酸化シリコン膜の形成を防ぎ、酸化シリコン膜の
存在による容量値の低下を防止するためである。First, after forming the first electrode 3 of polysilicon film on the substrate (FIG. 3(a)), next, a titanium nitride film 44 is formed on the first electrode 3 by sputtering or CVD method. (Figure 3 (1))). Then, patterning is performed by etching using a photoresist (FIG. 3(C)). A capacitive insulating film 5 and a second electrode 6 are formed on the titanium nitride film 44 to form a capacitive part ( (Fig. 3(d)).The reason for forming a capacitive insulating film on a titanium nitride film is that if a silicon nitride film or a metal oxide film such as Ta2O5.HfO2 is formed directly on a polysilicon film as a capacitive insulating film. ,
Since a silicon oxide film is formed between the polysilicon film and the capacitive insulating film, providing a capacitive insulating film on the titanium nitride film prevents the formation of the silicon oxide film and reduces the capacitance value due to the presence of the silicon oxide film. This is to prevent
上述した従来の半導体装置の製造方法は、窒化チタン膜
をフォトレジストを用いてエラチンつて゛パターニング
を行うために、第１の電極間の間隔が０．８μｍ以下の
微細構造になると、パターニングが困難になり、１６Ｍ
ビット以上のＤＲＡＭ等に用いるのはむずかしいという
問題点がある。In the conventional semiconductor device manufacturing method described above, since the titanium nitride film is patterned using a photoresist as an eratin, patterning becomes difficult when the distance between the first electrodes becomes a fine structure of 0.8 μm or less. becomes 16M
There is a problem in that it is difficult to use it for DRAMs with more than one bit.
本発明の半導体装置の製造方法は、コンタクト孔を有す
る酸化シリコン膜を表面に有する基板上にポリシリコン
膜からなる第１の電極を形成する工程、チタン膜を被着
したのち、窒素あるいはアンモニアを含む雰囲気中で熱
処理を行って、前記第１の電極上のチタン膜を主として
チタンシリサイド化し、かつ前記酸化シリコン膜上のチ
タン膜を窒化チタン化する工程、前記酸化シリコン膜上
の窒化チタン膜をアンモニアと過酸化水素を含む溶液を
用いて除去する工程、前記第１の電極上のチタンシリサ
イド膜を窒素あるいはアンモニアを含む雰囲気中で熱処
理で窒化する工程、該チタンシリサイドの窒化処理膜上
に容量絶縁膜を形成する工程及び第２の電極を形成する
工程を含むというものである。The method for manufacturing a semiconductor device of the present invention includes a step of forming a first electrode made of a polysilicon film on a substrate having a silicon oxide film having a contact hole on its surface, and after depositing a titanium film, nitrogen or ammonia is applied. a step of performing heat treatment in an atmosphere containing the silicon oxide film to mainly convert the titanium film on the first electrode into titanium silicide and converting the titanium film on the silicon oxide film into titanium nitride; a step of removing the titanium silicide film using a solution containing ammonia and hydrogen peroxide; a step of nitriding the titanium silicide film on the first electrode by heat treatment in an atmosphere containing nitrogen or ammonia; The method includes a step of forming an insulating film and a step of forming a second electrode.
次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第１図（ａ＞〜（ｇ）は、本発明の一実施例の手順を示
す容量部の工程順断面図である。FIGS. 1A to 1G are process-order cross-sectional views of a capacitor section showing the procedure of an embodiment of the present invention.
ます、第１図（ａ）に示すように、シリコン基板コ−の
面にコンタクト孔を有する酸化シリコン膜を設けてなる
基板上にポリシリコン膜の第１の電極３を形成する。First, as shown in FIG. 1(a), a first electrode 3 of a polysilicon film is formed on a substrate comprising a silicon oxide film having contact holes on the surface of a silicon substrate.
次に、第１図（ｂ）に示すように、第１の電極３上に、
厚さ２０〜１１００ｎのチタン膜４をスパッタあるいは
ＣＶＤ法等で形成する。Next, as shown in FIG. 1(b), on the first electrode 3,
A titanium film 4 having a thickness of 20 to 1100 nm is formed by sputtering or CVD.
次に、第１図（Ｃ）に示すように、窒素、アンモニア又
は窒素とアンモニアの混合ガス雰囲気中で、５００〜７
００℃て熱処理を行なう。第１の電極３上のチタン膜は
主としてチタンシリサイド膜４２になり、酸化シリコン
膜２上のチタン膜は窒化チタン膜４１になる。Next, as shown in FIG. 1(C), in an atmosphere of nitrogen, ammonia, or a mixed gas of nitrogen and ammonia,
Heat treatment is performed at 00°C. The titanium film on the first electrode 3 mainly becomes a titanium silicide film 42, and the titanium film on the silicon oxide film 2 becomes a titanium nitride film 41.
次に、第１図（ｄ）に示すように、アンモニアと過酸化
水素を含む溶液中に侵して、窒化チタン膜４］を選択的
に除去する。このとき、チタンシリサイド膜４２に形成
されていた若干の窒化チタンも除去される。Next, as shown in FIG. 1(d), the titanium nitride film 4 is selectively removed by dipping into a solution containing ammonia and hydrogen peroxide. At this time, some titanium nitride formed on the titanium silicide film 42 is also removed.
そして、第１図（ｅ）に示すように、窒素、アンモニア
又は窒素とアンモニアの混合ガス雰囲気中で、８００〜
１０００℃の温度で熱処理を行い、チタンシリサイド膜
４２を窒化処理する。シリコンよりチタンの方がはるか
に窒化され易いので、窒化チタンを主成分とし、シリコ
ン及び若干の窒化シリコンを含むチタンシリサイドの窒
化処理膜４３か形成される。特に、窒化処理膜４３の表
面部はほとんど窒化シリコン膜と考えられる。Then, as shown in FIG. 1(e), in an atmosphere of nitrogen, ammonia, or a mixed gas of nitrogen and ammonia,
Heat treatment is performed at a temperature of 1000° C. to nitride the titanium silicide film 42. Since titanium is much more easily nitrided than silicon, a nitrided film 43 of titanium silicide containing titanium nitride as a main component and silicon and some silicon nitride is formed. In particular, most of the surface portion of the nitrided film 43 is considered to be a silicon nitride film.
この熱処理は炉によってもよいし、ランプアニラーによ
ってもよい。This heat treatment may be performed using a furnace or a lamp annealer.
次に、第１図（ｆ）に示すように、厚さ５〜５０ｎｍの
Ｔａ２Ｏ３膜をスパッタ、ＣＶＤ等の方法を用いて、形
成して容量絶縁膜５とする。最後に、第１図（ｇ）に示
すように、第２の電極６を形成して、容量部の形成を完
了する。Next, as shown in FIG. 1(f), a Ta2O3 film having a thickness of 5 to 50 nm is formed using a method such as sputtering or CVD to form the capacitor insulating film 5. Finally, as shown in FIG. 1(g), the second electrode 6 is formed to complete the formation of the capacitor section.
Ｔａ２０５とポリシリコンとが直接接触しないので、従
来例と同様に酸化シリコン膜の形成を阻止できる。又、
フォトレジストを用いずに、窒化チタン膜をポリシリコ
ン膜の第１の電極上に自己整合的に形成できるので、目
合せマージンの分だけ、容量部を高密度に集積すること
ができる。Since Ta205 and polysilicon do not come into direct contact, formation of a silicon oxide film can be prevented as in the conventional example. or,
Since the titanium nitride film can be formed in a self-aligned manner on the first electrode of the polysilicon film without using a photoresist, the capacitor parts can be integrated at high density by the alignment margin.
第２図（ａ）〜（ｆ）は、本発明の応用例の手順を示す
容量部の工程順断面図である。FIGS. 2(a) to 2(f) are step-by-step cross-sectional views of a capacitor section showing the steps of an applied example of the present invention.
本応用例では、シリコン基板に溝に形成し、溝部に容量
を形成する場合に本発明を適用したものである。シリコ
ン基板１に溝を形成し、溝内部に酸化シリコン膜２及び
ポリシリコンの第１の電極３を形成する（第２図（ａ）
）。次に第１電極３上に、チタン膜４を厚さ２０〜］、
ＯＯｎｍ、 ＣＶＤ法等で形成する（第２図（ｂ））
。次に、窒素、アンモニア、又はそれらの混合カス雰囲
気中で５００〜７００°Ｃて熱処理を行い、第１の電極
上のチタン膜を主としてチタンシリサイド膜４２上に、
酸化シリコン膜２上のチタンを窒化チタン膜４１にする
（第２図（Ｃ））。次に、アンモニアと過酸化水素を含
む溶液中に侵して、窒化チタン膜４１を選択的に除去す
る（第２図（ｄ〉）。In this application example, the present invention is applied to the case where a groove is formed in a silicon substrate and a capacitor is formed in the groove. A groove is formed in a silicon substrate 1, and a silicon oxide film 2 and a first electrode 3 made of polysilicon are formed inside the groove (Fig. 2(a)).
). Next, a titanium film 4 is placed on the first electrode 3 to a thickness of 20~],
Formed by OOnm, CVD method, etc. (Figure 2(b))
. Next, heat treatment is performed at 500 to 700°C in an atmosphere of nitrogen, ammonia, or a mixture thereof, so that the titanium film on the first electrode is mainly transferred to the titanium silicide film 42.
The titanium on the silicon oxide film 2 is changed into a titanium nitride film 41 (FIG. 2(C)). Next, the titanium nitride film 41 is selectively removed by dipping into a solution containing ammonia and hydrogen peroxide (FIG. 2(d)).
そして、窒素、アンモニア又はそれらの混合カス雰囲気
中で、８００〜１１００°Ｃの温度で熱処理を行い、チ
タンシリサイド膜４２を窒化して、窒化処理膜４３を形
成する（第２図（ｅ））。この場合の熱処理は、拡散炉
あるいはランプアニーラ−等のいずれで行ってもよい。Then, heat treatment is performed at a temperature of 800 to 1100° C. in an atmosphere of nitrogen, ammonia, or a mixture thereof to nitride the titanium silicide film 42 to form a nitrided film 43 (FIG. 2(e)). . The heat treatment in this case may be performed in a diffusion furnace, a lamp annealer, or the like.
次に、容量絶縁膜のＴａ２０５を厚さ５〜５００ｍ、Ｃ
ＶＤ等の方法で形成し、最後にポリシリコン膜の第２の
電極６を形成して、容量部を形成する（第２図（ｆ））
。Next, a capacitive insulating film of Ta205 is coated with a thickness of 5 to 500 m, and C
It is formed by a method such as VD, and finally a second electrode 6 of a polysilicon film is formed to form a capacitor part (FIG. 2(f)).
.
以上、説明したように、本発明は、溝容量の形成に適用
できる。このように、第コの電極の下地の形状は、特に
限定されるわけではない。As described above, the present invention can be applied to forming a groove capacitance. In this way, the shape of the base of the first electrode is not particularly limited.
なお、以上の説明では、容量絶縁膜としてＴａ２Ｏ，を
用いたが、他の金属酸化膜あるいは窒化シリコン膜を用
いてもよい。また第２の電極は、ポリシリコン膜以外に
も、シリサイド膜、ポリサイド膜、高融点金属膜を用い
るのも自由である。In the above description, Ta2O was used as the capacitor insulating film, but other metal oxide films or silicon nitride films may be used. In addition to the polysilicon film, the second electrode may also be made of a silicide film, a polycide film, or a high melting point metal film.
さらに、第１の電極上のチタンシリサイド膜を窒化する
場合、チタンシリサイド膜を完全に窒化しないで、チタ
ンシリサイド膜の表面のみを窒化しても、本発明の効果
は変わらない。Furthermore, when nitriding the titanium silicide film on the first electrode, the effects of the present invention do not change even if only the surface of the titanium silicide film is nitrided without completely nitriding the titanium silicide film.
以上説明したように本発明は、ポリシリコン膜の第１の
電極上に、チタン膜を形成し、熱処理を行い、ポリシリ
コン膜上のチタン膜をチタンシリサイＩ・化しかつ酸化
シリコン膜上のチタン膜を窒化チタン化したのちその窒
化チタン膜を除去し、さらに熱処理を行ってチタンシリ
サイドを窒化することにより、第１の電極上に選択的自
己整合的に窒化チタンを少なくとも主成分とする膜を形
成することができるので、容量を高密度に集積できる効
果がある。As explained above, in the present invention, a titanium film is formed on a first electrode of a polysilicon film, heat treatment is performed to convert the titanium film on the polysilicon film into titanium silicide I, and the titanium film on the silicon oxide film is After converting the titanium nitride into titanium nitride, the titanium nitride film is removed, and further heat treatment is performed to nitride the titanium silicide, thereby forming a film containing at least titanium nitride as a main component on the first electrode in a selective self-alignment manner. This has the effect of allowing capacitors to be integrated at high density.
第１−図（ａ）〜（ｇ）は、本発明の一実施例を示す工
程順断面図、第２図（ａ）〜（ｆ＞は、本発明応用例を
示ず工程順断面図、第３図（ａ）〜（ｄ）は、従来例を
示す工程順断面図である。
１・・・シリコン基板、２・・・酸化シリコン膜、３・
・・第１−の電極、４・・・チタン膜、４１・・・窒化
チタン膜、４２・・・チタンシリサイド膜、４３・・・
窒化処理膜、４４・・・窒化チタン膜、５・・・容量絶
縁膜、６・・・第２の電極。1-(a) to (g) are step-by-step sectional views showing one embodiment of the present invention; FIG. 2(a)-(f) are step-by-step sectional views showing an example of application of the present invention; 3(a) to 3(d) are cross-sectional views showing a conventional example in the order of steps. 1. Silicon substrate, 2. Silicon oxide film, 3.
... 1st electrode, 4 ... titanium film, 41 ... titanium nitride film, 42 ... titanium silicide film, 43 ...
nitrided film, 44... titanium nitride film, 5... capacitive insulating film, 6... second electrode.
Claims (1)
板上にポリシリコン膜からなる第１の電極を形成する工
程、チタン膜を被着したのち、窒素あるいはアンモニア
を含む雰囲気中で熱処理を行って、前記第１の電極上の
チタン膜を主としてチタンシリサイド化し、かつ前記酸
化シリコン膜上のチタン膜を窒化チタン化する工程、前
記酸化シリコン膜上の窒化チタン膜をアンモニアと過酸
化水素を含む溶液を用いて除去する工程、前記第１の電
極上のチタンシリサイド膜を窒素あるいはアンモニアを
含む雰囲気中で熱処理で窒化する工程、該チタンシリサ
イドの窒化処理膜上に容量絶縁膜を形成する工程及び第
２の電極を形成する工程を含むことを特徴とする半導体
装置の製造方法。A step of forming a first electrode made of a polysilicon film on a substrate having a silicon oxide film having a contact hole on its surface. After depositing a titanium film, heat treatment is performed in an atmosphere containing nitrogen or ammonia, and the above-mentioned A step of mainly converting the titanium film on the first electrode into titanium silicide and converting the titanium film on the silicon oxide film into titanium nitride, converting the titanium nitride film on the silicon oxide film using a solution containing ammonia and hydrogen peroxide. a step of nitriding the titanium silicide film on the first electrode by heat treatment in an atmosphere containing nitrogen or ammonia; a step of forming a capacitive insulating film on the nitrided titanium silicide film; A method for manufacturing a semiconductor device, the method comprising the step of forming an electrode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2218816A JP2982254B2 (en) | 1990-08-20 | 1990-08-20 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2218816A JP2982254B2 (en) | 1990-08-20 | 1990-08-20 | Method for manufacturing semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04101453A true JPH04101453A (en) | 1992-04-02 |
| JP2982254B2 JP2982254B2 (en) | 1999-11-22 |
Family
ID=16725797
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2218816A Expired - Lifetime JP2982254B2 (en) | 1990-08-20 | 1990-08-20 | Method for manufacturing semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2982254B2 (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5466964A (en) * | 1992-09-07 | 1995-11-14 | Nec Corporation | Semiconductor device capable of increasing reliability |
| US5530279A (en) * | 1993-03-17 | 1996-06-25 | Nec Corporation | Thin film capacitor with small leakage current and method for fabricating the same |
| US5956595A (en) * | 1996-07-15 | 1999-09-21 | Nec Corporation | Method of fabricating a semiconductor integrated circuit having a capacitor with lower electrode comprising titanium nitride |
| US6201281B1 (en) | 1993-07-07 | 2001-03-13 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for producing the same |
| US6455875B2 (en) | 1992-10-09 | 2002-09-24 | Semiconductor Energy Laboratory Co., Ltd. | Thin film transistor having enhanced field mobility |
| US6624477B1 (en) | 1992-10-09 | 2003-09-23 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
-
1990
- 1990-08-20 JP JP2218816A patent/JP2982254B2/en not_active Expired - Lifetime
Cited By (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5548157A (en) * | 1992-09-07 | 1996-08-20 | Nec Corporation | Semiconductor device capable of increasing reliability |
| US5466964A (en) * | 1992-09-07 | 1995-11-14 | Nec Corporation | Semiconductor device capable of increasing reliability |
| US6790749B2 (en) | 1992-10-09 | 2004-09-14 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing a semiconductor device |
| US8017506B2 (en) | 1992-10-09 | 2011-09-13 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for forming the same |
| US7723788B2 (en) | 1992-10-09 | 2010-05-25 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for forming the same |
| US7602020B2 (en) | 1992-10-09 | 2009-10-13 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for forming the same |
| US6455875B2 (en) | 1992-10-09 | 2002-09-24 | Semiconductor Energy Laboratory Co., Ltd. | Thin film transistor having enhanced field mobility |
| US6624477B1 (en) | 1992-10-09 | 2003-09-23 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
| US7109108B2 (en) | 1992-10-09 | 2006-09-19 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device having metal silicide |
| US5530279A (en) * | 1993-03-17 | 1996-06-25 | Nec Corporation | Thin film capacitor with small leakage current and method for fabricating the same |
| US5670408A (en) * | 1993-03-17 | 1997-09-23 | Nec Corporation | Thin film capacitor with small leakage current and method for fabricating the same |
| US6569719B2 (en) | 1993-07-07 | 2003-05-27 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for producing the same |
| US6784453B2 (en) | 1993-07-07 | 2004-08-31 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for producing the same |
| US6201281B1 (en) | 1993-07-07 | 2001-03-13 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for producing the same |
| KR100299602B1 (en) * | 1996-07-15 | 2001-10-26 | 가네꼬 히사시 | Semiconductor device manufacturing method |
| US5956595A (en) * | 1996-07-15 | 1999-09-21 | Nec Corporation | Method of fabricating a semiconductor integrated circuit having a capacitor with lower electrode comprising titanium nitride |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2982254B2 (en) | 1999-11-22 |
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