JPH04112251A - Microcomputer - Google Patents

Abstract

PURPOSE:To execute an extending address access without prolonging an access time by providing a terminal which directly outputs extending address information included by an outside access of the extending address command to the outside. CONSTITUTION:This microcomputer is equipped with a most significant address outputting terminal 7 which outputs the extending address information, that is, the higher-order address than that capable of being designated at an inside address bus, in order to realize the outside access of the extending address. A most significant address slave latch 6 is connected through a most significant address bus 31 with this outputting terminal 7. Then, a most significant address master latch 15 is connected through a bus 30 with the latch 16, and both the latches 15 and 16 are controlled through control signal lines 5 and 6 by a microprogram 12. Thus, the microcomputer can be operated by the accessing time equivalent to the normal outside access even when the outside access beyond the capacity is continued.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a microcomputer having an external address access function, and particularly to address control means in external access G2.

[Conventional technology]

Conventionally, in microcomputers having an external address access function, the external capacity that can be accessed in one external access operation is limited by the number of internal address buses. Figure 4 shows this relationship, that is, the relationship between the number of internal address buses and the external capacity that can be accessed by them.
3, only 64 bytes of external capacity can be accessed, and 2
The 0-bit address bus 34 can only access 1M byte of external space. A method for realizing an extended address access means that has the function of accessing a capacity space larger than this capacity is to output an address higher than the address possible on the address bus to the external device in advance before issuing an external access command. The common method was to keep it.

FIG. 5 shows an example of a group of instructions for realizing conventional extended address access, and FIG. 6 shows an example of a block diagram of means for that purpose. In this example, a microcomputer with a 16-bit address bus accesses an external space of 16 Mbytes, which is 250 times the normal size. Instruction 3 in Figure 5(a)
5 is an instruction for causing the ADH register 38 in FIG. 6 to latch the 8-bit address higher than the 16-bit address accessible by the address bus in data access. In the block diagram of FIG. 6, this instruction causes the 8-bit data bus 37 to be latched into the ADH register 38 and simultaneously output to the external device 41 via the 8-bit address bus 39. Next, Figure 5 (b
) writes A to address 3456H with instruction 36. Through this series of operations, the 8-bit address bus 39 in FIG.
A is written to address 123456H using a total of 24 bits of address bus including 16 bits of address bus 40 and 16 bits of address bus 40. Therefore, when accessing an address whose most significant address changes frequently, it is necessary to always execute two instructions.

[Problem to be solved by the invention]

In the external access function of the conventional microcomputer described above, in the case of an access exceeding the external capacity that can be accessed by an internal address, an extra instruction is originally required to specify an address higher than the address that can be specified on the address bus. has to be added, resulting in a very long access time.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a microcomputer that can perform extended address access without increasing access time.

[Means to solve the problem]

In addition to the address bus, data bus, and access control line that a normal microcomputer has, the microcomputer of the present invention is provided with a terminal for directly outputting extended address information included in an extended external access instruction to the outside, and has a terminal that outputs extended address information included in an extended external access instruction directly to the outside. The present invention is characterized in that it detects that the command is an extended external access command and sends address information for external access, and also sends extended address information from the terminal.

〔Example〕

Next, one embodiment of the present invention will be described with reference to the drawings.

Referring to FIG. 1, in the embodiment of the present invention, in order to realize external access to the extended address, the most significant address is used to output extended address information, that is, an address higher than the address that can be specified on the internal address bus. An output terminal 7 is provided, and the highest address slave latch 16 is connected to the output terminal 7 via the highest address bus 31. The most significant address master latch 15 is connected to the latch 16 via the bus 30, and both latches 1516 are controlled by the microprogram 12 via the control signal line 5.6.

This embodiment uses the 8-bit CP of the internal bit address bus.
U directly accesses the 16 MB external space. The instruction code (first byte of the instruction) read from the program memory 1o passes through the memory output bus 28 and is latched into the program data latch 11, and then passes through the program data bus 29 to the microprogram 12.
The type of command is determined. The second byte of the instruction corresponds to the highest address if it is an external access instruction, so it is sent from the program memory 10 to the program data latch 11 via the memory output bus 28, and at the same time it is sent from the program memory 10 to the memory output bus 28. It is also sent to the highest address master latch 15 via the address. This operation is executed not only for external access instructions but also for all instructions. Then, as a result of the instruction code determination of the first byte of the instruction performed by the microprogram 12, only when it is determined that it is an external access instruction, the highest address master latch 15 and the highest address slave are transmitted via the control line 5.6. The latch 16 is controlled, and the contents of the latch 15 (that is, the highest address in this case) are sent from the master latch 15 to the highest address slave latch 16 via the master latch output bus 30, and the highest address is synchronized with external access timing. It is output to the highest address bus output terminal 7 via the bus 31. The lower address is outputted from the address generation circuit 13 via the address bus 32 and from the address bus output terminal 8.

The timing of external access will be explained with reference also to FIGS. 2 and 3. External access command 17 is shown in FIG. 2(a).
The hex data is shown in FIG. 2(b). This instruction is an instruction to write the contents of the A register to address 123456H, the first byte 18 of the instruction is an instruction code "' 78 H" indicating an external access instruction, and the second byte 19 of the instruction is the most significant address " 12
H”.

, the third byte 20 indicates the upper address "34H", and the fourth byte 21 indicates the lower address "'56H". FIG. 3 shows the fetching and execution of this instruction (steps 22 to 27) and the time relationship of the signals on each latch 15, 16 and the address bus 31, 32 in comparison with the clock, and shows the instruction at the highest address. 2nd byte of 19
is also latched in the highest master latch 15 at the same time as it is fetched. When the instruction code 18 determines that it is an external access command, the contents of the highest master latch 15 are transferred to the highest slave latch 16. and,
During the external access cycle, the content "12H" of the highest slave latch 16 is output from the highest address bus 31 to the terminal 7 in synchronization with the output of the upper and lower addresses "3456 H" from the address bus 32.

〔Effect of the invention〕

As explained above, according to the present invention, by adding a terminal for directly outputting extended address information to the outside as an external access means, assuming the number of address buses to be n, 2n
This has the advantage that even if external accesses that exceed the capacity of the system occur continuously, the operation can be performed in the same access time as normal external accesses.

[Brief explanation of drawings]

Fig. 1 is a block diagram of an embodiment of the present invention, Fig. 2(a)
3 is a timing diagram showing the operation of the embodiment, FIG. 4 is a diagram showing accessible external capacity depending on the number of address buses, and FIG. ) and (b) are diagrams showing conventional external access instructions, and FIG. 6 is a block diagram of the external access part of the conventional example. 7...Most significant address output terminal, 8...Address bus output terminal, 1o...Program memory, 11...
Program data latch, 12... Micro program, 13... Address generation circuit, 15... Most significant address master latch, 16... Most significant address slave latch, 28... Memory output bus, 29...・Program data bus, 3o...master latch output bus,
31...Most significant address bus, 32...Address bus, 18...1st byte of instruction (instruction code) 19.
...2nd byte of the instruction, 2o...3rd byte of the instruction,
21...4th byte of instruction, 22-27...instruction execution step, 33...16-bit address bus, 3
4...20-bit address bus, 37...Data bus, 38...Address latch, 39...Most significant address bus, 40...Address bus, 17, 35°36
···order.

Claims (1)

[Claims] A microcomputer with an external address access function is equipped with a terminal that directly outputs the extended address information included in the extended external access instruction to the outside, and detects that the instruction read from the program is an extended external access instruction and performs external access. A microcomputer characterized in that it transmits address information and also transmits extended address information from the terminal.