JPH041526B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a noise reduction device comprising a signal compressor and a signal expander.

Conventionally, in order to improve the S/N ratio of a particular communication system or a particular recording/reproduction system, it has been known to use a noise reduction device equipped with a signal compressor and a signal expander in that system. .

In particular, the circuit components of the signal compressor and the signal expander are used in common, and the function of the signal compressor and the function of the signal expander can be switched by switching the mode switch. The equipment is manufactured by the Society of Electronics and
Radio Technician Magazine Volume 8 May 1974/
This is proposed by the June issue.

FIG. 1 shows a circuit block diagram of this switchable signal compressor/signal expander. This type of switchable signal compressor/stretcher is a Dolby B
It is well known to those skilled in the art as a type noise reduction system (the term "Dolby" refers to
) is a registered trademark of Dolby Laboratories.

By switching this Dolby B noise reduction system to a signal compressor, the system becomes an encoder. A signal compressor (encoder) compresses the dynamic range of the input signal before it is recorded on audio tape. By switching the system to a signal expander, the system becomes a decoder. A signal expander (decoder) restores the linearity of the dynamic range to the input signal. The noise introduced during the recording/playback process is considerably reduced, so that the signal compressor-signal expander combination acts as a noise reduction device.

In Dolby B noise reduction systems, signal compression/signal expansion operations are typically performed on signal components above a frequency value of 200 Hz.

The well-known encoder/decoder will now be described in detail with reference to the circuit block of FIG.

_The noise reduction device _shown in _FIG .
It has a side chain l _S between SW and the output terminal T ₂ .

On the main path l _n there is a coupling circuit 10, an inverter 1
1 is placed.

A variable filter 12 is placed on the side chain _S.
A signal amplifier 13, a control amplifier 14, a rectifier/smoothing circuit 15, and an overshoot suppressor 16 are arranged.

If mode switch SW is connected to terminal _T3 , this circuit block becomes an encoder.
The coupling circuit 10 and the inverter 11 on the main path l _n perform linear amplification.

The variable filter 12 changes the amount of transmission for signal components with frequencies of 200 Hz or higher in accordance with the control signal S _C generated by the rectifier/smoothing circuit 15. To explain in more detail, due to the loop of the variable filter 12, signal amplifier 13, control amplifier 14, and rectifier/smoothing circuit 15, when the level of the input signal at the common terminal _T5 of the mode switch SW decreases, the amount of transmission from the variable filter 12 decreases. increases.
Therefore, as the input signal level decreases, the signal components at frequencies above 200 Hz on the side path L _S increase.

If the circuit block is configured as an encoder, the signal on the side chain _lS is added to the signal on the main path _ln . Therefore, as shown in the amplitude-frequency characteristics of FIG. 2, signal components of 200 Hz or more gradually have larger amplitude values as the signal level decreases.

On the other hand, if mode switch SW is connected to terminal _T4 , this circuit block becomes a decoder. The inverter 11 on the main path _ln is configured as a signal inverter, and the output signal of this inverter 11 is applied to the common terminal _T5 of the mode switch SW, so that on the side chain _ls Input terminal T ₁
A signal having the opposite phase to the input signal applied to the input signal is now supplied. Therefore, the signal on the side chain _lS is subtracted from the signal on the main path _ln , so in the amplitude-frequency characteristics of the decoder output signal, the signal components above 200Hz gradually become smaller as the signal level decreases. It has an amplitude value.

The overshoot suppressor 16 limits the amplitude value of the voltage across the terminals applied to the variable filter 12. If this overshoot suppressor 16 were not in place, undesirable changes would occur in high level transient signals.

The rectifier/smoothing circuit 15 of the conventionally known Dolby B type noise reduction system includes a first diode and a second diode connected in series, and the first diode has a forward voltage of about 0.3V.
consists of germanium diodes,
The second diode is constituted by a silicon diode whose forward voltage is about 0.7V.

On the other hand, a Dolby B type noise reduction system configured on a silicon monolithic semiconductor integrated circuit (hereinafter referred to as IC) is also known.
The first diode and second diode in the rectifier/smoothing circuit of the IC-based system are constituted by silicon transistors inside the IC.
Since the forward voltage of the silicon transistor inside the IC is approximately 0.7V, the encode/decode characteristics of the known Dolby B-type noise reduction system integrated into the IC deviate from Dolby's standard encode/decode characteristics. It has its drawbacks.

Accordingly, an object of the present invention is to provide a noise reduction device that is constructed on a silicon semiconductor integrated circuit and has smaller errors than Dolby standard encoding/decoding characteristics.

Hereinafter, the present invention will be specifically explained with reference to the drawings.

FIG. 3 shows a circuit block of a switchable signal compressor/signal expander according to one embodiment of the present invention, with components within the dashed line IC being constructed within a silicon monolithic semiconductor integrated circuit. The numbers in circles indicate the terminal numbers of the integrated circuit.

A coupling circuit 10 and an inverter 11 are arranged on the main path l _n between the input terminal T ₁ and the output terminal T ₂ . The input terminal _T1 is connected to the No. 1 terminal via the input coupling capacitor _C1 , and the No. 1 terminal is connected to one input terminal of the coupling circuit 10 and the R-side non-inverting input terminal of the switching amplifier SW configured as a mode switch. and is connected to. On the other hand, the P-side non-inverting input terminal of the switching amplifier SW is connected to the output terminal of the inverter 11, and the output terminal of the switching amplifier SW is connected to its inverting input terminal and to the third terminal.

Capacitors C ₄ and C ₅ are connected in series between terminal 3 and terminal 5, and the common connection point of capacitors C ₄ and C ₅ is connected to terminal 4 via resistor R ₁₀₁ . A resistor R ₁₀₂ is connected in parallel to C ₅ .

Terminal 4 is AC grounded by capacitor _C3 ,
A variable impedance 12a is connected inside the IC between the fourth terminal and the fifth terminal.

Thus, the capacitors C ₄ and C ₅ , the resistors R ₁₀₁ and R ₁₀₂ , and the variable impedance 12a constitute the variable filter 12.

On the other hand, the reference voltage generator 17 generates a DC reference voltage V _REF at the No. 4 terminal.

The signal amplifier 13 is configured in the form of a so-called operational amplifier, and has a non-inverting input terminal, an inverting input terminal,
It has an output terminal. This non-inverting input terminal is connected to the fifth terminal and the variable impedance 12a. The voltage gain of the signal amplifier 13 is set by connecting a negative feedback network composed of resistors R ₇ and R ₈ between the output terminal and the inverting input terminal of the signal amplifier 13. The output signal at the output terminal of the signal amplifier 13 is supplied to an overshoot suppressor 16.

The overshoot suppressor 16 has a resistance R ₉ ,
Consists of clamp diodes D ₃ and D ₄ ,
Preventing undesired changes due to high level transient signals.

The output signal of the overshoot suppressor 16 is transmitted to the side path I _S as the other input terminal of the coupling circuit 11.

On the other hand, the control amplifier 14 is configured in the form of a so-called operational amplifier, and has a non-inverting input terminal, an inverting input terminal, and an output terminal. This non-inverting input terminal is connected to the output terminal of the signal amplifier 13.

The inverting input terminal of the control amplifier 14 is connected to the frequency characteristic determining circuit 14a configured by capacitors C ₆ , C ₇ and resistor R ₁₀₃ via the No. 6 terminal, so that the output frequency of the control amplifier 14 can be adjusted. Characteristics are determined.

Although not particularly limited, the output signal of the control amplifier 14 is connected to a resistor R ₆ (1.6KΩ) for attack time adjustment.
The signal is transmitted to the rectifier/smoothing circuit 15 via.

The rectifier/smoothing circuit 15 includes a rectifier 15a composed of a first diode _D1 , and has capacitances _C8 , _C9 ,
It includes a smoothing circuit 15b composed of a resistor R ₁₀₄ and a second diode D ₂ . Second diode D ₂
adjusts the so-called attack time and recovery time to appropriate values. Also, the first diode
Both _D1 and the second diode _D2 are constituted by collector-base shorted silicon transistors in a monolithic semiconductor integrated circuit, and their forward voltage is about 0.7V.

On the other hand, the 7th terminal and the 8th terminal are the smoothing circuit 15.
The capacitors C ₈ and C ₉ of b and the resistor R ₁₀₄ are arranged for connection outside the semiconductor integrated circuit. Smoothing circuit 15
The output voltage of b is applied to resistors R ₁₀ , R ₁₁ ,
R ₁₂ , and is transmitted to a voltage-current converter 15d configured by transistors Q ₃ , Q ₄ , and Q ₅ .

This voltage-current converter 15d is a smoothing circuit 15b.
A control signal current S _c corresponding to the output voltage of is generated at its output. According to the magnitude of the control signal current S _c ,
The impedance value of the variable impedance 12a of the variable filter 12 is controlled.

Variable filter 12, control amplifier 14, rectifier/
The smoothing circuit 15 is connected to the common terminal _T5 of the mode switch SW.
In order to control the impedance value of the variable impedance 12a to a high value as the signal level decreases, the signal amplifier 13 and the overshoot
The level of the signal component having a frequency of 200 Hz or more transmitted to the side chain L _S via the suppressor 16 increases.

The combining circuit 10 performs the addition of the signal components on the main path _ln and the signal components on the side chain _ls .

The first control circuit 18 controls the operation mode of the switching amplifier SW by applying the first control signal P/B to the No. 9 terminal. That is,
When the first control signal P/B is at the first level, the switching amplifier SW is applied to the R-side non-inverting input terminal (i.e., terminal T ₃ ) under the control of the first control circuit 18. It responds to a signal and does not respond to a signal applied to the P-side non-inverting input terminal (ie, terminal T ₄ ).

When the first control signal P/B is at the second level, the switching amplifier SW is applied to the P-side non-inverting input terminal (i.e., terminal T ₄ ) under the control of the first control circuit 18. R in response to the signal
It does not respond to a signal applied to the side non-inverting input terminal (ie, terminal T ₃ ).

If the switching amplifier SW is responsive to a signal applied to the terminal T ₃ , then the signal on the main path l _n is transmitted to its common terminal T ₅ . In this case, the signal component on the main path _ln and the signal component on the side chain are added, so this circuit block operates as an encoder.

On the other hand, if the switching amplifier SW responds to a signal applied to terminal T ₄ , then its common terminal T ₅
The output signal of the inverter 11 is transmitted to the inverter 11. In this case, the signal on the side chain _lS is connected to the main path.
l is subtracted from the signal on _n , so this circuit block operates as a decoder.

By applying the second control signal SIDE ON/OFF to the 12th terminal, the second control circuit 19 controls the operation mode of the variable impedance 12a. That is, when the second control signal is at the first level, the impedance of variable impedance 12a is controlled by the output of voltage-to-current converter 15d, and side chain I _S performs a predetermined operation.

If the second control signal is at the second level,
Under the control of the second control circuit 19, the impedance of the variable impedance 12a becomes extremely small, and the operation of the side chain is substantially stopped. Coupling circuit 1 from vertical side chain L _S
The supply of the AC signal to the other input terminal of 0 is substantially stopped.

The power supply voltage V _CC is supplied to the 10th terminal, and the 11th terminal is connected to the ground potential.

Furthermore, the bias circuit 20 is specifically arranged according to the invention, and the voltage across the resistor R ₁ of the bias circuit 20 is set to 0.3V.

A bias circuit 20 according to an embodiment of the present invention includes a constant current source as a current supply means 20a, silicon diodes _D5 , _D6 , and a constant voltage source as a constant voltage means 20b.
It is composed of D ₇ , D ₈ , D ₉ , emitter follower transistors Q ₁ , Q ₂ , and resistors R ₁ , R ₂ , R ₃ , R ₄ , R ₅ .

In order to prevent a large current from flowing from the anode and cathode of the first diode D ₁ of the rectifier/smoothing circuit 15 and the rectification characteristics of the rectifier/smoothing circuit 15 deviating significantly from the predetermined characteristics, the resistances of the resistors R ₂ and R ₃ are The resistance value is set to a value sufficiently larger than the resistance value of the resistors R ₁ and R _4. Therefore, according to an embodiment of the present invention, the resistance values of the resistors R ₁ and
By setting R ₂ , R ₃ , R ₄ , and R ₅ as shown below, the voltage across the resistor R ₁ is set to approximately 0.3V.

On the other hand, when _the AC output signal of the control amplifier ₁₄ is zero, _the bias voltage generated in _{the resistor R 1 in} the bias circuit ₂₀ Therefore, a minute input current _I4 of 2 μA flows through the diodes _Q3 and _Q4 on the input side of the voltage-current converter 15d. Therefore, the voltage-current exchanger 15d
A minute output current I ₅ of 2 μA flows through the transistor Q ₅ on the output side, and the impedance of the variable impedance 12a is set to an extremely high value (several 100 KΩ).

Furthermore, the voltage-current converter 1
By maintaining the values of the minute input current I ₄ and the minute output current I ₅ of 5d substantially constant, it is necessary to maintain the impedance of the variable impedance 12a substantially constant against temperature changes.

For this purpose, it is necessary to set the temperature dependence of the potentials V _A and V _B at the circuit connection point on the input side of the voltage-current converter 15d to be equal to each other.

Potential V _A at the circuit connection point and its temperature dependence
dV _A /dT is determined as follows.

V _A =V _BEQ3 +V _BEQ4 +R ₁₁・I ₄ ……(1) dV _A ／dT≒dV _BEQ3 ／dT＋dV _BEQ4 ／dT ……(2) On the other hand, the temperature dependence of the transistor base-emitter voltage dV _BE ／ dT varies depending on the magnitude of the emitter current _IE as shown in FIG.

Transistors Q ₃ and Q ₄ have a small input current of 2 μA I ₄
flows, the excessive dependence of the base-emitter voltage dV _BE /dT is -2.4 mV/°C, and the temperature dependence of the circuit connection point is -4.8 mV/°C.

Potentials at circuit connection points, V _B , V _C ,
Temperature dependence of V _D , V _E , V _F dV _B /dT, dV _C /dT,
dV _D /dT, dV _E /dT, and dV _F /dT are determined as follows.

V _B =V _C =V _D =V _E =R ₄ /R ₁ +R ₄ +R ₅・V _F ...(3) dV _B /dT=dV _C /dT=dV _D /dT=dV _E /dT =R ₄ /R ₁ +R ₄ +R ₅・dV _F /dT ...(4) Therefore, in order to set the excessive dependence of the potentials at the circuit connection points to be equal to each other, the temperature dependence of the potential V _F at the circuit connection points must be The characteristic dV _F /dT can be set as shown below.

dV _F / dT = R ₁ + R ₄ + R ₅ / R ₄・dV _B / dT = R ₁ + R ₄ + R ₅ / R ₄・ dV _A / dT = 270 + 910 + 68/910 x (-4.8) mV/℃ = 1248/910 ×(-4.8)mV/℃=-6.58mV/℃...(5) On the other hand, the maximum output current from the control amplifier 14
If transistors Q ₁ and Q ₂ turn off when I ₁₄ max flows into resistor R ₁ via resistor R ₂ , the potential at the common connection point of resistors R ₁ and R ₂ will change undesirably. . To prevent this, the DC bias current I ₂ of the transistor Q ₂ is set to a value larger than the maximum output current I ₁₄ max of the control amplifier 14.

According to an embodiment of the present invention, the maximum output current
Since I ₁₄ max is 1.0 mA, the DC bias current I ₂ flowing through the collector-emitter path of transistor Q ₂ is set to 1.3 mA.

Since the emitter-grounded DC current amplification factor h _FE of transistor Q ₂ is approximately 200, transistor Q ₁
The DC bias current _I1 flowing in the collector-emitter path of is calculated as follows.

I ₁ = I ₂ /h _FE +1≒1.3mA/200=6.5μA ...(6) A current of 6.5μA flows through the emitter of transistor _Q1 , and a current of 1.3mA flows through the emitter of transistor _Q2 . As can be understood from Figure 4, the temperature dependence of the base-emitter voltage of transistor Q ₁ dV _BEQ1 /dT is -1.95 mV/℃, and the temperature dependence of the base-emitter voltage of transistor Q ₂ dV _BEQ2 /dT is -1.7mV/℃.

On the other hand, silicon diodes D ₅ , D ₆ , D ₇ ,
The potential V _F at the circuit connection point determined by D ₈ , D ₉ and the transistors Q ₁ and Q ₂ and the temperature dependence dV _F /dT are determined as follows.

V _F ＝V _BED5 ＋V _BED6 ＋V _BED7 ＋V _BED8 ＋V _BED9 −V _BEQ1 −V _BEQ2 ……(7) dV _F ／dT＝dV _BED5 ／dT＋dV _BED6 ／dT＋dV _BED7 ／dT ＋dV _BED8 ／dT＋dV _BED9 ／dT−dV _BEQ1 ／ dT−dV _BEQ2 /dT = dV _BED5 /dT+dV _BED6 /dT+dV _BED7 /dT +dV _BED8 /dT+dV _BED9 /dT +1.95mV/℃+1.7mV/℃ ...(8) On the other hand, where the above formula (5) is satisfied of silicon
The temperature dependence of diodes D ₅ , D ₆ , D ₇ , D ₈ , and D ₉ is determined as follows.

dV _BED5 /dT+dV _BED6 /dT+dV _BED7 /dT+dV _BED8 /dT +dV _BED9 /dT = -6.58mV/℃-1.95mV/℃-1.7mV/℃ =-10.23mV/℃ ...(9) Therefore, (5) The temperature dependence dV _BED /dT for each of the five diodes D ₅ , D ₆ , D ₇ , D ₈ , D ₉ connected in series so as to satisfy the formula is determined as follows.

dV _BED /dT=10.23/5mV/℃=-20.46mV/℃...(10) Therefore, according to one embodiment of the present invention, five diodes connected in series as can be seen from FIG.
A constant current _I0 of _{5 μA is} applied to _{the diode D5 ,}
It is supplied to D ₆ , D ₇ , D ₈ , and D ₉ .

According to the embodiment of the present invention described above, the forward voltage of the germanium diode is adjusted between the anode and cathode of the _first diode D1 of the rectifier/smoothing circuit 15 by the bias circuit 20 configured inside the IC. Being biased by an equal voltage of 0.3V not only makes it possible to achieve the initial purpose, but also to reduce the temperature dependence of the bias output voltage of the bias circuit 20 and the circuit connection point A on the input side of the voltage-to-current converter 15d. Since the temperature dependence is matched, the temperature dependence of the impedance of the variable impedance 12a can be set to an extremely small value.

On the other hand, the present invention is not limited to the above embodiments, and various modified embodiments can be adopted.

For example, the constant current source as the current supply means 20a can be replaced with a resistor having a predetermined resistance value.

A switching amplifier configured inside the IC as a mode switch can be made into a mechanical transfer switch outside the IC.

The noise reduction device of the present invention is not limited to Dolby B type systems, but can be applied to two cascaded Dolby B type systems and a spectral noise reduction device.
It can also be applied to a Dolby C type system configured with a skewing circuit and an anti-saturation circuit.

[Brief explanation of drawings]

FIG. 1 shows a circuit block of a conventionally known switchable signal compressor/signal expander, and FIG. 2 shows amplitude-frequency characteristics when the circuit block of FIG. 1 is configured as a signal compressor. FIG. 3 shows a circuit block of a switchable signal compressor/signal expander according to an embodiment of the present invention, and FIG. 4 shows the temperature of the base-emitter voltage of a silicon transistor or the forward voltage of a silicon diode. The correlation characteristics between dependence and current are shown. l _n ...Main path, l _S ...Side chain,
10... Coupling circuit, 11... Inverter, 12... Variable filter, 13... Signal amplifier, 14... Control amplifier, 15... Rectifier/smoothing circuit, 16... Overshoot suppressor.

Claims (1)

[Claims] 1. An input terminal T ₁ into which a predetermined signal is input; a coupling circuit 10 having one input end connected to the input terminal T ₁ ; and an inverter 11 connected to the coupling circuit 10. , an output terminal T ₂ connected to the inverter 11, a variable filter 12 selectively connected to the input terminal T ₁ or the output terminal T ₂ by mode switch means SW, and the variable filter 12 a signal amplifier 13 connected to the signal amplifier 13; and a control amplifier 1 connected to the signal amplifier 13.
4 and an overshoot suppressor 16; a first silicon diode D1 and a second silicon diode D cascade-connected to the control amplifier 14;
2 and a voltage-current converter 15d.
The other input terminal of the coupling circuit 10 is connected to the overshoot suppressor 16, and the output of the voltage-current converter 15d is used to control the variable filter 12 for the predetermined signal. In a switchable signal compressor/signal expander configured to change the amount of transmission of the first silicon diode D1,
A bias circuit 20 biased to 0.3V is provided, and the bias circuit 20 includes a current supply source consisting of a constant current source 20a and a constant voltage means 20b, and the current supplied from the constant current source 20a to the constant voltage means 20b. The temperature dependence of the output voltage of the bias circuit 20 is determined by the value I ₀ of the voltage-current converter 1.
A switchable signal compressor/signal expander characterized in that the temperature dependence is set equal to the temperature dependence of the circuit connection point A on the input side of the switchable signal compressor/signal expander. 2 The bias circuit 20 further includes transistors Q ₁ and Q ₂ , a first resistor R ₁ , a second resistor R ₂ , and a third resistor.
R ₃ , a fourth resistor R ₄ , and the transistors Q ₁ ,
The base of Q ₂ is connected to the constant voltage means 20b,
The emitters of the transistors Q ₁ and Q ₂ are connected to the first
The other end of the first resistor _R1 is connected to the ground potential via the fourth resistor _R4 , and the _one end of the first resistor _R1 is connected to the second resistor _R2. The other end of the first resistor R1 is connected to the cathode of the first silicon diode D1 through the third resistor R3, and the second resistor _R1 is connected to the anode of the first silicon diode D1 through the third resistor _R3 . Claim 1, wherein the resistance values of the resistor _R2 and the _third resistor R3 are set to be larger than the resistance values of the first resistor _R1 and the fourth resistor _R4 . Switchable signal compressor/signal expander. 3 The transistor of the bias circuit 20
The DC bias current I ₂ flowing in the collector-emitter path of Q ₁ and Q ₂ is the maximum signal current flowing into the second resistor R ₂ from the output terminal of the control amplifier 14.
A switchable signal compressor/signal expander according to claim 2, characterized in that the signal compressor/expander is set to a value larger than I ₁₄ max. 4. The voltage-current converter 15d includes diodes Q ₃ and Q ₄ at the circuit connection point A on its input side, and the constant voltage means includes a plurality of diodes connected in series.
The diodes _D5 ...D9 are configured by D5 _...D9 , and the diodes _D5 ...
The current value I ₀ flowing through D ₉ is transferred to the diodes Q ₃ and Q ₄ at the circuit connection point A on the input side of the voltage-current converter 15d.
By setting the temperature dependence of the output voltage of the bias circuit 20 to a value that compensates for the temperature dependence of A switchable signal compressor/signal expander according to claim 3, characterized in that: