JPH0415323U

JPH0415323U -

Info

Publication number: JPH0415323U
Application number: JP5613990U
Authority: JP
Priority date: 1990-05-29
Filing date: 1990-05-29
Publication date: 1992-02-07

Description

[Brief explanation of drawings]

第１図はこの考案の１実施例によるＡ／Ｄ変換
器試験回路のブロツク図、第２図は被試験Ａ／Ｄ
変換器に入力する正弦波を示したグラフ、第３図
は被試験Ａ／Ｄ変換器が出力する正弦波を示した
グラフ、第４図は被試験Ａ／Ｄ変換器の出力信号
を周波数解析した結果を示すグラフ、第５図はデ
イジタル帯域通過フイルタの出力信号を周波数解
析した結果を示すグラフ、第６図はデイジタル２
次元表示器の表示内容を示したグラフ、第７図は
従来のＡ／Ｄ変換器試験回路の１実施例を示すブ
ロツク図である。図において、１は高精度正弦波発生器、２は被
試験Ａ／Ｄ変換器、３はデイジタル帯域通過フイ
ルタ、４はデイジタル２次元表示器、５は高精度
Ｄ／Ａ変換器、６はアナログ２次元表示器である
。なお、図中同一符号は同一又は相当部分を示す
。 Figure 1 is a block diagram of an A/D converter test circuit according to an embodiment of this invention, and Figure 2 is a block diagram of an A/D converter test circuit according to an embodiment of this invention.
A graph showing the sine wave input to the converter, Figure 3 is a graph showing the sine wave output from the A/D converter under test, and Figure 4 is a frequency analysis of the output signal of the A/D converter under test. Figure 5 is a graph showing the results of frequency analysis of the output signal of the digital bandpass filter, and Figure 6 is the graph showing the results of the digital bandpass filter output signal.
A graph showing the display contents of the dimensional display, and FIG. 7 is a block diagram showing one embodiment of a conventional A/D converter test circuit. In the figure, 1 is a high-precision sine wave generator, 2 is an A/D converter under test, 3 is a digital bandpass filter, 4 is a digital two-dimensional display, 5 is a high-precision D/A converter, and 6 is an analog It is a two-dimensional display. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims

[Scope of utility model registration request]

A high precision sine wave generator that outputs a low distortion sine wave,
The A/D under test (Analog
to Digital) converter, and a digital bandpass filter that extracts only desired frequency components from the digital signal of the A/D converter under test. An A/D converter test circuit equipped with a digital two-dimensional display that displays the digital signal of the D converter on the Y axis.