JPH04168821A - Serial bus transmission system - Google Patents

Abstract

PURPOSE:To detect an open fault and a short circuit fault immediately by sending the data bits at every channel on a serial bus on a transmission side together with additional normally-'1' and normally-'0' bits and monitoring those two bits on a reception side. CONSTITUTION:Encoding circuits 101-132 encodes the analog signals of 1st-32 channels into 6-bit data, send the parallel outputs to output lines D1-D6, and also output the normally-'0' and normally-'1' bits to output lines D7 and D8. A multiplexing circuit 2 multiplexes and output those outputs to the serial bus 3 on a time-division basis in synchronism with a bit synchronizing signal and a frame synchronizing signal. A synchronous signal extracting circuit 4 extracts the bit synchronous signal and bit synchronizing signal from frames on the serial bus 3. An additional bit extracting circuit 5 receives those synchronous signals and extracts the 1st-8th bits of each channel from the frames on the serial bus 3. A '1' detecting circuit 6 and a '0' detecting circuit 7 outputs detection signal when the 7th and 8th bits become '1' and '0'.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a serial bus transmission system, and particularly to a serial bus transmission system in which data for each channel consisting of a plurality of bits is time-division multiplexed and transmitted.

[Conventional technology]

Conventionally, in this type of serial bus transmission system, in addition to multiple data bits per channel, one bit for fault detection is added, and this bit is always kept at a roll level during normal data transmission, and this bit is set at the receiving side. When the signal is at a high level, a method is often used in which it is determined that there is an open failure in the output path or transmission path. This 1 bit may also be used to determine whether a channel circuit is mounted or not.

[Problem to be solved by the invention]

The conventional serial bus transmission system described above uses only one bit to determine an open fault, and therefore has the disadvantage that if a ground fault occurs in the sending circuit or transmission path, it cannot be detected immediately.

[Means to solve the problem]

The serial bus transmission method of the present invention is a serial bus transmission method in which data for each channel consisting of a plurality of bits is transmitted by time division multiplexing, and the first additional bit added to each channel is transmitted and received as a roll level. A first detecting means detects the high level of this additional bit on the side, and a second detecting means detects the low level of the second additional bit added for each channel by setting it to high level and transmitting it on the receiving side. 2 detection means.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention, showing a case in which each of 32 channels of analog signals is encoded into 6 bits and transmitted via a serial bus.

The encoding circuits 101, 102 to 132 are the first . The analog signals of the 2nd to 32nd channels are encoded into 6 bits at a cycle of 125 μS, and parallel outputs are sent to the output lines DI and D2 to D6, and the output lines D7 and D8 are always set to “0” and “0”, respectively. Outputs 1”. The multiplexing circuit 2 synchronizes the outputs from the encoding circuits 101, 102 to 132 with the bit synchronization signal and the frame period signal.
It is time-division multiplexed and output to the serial bus 3. Figure 2 is a frame configuration diagram of the multiplexed signal output to the serial bus 3, in which 32 8-bit data per channel are multiplexed into one signal.
Indicates that it forms a frame. The synchronization signal extraction circuit 4 is a circuit that extracts a bit synchronization signal and a frame synchronization signal from the frame on the serial bus 3 in the receiving section of the serial bus 3. Additional bit extraction circuit 5
is a circuit which receives the synchronization signal from the synchronization signal extraction circuit 4 and extracts the first to sixth bits of each channel from the frame on the serial bus 3 to the next circuit, and the seventh and eighth bits. The “1” detection circuit 6 and the “O” detection circuit 7 are circuits that output detection signals when the seventh and eighth bits output from the additional bit extraction circuits become “1” and “0”, respectively. It is.

With the above configuration, if there is an open failure on the transmission circuit, “1
An output is immediately obtained from the "0" detection circuit 6, and if there is a ground fault, an output is immediately obtained from the "0" detection circuit 7.

〔Effect of the invention〕

As explained above, in the present invention, the data bits for each channel on the serial bus are always added with "0" and "1" bits on the transmitting side and sent out, and the receiving side adds these two bits. By monitoring this, open faults and ground faults can be detected immediately.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of one embodiment of the present invention, and FIG. 2 is a block diagram of an embodiment of the present invention.
FIG. 2 is a frame configuration diagram on the serial bus shown in the figure. 2... Multiplexing circuit, 3... Serial bus, 4... Synchronous signal extraction circuit, 5...
Additional bit extraction circuit, 6...“1” detection circuit,
7..."O" detection circuit, 101. ~132...
...Encoding circuit.

Claims (1)

[Claims] In a serial bus transmission method that transmits data for each channel, which consists of multiple bits, by time division multiplexing, the first additional bit added to each channel is transmitted as a roll level, and the receiving side converts the high level of this additional bit into a low level. A first detection means for performing detection and a second detection means added for each channel.
1. A serial bus transmission system comprising: second detection means for transmitting with an additional bit set to a high level, and detecting a low level of the additional bit on a receiving side.