JPH0417338A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain semiconductors with high-reliability laminated wiring whose resistance does not increase even by heat treatment after wiring, and whose electromigration resistance and stress migration resistance are large, by making the laminated wiring composed of Al-Ti alloy layers and Al-Cu-Ti alloy layers formed on the surfaces. CONSTITUTION:The semiconductor of this invention has laminated wiring composed of an Al-Ti alloy layer 3 formed on a substrate 1 and an Al-Cu-Ti alloy layer 4 formed on the surface of the Al-Ti alloy layer 3. For example, a PSG 2 being a layer insulating film is formed on an Si substrate 1 in which semiconductor elements are formed, and on it an Al-Ti alloy layer 3 of thickness 250Angstrom is formed by sputtering using a target composed of TiAl3. Following this, an Al-Cu-Ti alloy layer 4 of thickness 1mum is formed using a target of an Al-0.1% Cu-0.15%Ti ally, without breaking vacuum. Next using photolithography and dry etching technique, the Al-Cu-Ti alloy layer 4 and Ai-Ti alloy layer 3 are pattered, and a laminated wiring pattern of width 1mum is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] The present invention relates to semiconductor devices, and particularly to wiring structures of semiconductor integrated circuits.

The purpose of the present invention is to provide a semiconductor device having a wiring structure with high electromigration resistance and stress migration resistance.

an Al-Ti alloy layer formed on a substrate;
The semiconductor device has a laminated wiring including an Al--Cu--Ti alloy layer formed on the surface of a Ti alloy layer.

Further, the Al-Ti alloy layer is constituted by a semiconductor device whose main component is TiAl3.

(Industrial Application Field) The present invention relates to a semiconductor device, and particularly to a wiring structure of a semiconductor integrated circuit.

In order to increase the degree of integration of semiconductor integrated circuit devices, it is necessary not only to miniaturize semiconductor elements but also to reduce the width of aluminum wiring to 1 μm.
It is necessary to miniaturize it to a certain level or smaller. With the miniaturization of interconnects, disconnection defects due to electromigration and stress migration are becoming more serious, and an aluminum interconnect structure with excellent electromigration resistance and stress migration resistance is desired.

[Conventional technology]

Conventionally, as a method of improving electromigration resistance and stress migration resistance, a wiring layer using an alloy of aluminum with copper and titanium added as a wiring material has been proposed. However, it has become clear that when this wiring layer is tested at a temperature of 200° C. or higher, the defect rate becomes higher than that of a wiring layer that does not contain copper or titanium.

To solve this problem, a stacked wiring structure having a Ti layer as a lower layer and an Al-CuTi alloy layer as an upper layer has been proposed.

It has become possible to keep the disconnection failure rate low in a storage test (stress migration resistance test) at 200'C or higher. The reason for this is that the Al-Cu-Ti alloy layer and the Ti layer react during heat treatment after forming the aluminum wiring.
-Ti alloy layer is formed, even if the upper layer Al-Cu-T
It is thought that even if the i-alloy layer was disconnected, the underlying Al--Ti alloy layer was connected, so the disconnection failure was avoided.

However, in the wiring having this laminated structure, an increase in wiring resistance is observed after heat treatment. For example, as a test condition, 500
When testing at 130 minutes at °C, 1 μm thick Al
The resistivity of -0,1χCu-0,15χT1 soil layer wiring after heat treatment is 3.4μΩcm, while the thickness of 1μ
In a laminated wiring having a Ti layer with a thickness of 250 layers under m of A I -0,1χCu -0,15χT1, the resistivity after heat treatment is 4.5 μΩcm, which indicates an approximately 30% increase in resistance.

In fact, in the manufacture of semiconductor devices, after wiring is formed, insulating film formation, packaging, and other processes are performed several times at 400 to 400°C.
Approximately 80 degrees of heat treatment is added.

Such an increase in resistance is undesirable because it degrades the performance of the semiconductor device. In addition, to compensate for the increase in resistance,
Increasing the thickness of the wiring is not preferable because it impedes planarization.

[Problem to be solved by the invention]

In view of the above-mentioned problems, it is an object of the present invention to provide a semiconductor device having a highly reliable laminated wiring that does not increase wiring resistance even after heat treatment after wiring and has high electromigration resistance and stress migration resistance. do.

[Means to solve the problem]

The above problem has a laminated wiring consisting of an AI-Ti alloy layer 3 formed on a substrate 1 and an Al-Cu-Ti alloy layer 4 formed on the surface of the AI-Ti alloy layer 3. The problem is solved by semiconductor devices.

Further, the A I - T i alloy layer 3 is T i A 1
3 is solved by a semiconductor device having wiring as a main component.

[Effect]

In the Al-Cu-Ti/Ti laminated wiring structure, the resistance increases by as much as 30% during heat treatment because the lower Ti layer reacts with the upper layer Al to form an intermetallic compound T j A ] y. The upper Al layer is used for reaction, and TiAl3
This is presumed to be because as the layer becomes thicker, the thickness of the upper layer decreases and becomes about 2/3 of the original thickness.

In the present invention, an Al-Ti alloy layer 3 is used as the lower layer,
The reaction forming TiAl3 during heat treatment occurs mainly in the lower layer. In particular, when using an alloy layer mainly composed of TiAl3 as the lower layer, since this composition is the most Al-rich phase in the Al-Ti system, the reaction with the upper Al-Cu-Ti alloy layer 4 is minimized. can be suppressed to Therefore, Al-Cu-Ti
The decrease in the thickness of the alloy layer 4 is also suppressed, and the wiring resistance does not increase.

Furthermore, an Al-Ti alloy layer 3 or TiAl.

A laminated wiring whose lower layer is a layer containing as a main component has excellent resistance to electromigration and stress migration for the same reason as the Al-Cu-Ti/Ti laminated wiring.

〔Example〕

FIG. 1 is a cross-sectional view for explaining Example I, in which 1 is a Si substrate, 2 is a PSG layer, 3 is an Al-Ti alloy layer, and 4 is an A
Represents an l-Cu-Ti alloy layer.

An interlayer insulating film PSG2 is formed to a thickness of 800 OA on the Si substrate 1 on which the semiconductor element is formed, and Ti
An AI-Ti alloy layer 3 having a thickness of 250 layers was formed by sputtering using a target made of Al 3. This A I - T i alloy layer 3 is T i A l
This is an alloy layer containing s as a main component. Next, an Al-Cu-Ti alloy layer 4 with a thickness of 1 μm was formed using an A I -0,1χCu-0,15χTi alloy target without breaking the vacuum. Using etching technology.

The Al-Cu-Ti alloy layer 4 and the Al-Ti alloy layer 3 were patterned to obtain a laminated wiring pattern with a width of 1 μm.

The resistivity of the laminated wiring after heat treatment at 500° C. for 830 minutes was 3.5 μΩcm, and almost no increase in resistance was observed due to the heat treatment.

In addition, the test results of the electromigration resistance and stress migration resistance of this laminated wiring are
It was confirmed that the resistance was comparable to that of -Cu-Ti/Ti laminated wiring, and there were no problems in practical use.

FIG. 2 is a sectional view for explaining Example 2.

1 is a Si substrate, 4 is an Al-Cu-Ti alloy layer, and 5 is a Ti
3 layers of Al, 6 is a field oxide film, 7 is an insulating film, 8 is T
1 layer, 9 is a TiN layer, and 10 is a source.

11 represents a drain, 12 represents a gate electrode, and 13 represents a gate insulating film.

Example 2 is an example in which Al-Cu-Ti/TiAl3 laminated wiring is applied to the source/drain electrodes of a field effect transistor, and the method for forming the laminated wiring is similar to Example 2.

In the wiring having contact with the Si substrate 1, a barrier layer such as TiN is used to prevent the reaction between aluminum and St, but the laminated wiring of the present invention may be used on such a barrier layer. In this case as well, the same effects as described in Example (2) can be obtained with respect to resistivity stability against heat treatment, electromigration resistance, and stress migration resistance.

〔Effect of the invention〕

As explained above, according to the laminated wiring of the present invention, conventional Al-Cu-Ti single layer wiring or Al-Cu-T
It is possible to solve the problems of i/Ti laminated wiring, and to provide a semiconductor device having wiring with high resistance stability against heat treatment, electromigration resistance, and stress migration resistance.

The present invention greatly contributes to improving the reliability of semiconductor integrated circuits.

7 is an insulating film.

8 is a Ti layer.

9 is TrNrfJ.

10 is the sauce.

11 is the drain.

12 is a gate electrode.

13 is a gate insulating film

[Brief explanation of drawings]

FIG. 1 is a sectional view for explaining Example I. FIG. 2 is a sectional view for explaining Example H. In fig. 1 is a substrate, which is a Si substrate. 2 is PSG. 3 is an AI-Ti alloy layer. 4 is an Al-Cu-Ti alloy layer. 5 is T i A 13 layers. 6 is a field oxide film.

Claims (1)

[Scope of Claims] [1] Al-Ti alloy layer (3) formed on the substrate (1)
) and Al formed on the surface of the Al-Ti alloy layer (3).
- A semiconductor device characterized by having a laminated wiring consisting of a Cu-Ti alloy layer (4). [2] The semiconductor device according to claim 1, wherein the Al-Ti alloy layer (3) contains TiAl_3 as a main component.