JPH04206997A - Circuit board layering tool - Google Patents
Circuit board layering toolInfo
- Publication number
- JPH04206997A JPH04206997A JP2339357A JP33935790A JPH04206997A JP H04206997 A JPH04206997 A JP H04206997A JP 2339357 A JP2339357 A JP 2339357A JP 33935790 A JP33935790 A JP 33935790A JP H04206997 A JPH04206997 A JP H04206997A
- Authority
- JP
- Japan
- Prior art keywords
- diameter
- pin
- alignment
- board
- hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Laminated Bodies (AREA)
- Casting Or Compression Moulding Of Plastics Or The Like (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明は、回路基板のピン位置合わせ用積層治具に係わ
り、特に2枚以上の多層プリント回路配線基板を同時に
積層するときに積層構成体間の位置合わせを高精度に行
なうのに用いて好適な回路基板用積層治具に関する。DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a lamination jig for pin positioning of circuit boards, and particularly to a lamination jig for pin positioning of circuit boards, and particularly for laminating a laminated structure when two or more multilayer printed circuit wiring boards are laminated at the same time. The present invention relates to a circuit board lamination jig suitable for use in highly accurate positioning between circuit boards.
(従来の技術)
従来より回路基板では、これを使用する機器の小型化、
高機能化を図るため、配線層の多層化や配線間隔の狭小
化が試みられている。この回路基板の所定位置には、積
層治具とこれらの配線とが接触しないように部品を搭載
するため、あるいは基板内各層間を接続するための穴が
あけられている。この際、基板内各層間の相対位置精度
は、極力精度よく整合されることが望まれる。(Conventional technology) Conventionally, circuit boards have been used to reduce the size of equipment that uses them.
In order to achieve higher functionality, attempts are being made to increase the number of wiring layers and narrow the wiring spacing. Holes are made at predetermined positions on the circuit board for mounting components so that the lamination jig and these wirings do not come into contact with each other, or for connecting layers within the board. At this time, it is desired that the relative positional accuracy between each layer within the substrate be matched as precisely as possible.
近年、このための回路基板用積層治具として種々のタイ
プのものが考案されている。特に、積層治具の上下板、
中間板間における熱膨張によって基準ピンが曲がり、こ
れによる位置ずれを防止しようとしたものとして、中間
板の穴径を基準ピンの径より相当世大きくした回路基板
用積層治具が知られている。In recent years, various types of lamination jigs for circuit boards have been devised for this purpose. In particular, the upper and lower plates of the lamination jig,
A circuit board lamination jig is known in which the hole diameter of the intermediate plate is considerably larger than the diameter of the reference pin in an attempt to prevent the positional deviation caused by bending of the reference pin due to thermal expansion between the intermediate plates. .
(発明が解決しようとする課題)
従来の積層治具を用いるときは、−1−1下板のうち下
板に基準ピンを立て、このピンに被積層利。(Problems to be Solved by the Invention) When using a conventional lamination jig, a reference pin is set up on the lower plate of the -1-1 lower plate, and the laminated object is attached to this pin.
中間板の穴を位置合わせして貫合しながら積み1゜げて
いく。この際、中間板の穴のすべてを、該穴と貫合する
基準ピンより相当世大きくした積層治具ては、中間板の
位置が基準ピンと中間板の穴径との差の範囲内において
位置ずれが起こり、基準ピンと中間板の穴との一部が接
触した状態となる。Align the holes in the intermediate plate and raise them 1° while penetrating them. At this time, if you use a laminating jig in which all of the holes in the intermediate plate are considerably larger than the reference pins that penetrate the holes, the position of the intermediate plate must be within the range of the difference between the reference pin and the hole diameter in the intermediate plate. A shift occurs, and the reference pin and the hole in the intermediate plate are in a state of being partially in contact with each other.
このような状態のまま加熱加圧されると、各1゛、。When heated and pressurized in this state, each 1゛.
下板と中間板の温度差あるいは制置差により熱膨張計に
差を生し、平面方向に沿って伸びる際に中間板の穴内の
一部と基準ピンが接触して、中間板の伸びる方向に制限
を受ける。その結果、この中間板に接触する被積層利料
に対して位置ずれを生じさせる。The temperature difference or restraint difference between the lower plate and the intermediate plate creates a difference in the thermal dilatometer, and when extending along the plane direction, the reference pin comes into contact with a part of the hole in the intermediate plate, and the direction in which the intermediate plate extends subject to restrictions. As a result, a positional shift occurs with respect to the laminated material that contacts this intermediate plate.
つまり、前述の従来方法では、中間板の穴がすべて基準
ピン径に対し相当世人きいため、積層成形時にその範囲
内において最大基準ピンと、中間板の穴の一部が接触す
るまで相対位置ずれを生じてしまう。したがって、これ
を加熱冷却した場合には、熱膨脹収縮により生じる寸法
差は、上記基準ピンに押されて1一方向へのみに作用し
、相対位置が正しく保たれなくなるという問題があった
。In other words, in the conventional method described above, all the holes in the intermediate plate are considerably larger than the diameter of the reference pin, so during lamination molding, the relative position shift is adjusted within that range until the maximum reference pin and part of the hole in the intermediate plate come into contact. It will happen. Therefore, when this is heated and cooled, there is a problem that the dimensional difference caused by thermal expansion and contraction is pushed by the reference pin and acts only in one direction, making it impossible to maintain the relative position correctly.
また、これとは別に従来の基準ピン径と中間板の穴径と
の」性差をすべて0〜0.1mmに少なくした積層治具
では、膨張収縮による寸法差の分は基準ピンの曲がりと
して吸収されるため、曲がりの生じ方によっては−1,
配力法と同じく相対位置が正しく保たれなくなるという
問題があった。In addition, in a lamination jig in which all the differences between the conventional reference pin diameter and the hole diameter of the intermediate plate are reduced to 0 to 0.1 mm, the dimensional difference due to expansion and contraction is absorbed as the bending of the reference pin. Therefore, depending on how the bend occurs, -1,
As with the force distribution method, there was a problem in that the relative positions were not maintained correctly.
本発明の目的は、これらの課題を解決し、高精度な位置
合わせ積層成形を可能とし、かつ必要に応じて3枚以−
1,の金属板のうちり、下板と中間板の制置を熱膨張係
数の違ったものとした場合でも、位置合わせ精度を阻害
することなく、熱膨脹収縮によって生ずる寸法差を吸収
できる回路基板用積層治具を提供することにある。The purpose of the present invention is to solve these problems, to enable highly accurate positioning lamination molding, and to make it possible to perform laminated molding with three or more sheets as necessary.
1. A circuit board that can absorb dimensional differences caused by thermal expansion and contraction without impairing alignment accuracy even when the lower plate and intermediate plate are installed with different coefficients of thermal expansion. The object of the present invention is to provide a lamination jig for
(課題を解決するための手段)
−1−記目的を達成するため、本発明は、4箇所以1−
に位置合わせ穴が設けられた3枚以1−の金属板と、前
記各位置合わせ穴に貫合する位置合わぜ用円筒ピンより
なり、同時に2枚以1−の多層プリン)・回路配線基板
をピン位置合わせして積層する際に用いられる回路基板
用積層治具において、4箇所以上の上記位置合わせ用円
筒ピンと金属板の穴との4箇所以上の組合わぜのうち、
2箇所以上の組合わせについて、積層成形時に−1−下
側側に配置される2枚の金属板の穴径を円筒ピンの径よ
り0.]、mm以1ユ大きく形成するとともに、中間に
配置される金属板の穴径を円筒ピンの径、より最大限0
.1+ηm大きく形成し、
かつ、他の2箇所以1−の組合わせについて、積層成形
時に1−下側側に配置される2枚の金属板の穴径を円筒
ピンの径より最大限0.1mm大きく形成するとともに
、中間に配置される金属板の穴径を円筒ピンの径より0
.1mm以1−大きく形成したことを特徴とする。(Means for Solving the Problems) In order to achieve the object stated in -1-, the present invention provides four or more points.
A circuit wiring board consisting of three or more metal plates with alignment holes provided therein, and a cylindrical pin for alignment that penetrates each of the alignment holes, and at the same time two or more metal plates (1). In a lamination jig for circuit boards used when stacking with pin alignment, among the combinations of four or more cylindrical positioning pins and holes in the metal plate at four or more locations,
For combinations of two or more locations, during lamination molding, -1- the hole diameter of the two metal plates placed on the lower side should be set by 0. ], the diameter of the hole in the metal plate placed in the middle is made larger than the diameter of the cylindrical pin by 0 mm or more.
.. 1+ηm larger than the diameter of the cylindrical pin, and for the other two or more combinations of 1-, the hole diameter of the two metal plates placed on the lower side of 1- during lamination molding should be at most 0.1 mm larger than the diameter of the cylindrical pin. The hole diameter of the metal plate placed in the middle is made larger than the diameter of the cylindrical pin.
.. It is characterized in that it is formed larger by 1 mm or more.
本発明による回路基板用積層治具は、3枚以上の金属板
のうち!−1下板、中間板および被積層+4に設けた各
々の穴と基準ピンとのf)ア置合わせ1′4合を行なう
治具である。不治具は最低2種類のピン貰合部を何し、
その1つは被積層利と1−1下板を位置合わせするもの
であり、曲の1つは被積層刊と中間板を位置合わせする
ものである。The lamination jig for circuit boards according to the present invention is one of three or more metal plates! -1 This is a jig for performing the alignment 1'4 of the holes provided in the lower plate, the intermediate plate, and the laminated +4 with the reference pins. What kind of fixture should be used for at least two types of pin receiving parts?
One of them is to align the laminated paper and the 1-1 lower plate, and one of the songs is to align the laminated plate and the middle plate.
すなわち、不発明治具の少なくとも2箇所には上、下板
と被積層+4料の穴径を、基準ピン径と位置合わせする
のに1・分な大きさとなるように形成し、この部分の中
間板の穴は、貫合する基準ピン径より相当世人きい寸法
をr了する逃げ穴とする。In other words, holes in the upper and lower plates and the laminated +4 material are formed in at least two places on the non-inventive jig so that the hole diameter is 1 mm to align with the reference pin diameter, and the holes in the middle of these parts are The hole in the plate should be an escape hole with a size considerably larger than the diameter of the standard pin to be inserted.
もう2箇所以!、には、中間板と被積層+4料の穴径を
、基準ピン径と位置合わせするのに1°分な大きさとな
るように形成し、この部分の1−1下板の穴は、貫合す
る基準ピン径より相当世人きい一=J法の逃げ穴とする
。Two more places! , the diameter of the hole in the intermediate plate and the material to be laminated +4 is formed to be 1° to align with the diameter of the reference pin, and the hole in the 1-1 lower plate in this part is made with a through hole. It is assumed that the standard pin diameter is considerably larger than the diameter of the matching standard pin = the escape hole of the J method.
(作用)
被積層Hである回路基板を積層成形するため、本発明の
回路基板用積層治具を用いるときは、3枚以1“−の金
属板のうち下板に基準ピンを立て、このピンに被積層イ
1.中間板の穴を貫合しながら積み−1,げていく。こ
の際、本発明では積層成形時において中間板のイ1“f
置ずれを防1にするため、被積層利と中間板間の位置合
わせを確実に行なうのに1分な穴径と基準ピン径の貫合
部を有する。(Function) When using the circuit board lamination jig of the present invention in order to laminate and mold a circuit board to be laminated H, a reference pin is placed on the lower plate of three or more 1"- The pin is stacked on the pin while passing through the hole in the intermediate plate. At this time, in the present invention, the pin is
In order to prevent misalignment by 1, there is a hole diameter and a reference pin diameter through which the hole diameter is 1 minute to ensure the alignment between the laminated plate and the intermediate plate.
また、被積層十A、−1−1下板の位置合わせを行なう
のに1分な穴径と基準ピン径の貫合部をも(1する。こ
のため、間接的にり、下板と中間板の双方が確実に(1
゛L置合わせされる。Also, in order to align the lower plate of the laminated 10A, -1-1, the hole diameter and the reference pin diameter are connected by (1).For this reason, the lower plate and Make sure that both sides of the intermediate plate (1
゛L aligned.
その結果、積層成形時点て前述のような中間板か位置ず
れを起こすことがない。したがって、加熱加圧時にも熱
膨脹による伸び方向に制限を受けないため、基板内各層
で位置ずれのない積層作業が保証される。As a result, the above-mentioned positional displacement of the intermediate plate does not occur during lamination molding. Therefore, even during heating and pressurization, there is no restriction on the elongation direction due to thermal expansion, so that lamination work without misalignment of each layer within the substrate is guaranteed.
(実施例) 以下に本発明の一実施例を図面により詳細に説明する。(Example) An embodiment of the present invention will be described in detail below with reference to the drawings.
第1図は本発明の回路基板用積層治具を用いて、被積層
利を+16成したものを示す主面図、第2図は第1−図
のA−B線断面図である。FIG. 1 is a main plan view showing a laminated layer having a thickness of +16 using the circuit board lamination jig of the present invention, and FIG. 2 is a sectional view taken along the line A-B in FIG. 1.
この両図において、]は−1−9下板、2は中間板、7
は基準ピンであり、これら王者は本発明に係わる回路基
板用積層治具の構成部品である。この積層治具は、同時
に2枚以1゛、の多層プリント配線基板をピン位置合わ
ぜ方式て積層する際に用いられる治具である。In both figures, ] is -1-9 lower plate, 2 is middle plate, 7
are reference pins, and these kings are constituent parts of the circuit board lamination jig according to the present invention. This lamination jig is a jig used when laminating two or more multilayer printed wiring boards at the same time with pin alignment.
3.6は−1−1下板1−および中間板2に設けられた
位置合わせ用の基準穴であり、その穴径は基準ピン7の
径より若十大きく、その差が最大限0゜1mmとなるよ
うに形成され、接着シー1・(未硬化基板H料)って接
着した被積層回路基板8の利料層間における所望の位置
精度を確保できる大きさの穴径に設定されている。また
、4,5は、同じ<−1−、下板1および中間板2に設
けられた逃げ穴で、その径は基準ピン1の径より相当量
大きく作られ、積層成形時に温度差等によって起こる中
間板2.1−2下板1間の寸法差により基準ピン位置が
移動しても、被積層回路基板8が接触して移動すること
を用害しないだけの大きさの穴径に設定されている。こ
れにより、熱膨脹によって中間板2の位置ずれが防止さ
れている。3.6 is a reference hole for positioning provided in the -1-1 lower plate 1- and the intermediate plate 2, and the hole diameter is about 10 times larger than the diameter of the reference pin 7, and the difference is 0° at most. The diameter of the hole is set to be 1 mm, and the diameter of the hole is set to be large enough to ensure the desired positional accuracy between the layers of the laminated circuit board 8 bonded to the adhesive sheet 1 (uncured substrate H material). . In addition, 4 and 5 are escape holes provided in the lower plate 1 and the intermediate plate 2, and the diameter thereof is made considerably larger than the diameter of the reference pin 1. Even if the reference pin position moves due to the dimensional difference between the intermediate plate 2.1 and the lower plate 1, the hole diameter is set to be large enough to prevent the laminated circuit board 8 from touching and moving. has been done. This prevents the intermediate plate 2 from shifting due to thermal expansion.
第3図は、回路基板用積層治具の部品である中間板2の
+4質を、必要により上、下板1の制置と異ならせた例
を示すもので、第2図と同様に1−4下板1、中間板2
にはそれぞれ基準穴3,6および逃げ穴4.6か形成さ
れている。このように1−1下板1と中間板2とて互い
に利質が違う場合には、積層成形時に基板内各層間に温
度差がなくても、単に温度−1−昇しただけでも材料の
熱膨張係数の違いにより、基板内各層間に大きな・」°
性差が生じることがある。しかし、この例では位置合わ
せ精度を低下させることなく、前記実施例と同様に温度
差による寸法差を吸収除去できる効果がある。Figure 3 shows an example in which the +4 quality of the intermediate plate 2, which is a component of a laminating jig for circuit boards, is different from the position of the upper and lower plates 1, as in Figure 2. -4 Lower plate 1, middle plate 2
Reference holes 3, 6 and relief holes 4.6 are formed in each of the holes. In this way, when the lower plate 1 and the intermediate plate 2 of 1-1 have different properties, even if there is no temperature difference between each layer in the substrate during lamination molding, even if the temperature is simply increased by -1, the material will deteriorate. Due to differences in thermal expansion coefficients, there is a large amount of space between each layer within the board.
Gender differences may occur. However, this example has the effect of absorbing and removing dimensional differences due to temperature differences, as in the previous embodiment, without reducing alignment accuracy.
(発明の効果)
以1−説明したように、本発明の回路基板用積層治具に
よれば、積層成形中の温度差もしくは治具利質の違いな
どによって熱膨脹収縮差に起因して平面内に寸法差が生
じても、このζ」状差による被積層祠の相対ずれを防止
し、従来に比べ位置合オ)せ精度をn1させることがで
きる。(Effects of the Invention) As described in 1-1 above, according to the lamination jig for circuit boards of the present invention, in-plane damage occurs due to differences in thermal expansion and contraction due to temperature differences during lamination molding or differences in jig quality. Even if a dimensional difference occurs, relative displacement of the stacked shrines due to this ζ-shaped difference can be prevented, and the positioning accuracy can be improved to n1 compared to the conventional method.
また、なんらかの理由てオ]質の異なるh¥層治具を組
合わせて使用する場合であっても、被積層祠の層間位置
ずれを有効に防止できるため、′高い位置合わせ精度の
回路基板を積層成形することができるという効果を−f
rする。Furthermore, even if layer jigs of different quality are used in combination for some reason, it is possible to effectively prevent misalignment between the layers of the layer to be laminated. The effect of being able to perform laminated molding is -f
r.
第1−図は本発明の回路基板用積層治具を使用して被積
層H料を積層成形した構成体を示す下面図、第2図は第
1図のA−B線断面図、第3図は中間板の利質が上、下
板と異なる例を示す断面図である。
]・・・−1−、下板
2・・・中間板
3.6・・基準穴
4.5・・・逃げ穴
7・・・基準ピン
= 10−
8・・・(被)積層回路基板Figure 1 is a bottom view showing a structure obtained by laminating H materials to be laminated using the circuit board lamination jig of the present invention, Figure 2 is a sectional view taken along the line A-B in Figure 1, and Figure 3 The figure is a sectional view showing an example in which the thickness of the intermediate plate is different from that of the upper and lower plates. ]...-1-, Lower plate 2... Intermediate plate 3.6... Reference hole 4.5... Relief hole 7... Reference pin = 10- 8... (Covered) Laminated circuit board
Claims (1)
金属板と、前記各位置合わせ穴に貫合する位置合わせ用
円筒ピンよりなり、同時に2枚以上の多層プリント回路
配線基板をピン位置合わせして積層する際に用いられる
回路基板用積層治具において、 上記位置合わせ用円筒ピンと金属板の穴との4箇所以上
の組合わせのうち、2箇所以上の組合わせについて、積
層成形時に上下両側に配置される2枚の金属板の穴径を
円筒ピンの径より0.1mm以上大きく形成するととも
に、中間に配置される金属板の穴径を円筒ピンの径より
最大限0.1mm大きく形成し、 かつ、他の2箇所以上の組合わせについて、積層成形時
に上下両側に配置される2枚の金属板の穴径を円筒ピン
の径より最大限0.1mm大きく形成するとともに、中
間に配置される金属板の穴径を円筒ピンの径より0.1
mm以上大きく形成したことを特徴とする回路基板用積
層治具。1. Consists of three or more metal plates with alignment holes in four or more locations, and a cylindrical alignment pin that penetrates each of the alignment holes, and pins two or more multilayer printed circuit wiring boards at the same time. In the lamination jig for circuit boards used when aligning and laminating, two or more of the four or more combinations of the alignment cylindrical pin and the hole in the metal plate are used during lamination molding. The hole diameter of the two metal plates placed on both the upper and lower sides is formed to be at least 0.1 mm larger than the diameter of the cylindrical pin, and the hole diameter of the metal plate placed in the middle is made to be at most 0.1 mm larger than the diameter of the cylindrical pin. For other combinations of two or more locations, the hole diameters of the two metal plates placed on both the upper and lower sides during laminated molding are formed to be at most 0.1 mm larger than the diameter of the cylindrical pin. The hole diameter of the metal plate placed in is 0.1 smaller than the diameter of the cylindrical pin.
A laminating jig for a circuit board, characterized in that it is formed larger than mm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2339357A JPH04206997A (en) | 1990-11-30 | 1990-11-30 | Circuit board layering tool |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2339357A JPH04206997A (en) | 1990-11-30 | 1990-11-30 | Circuit board layering tool |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04206997A true JPH04206997A (en) | 1992-07-28 |
Family
ID=18326701
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2339357A Pending JPH04206997A (en) | 1990-11-30 | 1990-11-30 | Circuit board layering tool |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04206997A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6560844B1 (en) * | 2000-02-24 | 2003-05-13 | Honeywell International Inc. | Alignment plate with matched thermal coefficient of expansion |
| WO2012073935A1 (en) * | 2010-12-03 | 2012-06-07 | シャープ株式会社 | Rear surface electrode-type solar battery cell, solar battery module, solar battery wafer, and solar battery module production method |
| CN103732013A (en) * | 2013-12-17 | 2014-04-16 | 广州杰赛科技股份有限公司 | Pressing method and device of multi-layer plate |
-
1990
- 1990-11-30 JP JP2339357A patent/JPH04206997A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6560844B1 (en) * | 2000-02-24 | 2003-05-13 | Honeywell International Inc. | Alignment plate with matched thermal coefficient of expansion |
| WO2012073935A1 (en) * | 2010-12-03 | 2012-06-07 | シャープ株式会社 | Rear surface electrode-type solar battery cell, solar battery module, solar battery wafer, and solar battery module production method |
| JP2012119602A (en) * | 2010-12-03 | 2012-06-21 | Sharp Corp | Back electrode type solar cell, solar cell module, solar cell wafer and method of manufacturing solar cell module |
| CN103732013A (en) * | 2013-12-17 | 2014-04-16 | 广州杰赛科技股份有限公司 | Pressing method and device of multi-layer plate |
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