JPH042140A - Pattern comparing inspector - Google Patents

Pattern comparing inspector

Info

Publication number
JPH042140A
JPH042140A JP10338490A JP10338490A JPH042140A JP H042140 A JPH042140 A JP H042140A JP 10338490 A JP10338490 A JP 10338490A JP 10338490 A JP10338490 A JP 10338490A JP H042140 A JPH042140 A JP H042140A
Authority
JP
Japan
Prior art keywords
pattern
chip
imaging
wafer
fed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10338490A
Other languages
Japanese (ja)
Inventor
Toshiaki Yokouchi
横内 俊昭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP10338490A priority Critical patent/JPH042140A/en
Publication of JPH042140A publication Critical patent/JPH042140A/en
Pending legal-status Critical Current

Links

Landscapes

  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE:To enable the pattern comparing inspector of an arbitrary chip on a wafer with no restrictions in the mechanical movable range of two optical systems by imaging different chips through one optical systems one after another to a wafer made up of a substrate with a plurality of the same patterns and by comparing different chip patterns. CONSTITUTION:While a stage is transferred, the imaging signal of the first chip subjected to comparing inspection is fed from a pattern imaging controller 4 to a pattern imaging recorder 5 and recorded. Further, the stage is transferred to the second chip subjected to comparing inspection, and the imaging signal of the second chip is fed to the pattern imaging controller 4 while the stage is transferred as in the case of the first chip. The imaging signal of the second chip is fed from the pattern imaging controller 4 to a defect detection controller 6 by correction of gain, and the imaging signal of the first chip is fed to the defect detection controller 6. The signals of two chip patterns fed from the defect detection controller 6 are compared and fed to a CPU 7 by detection of defects from comparing inspection with independent defect detection circuits for vertical pattern, lateral pattern, oblique pattern, and corners.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は半導体装置のウェハにおけるパターン比較検査
装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a pattern comparison inspection device for wafers of semiconductor devices.

[従来の技術] 従来のパターン比較検査装置は、第2図に示すように、
光源9より発光された赤外光を光フアイバーケーブルを
介して発光部光学系1へと送られる。発光部光学系1は
ウェハの下に配置され、片方の光学系は固定されもう一
方の光学系は検査するウェハのチップサイズに合わせて
X方向に可動8来る構成とする。発光部光学系1を通っ
た赤外光はざらにウェハ8を透過し受光部光学系2には
いる。受光部光学系2はウェハ8の上に配置され、発光
部光学系1と同様に片方の光学系は固定されもう一方の
光学系は検査するウェハ8のチップサイズに合わせて、
X方向に可動出来る構成とする。
[Prior Art] As shown in FIG. 2, a conventional pattern comparison inspection device
Infrared light emitted from a light source 9 is sent to the light emitting unit optical system 1 via an optical fiber cable. The light emitting unit optical system 1 is arranged under the wafer, and one optical system is fixed and the other optical system is movable in the X direction according to the chip size of the wafer to be inspected. The infrared light that has passed through the light emitting optical system 1 roughly passes through the wafer 8 and enters the light receiving optical system 2. The light-receiving optical system 2 is arranged on the wafer 8, and similarly to the light-emitting optical system 1, one optical system is fixed, and the other optical system is set according to the chip size of the wafer 8 to be inspected.
It is configured to be movable in the X direction.

2つの受光部光学系2を通った赤外光を各々のCCDイ
メージセンサ−3で受光し、ウェハを透過した赤外光を
光電変換してウェハパターンの撮像信号とする。撮像信
号はCCDイメージセンサ−3からパターン撮像制御部
4に送られ各々の撮像信号のゲインを補正する。2つの
パターン撮像制御部4からの信号を欠陥検出制御部6へ
送り、ウェハ内のチップパターン同士を比較検査し欠陥
検出したデータをCPU7へ送る。CPtJ7は装置を
制御すると共に、欠陥検出制御部6の欠陥情報として欠
陥の個数と各々の欠陥のX、Yの座標を記録する。
The infrared light that has passed through the two light receiving optical systems 2 is received by each CCD image sensor 3, and the infrared light that has passed through the wafer is photoelectrically converted into an imaging signal of the wafer pattern. The imaging signals are sent from the CCD image sensor 3 to the pattern imaging control section 4, and the gain of each imaging signal is corrected. Signals from the two pattern imaging control sections 4 are sent to the defect detection control section 6, chip patterns within the wafer are compared and inspected, and defect detection data is sent to the CPU 7. The CPtJ7 controls the device and records the number of defects and the X and Y coordinates of each defect as defect information for the defect detection control section 6.

[発明が解決しようとする課題] しかし、従来の技術では2つの光学系の機械的な可動範
囲の制限を受け、ウェハ上の任意のチップのパターン比
較検査が出来ないという問題点を有していた。そこで本
発明はこのような問題点を解決するもので、その目的と
するところはウェハ上の任意のチップのパターン比較検
査が可能なパターン比較検査装置を提供する。
[Problems to be Solved by the Invention] However, the conventional technology has the problem that it is not possible to perform pattern comparison inspection of arbitrary chips on a wafer due to limitations in the mechanical movable range of the two optical systems. Ta. SUMMARY OF THE INVENTION The present invention is intended to solve these problems, and its purpose is to provide a pattern comparison inspection apparatus capable of pattern comparison inspection of any chip on a wafer.

[課題を解決するための手段〕 本発明のパターン比較検査装置は、ウェハに赤外光を照
射する光学系と、前記光学系による透過パターン光を光
電変換し、CCDイメージセンサ−からなる検出系と、
前記検出系からのパターン撮像信号を制御するパターン
撮像制御部と、前記パターン撮像制御部の出力を記録す
るパターン撮像記録部との異なるチップパターンのデー
タと比較する欠陥検出制御部と装置全体を制御するとと
もに前記欠陥検出制御部の欠陥の情報を記録する中央処
理装置とからなり、1基板に複数個の同一パターンが形
成されたウェハに対し1つの光学系で異なるチップを順
次撮像し、異なるチップパターン同士を比較検査するこ
とを特徴とするパターン比較検査装置。
[Means for Solving the Problems] The pattern comparison inspection device of the present invention includes an optical system that irradiates a wafer with infrared light, and a detection system that photoelectrically converts the transmitted pattern light from the optical system and includes a CCD image sensor. and,
A pattern imaging control unit that controls pattern imaging signals from the detection system; a pattern imaging recording unit that records the output of the pattern imaging control unit; a defect detection control unit that compares data of different chip patterns; and a defect detection control unit that controls the entire device. It also includes a central processing unit that records defect information of the defect detection control unit, and sequentially images different chips using one optical system on a wafer on which multiple identical patterns are formed on one substrate, and detects different chips. A pattern comparison inspection device that compares and inspects patterns.

[実施例] 第1図は本発明の実施例における構成図であって、光源
9より発光された赤外光を光フアイバーケーブルを介し
て発光部光学系1へと送られる。
[Embodiment] FIG. 1 is a block diagram of an embodiment of the present invention, in which infrared light emitted from a light source 9 is sent to a light emitting unit optical system 1 via an optical fiber cable.

発光部光学系1はウェハの下に配置され、赤外光はウェ
ハ8に向かって照射しウェハ8の高融点金属やアルミニ
ウム(AL)等のウェハパターン以外の部分を透過し受
光部光学系2にはいる。受光部光学系2は、発光部光学
系1がらの赤外光を受光するために光軸を合わせた位置
のウェハ8の上に配置する。受光部光学系2を通った赤
外光をCCDイメージセンサ−3で受光し、ウェハを透
過した赤外光を光電変換してウェハパターンの撮像信号
とする。撮像信号はCCDイメージセンサ−3からパタ
ーン撮像制御部4に送られf!偉倍信号ゲインを補正す
る。ステージを移動しながら比較検査する対象の1つ目
のチップの撮像信号をパターン撮像制御部4からパター
ン撮像記録部5へ送り記録する。さらに比較検査する対
象の2つ目のチップにステージを移動し1つ目のチップ
と同様にステージを移動しながら2つ目のチップの撮像
信号をパターン撮像制御部4へ送る。2つ目のチップの
撮像信号をパターン撮像制御部4がらゲインを補正して
欠陥検出制御部6へ送り、1つ目のチップの撮像信号も
欠陥検出制御部6へ送る。欠陥検出制御部6に送られた
2つのチップパターン同士の信号を比較し、縦パターン
、横パターン、斜めパターン、コーナ一部等の各々独立
した欠陥検出回路で比較検蚕することにより欠陥を検出
しCPU7へ送られる。CPU7は装置を制御するとと
もに、欠陥検出制御部6の欠陥の情報として欠陥の個数
と各々の欠陥のX、  Yの座標を記録する。
The light emitting optical system 1 is arranged under the wafer, and the infrared light is irradiated toward the wafer 8 and transmitted through the parts of the wafer 8 other than the wafer pattern, such as high melting point metals and aluminum (AL), and then the infrared light is transmitted to the light receiving optical system 2. Enter. The light receiving optical system 2 is placed on the wafer 8 at a position where the optical axes are aligned in order to receive the infrared light from the light emitting optical system 1. The infrared light that has passed through the light receiving optical system 2 is received by the CCD image sensor 3, and the infrared light that has passed through the wafer is photoelectrically converted into an imaging signal of the wafer pattern. The imaging signal is sent from the CCD image sensor 3 to the pattern imaging control section 4, and f! Correct the signal gain. While moving the stage, the imaging signal of the first chip to be comparatively inspected is sent from the pattern imaging control section 4 to the pattern imaging recording section 5 and recorded. Furthermore, the stage is moved to the second chip to be compared and inspected, and the imaging signal of the second chip is sent to the pattern imaging control section 4 while moving the stage in the same manner as for the first chip. The pattern imaging control section 4 corrects the gain of the imaging signal of the second chip and sends it to the defect detection control section 6, and also sends the imaging signal of the first chip to the defect detection control section 6. Defects are detected by comparing the signals between the two chip patterns sent to the defect detection control unit 6 and performing comparative inspection using independent defect detection circuits for each of vertical patterns, horizontal patterns, diagonal patterns, corner parts, etc. and is sent to the CPU 7. The CPU 7 controls the apparatus and records the number of defects and the X and Y coordinates of each defect as defect information for the defect detection control section 6.

[発明の効果コ 以上述べたような発明によれば、ウェハ上の高融点金属
やAL等のパターンの欠陥検査において、2つの光学系
の機械的な可動範囲の制限を受けることなくウェハ上の
任意のチップのパターン比較検査が可能となる効果があ
る。
[Effects of the Invention] According to the invention described above, in defect inspection of patterns of high-melting point metals, AL, etc. on a wafer, it is possible to detect defects on the wafer without being limited in the mechanical movable range of the two optical systems. This has the effect of enabling pattern comparison inspection of any chip.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明のパターン欠陥検査装置の実施例を示す
構成図。 第2図は従来のパターン欠陥検査装置を示す構成図。 発光部光学系 受光部光学系 CODイメージセンサ− パターン撮像制御部 パターン撮像記録部 欠陥検出制御部 PU ウェハ 光源 以上 出願人 セイコーエプソン株式会社 代理人弁理士 鈴木喜三部(化1名) 1X1
FIG. 1 is a configuration diagram showing an embodiment of a pattern defect inspection apparatus of the present invention. FIG. 2 is a configuration diagram showing a conventional pattern defect inspection device. Emitter Optical System Light Receiver Optical System COD Image Sensor Pattern Imaging Control Unit Pattern Imaging Recording Unit Defect Detection Control Unit PU Wafer Light Source and More Applicant Seiko Epson Corporation Representative Patent Attorney Kizobe Suzuki (1 person in chemical engineering) 1X1

Claims (1)

【特許請求の範囲】[Claims]  ウェハに赤外光を照射する光学系と、前記光学系によ
る透過パターン光を光電変換し、CCDイメージセンサ
ーからなる検出系と、前記検出系からのパターン撮像信
号を制御するパターン撮像制御部と、前記パターン撮像
制御部の出力を記録するパターン撮像記録部との異なる
チップパターンのデータと比較する欠陥検出制御部と装
置全体を制御するとともに前記欠陥検出制御部の欠陥の
情報を記録する中央処理装置とからなり、1基板に複数
個の同一パターンが形成されたウェハに対し1つの光学
系で異なるチップを順次撮像し、異なるチップパターン
同士を比較検査することを特徴とするパターン比較検査
装置。
an optical system that irradiates the wafer with infrared light; a detection system that photoelectrically converts the pattern light transmitted by the optical system and includes a CCD image sensor; and a pattern imaging control unit that controls pattern imaging signals from the detection system. a pattern imaging recording section that records the output of the pattern imaging control section; a defect detection control section that compares data of different chip patterns; and a central processing unit that controls the entire device and records defect information of the defect detection control section. A pattern comparison inspection apparatus comprising: a wafer having a plurality of identical patterns formed on one substrate; a single optical system sequentially images different chips; and compares and inspects different chip patterns.
JP10338490A 1990-04-19 1990-04-19 Pattern comparing inspector Pending JPH042140A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10338490A JPH042140A (en) 1990-04-19 1990-04-19 Pattern comparing inspector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10338490A JPH042140A (en) 1990-04-19 1990-04-19 Pattern comparing inspector

Publications (1)

Publication Number Publication Date
JPH042140A true JPH042140A (en) 1992-01-07

Family

ID=14352587

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10338490A Pending JPH042140A (en) 1990-04-19 1990-04-19 Pattern comparing inspector

Country Status (1)

Country Link
JP (1) JPH042140A (en)

Similar Documents

Publication Publication Date Title
US10438340B2 (en) Automatic optical inspection system and operating method thereof
JP3826849B2 (en) Defect inspection method and defect inspection apparatus
KR101716817B1 (en) Image creation method, substrate inspection method, storage medium for storing program for executing image creation method and substrate inspection method, and substrate inspection apparatus
KR20180103701A (en) Die bonding device and method of manufacturing semiconductor device
US20250076212A1 (en) Multidirectional illumination for hybrid bonding defect detection
JP2010122145A (en) Silicon wafer defect inspection device
US6477265B1 (en) System to position defect location on production wafers
JPH042140A (en) Pattern comparing inspector
JPH03256341A (en) Pattern inspection device by comparison
JPH0438850A (en) Pattern comparison inspection device
JP3789525B2 (en) Semiconductor defect inspection system
JPH0887101A (en) Inspection device for mask
JPS62276443A (en) Automatic hole error inspection machine
JP3827812B2 (en) Surface defect inspection apparatus and surface defect inspection method
JPH04236447A (en) Scribing line detection apparatus
JPH04316346A (en) Pattern recognition method
JP2720935B2 (en) Inspection device and inspection method
JPH0582628A (en) Apparatus and method for detecting orientation flat
JPS6061604A (en) Pattern inspecting apparatus
JPH071776B2 (en) Pattern inspection equipment
JP2701872B2 (en) Surface inspection system
JPS61264204A (en) Detector for height of parts
JPH04307677A (en) Detection system for pad center point and chip reference point
JPS6195540A (en) Inspecting apparatus of external appearance
JPH0685016A (en) Semiconductor chip inspection equipment