JPH0422340B2 - - Google Patents

Info

Publication number
JPH0422340B2
JPH0422340B2 JP59204729A JP20472984A JPH0422340B2 JP H0422340 B2 JPH0422340 B2 JP H0422340B2 JP 59204729 A JP59204729 A JP 59204729A JP 20472984 A JP20472984 A JP 20472984A JP H0422340 B2 JPH0422340 B2 JP H0422340B2
Authority
JP
Japan
Prior art keywords
lead frame
oxide film
heat sink
exposed portion
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59204729A
Other languages
Japanese (ja)
Other versions
JPS6182452A (en
Inventor
Kazuhito Horikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kansai Nippon Electric Co Ltd
Original Assignee
Kansai Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kansai Nippon Electric Co Ltd filed Critical Kansai Nippon Electric Co Ltd
Priority to JP59204729A priority Critical patent/JPS6182452A/en
Publication of JPS6182452A publication Critical patent/JPS6182452A/en
Publication of JPH0422340B2 publication Critical patent/JPH0422340B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/04Manufacture or treatment of leadframes
    • H10W70/045Cleaning
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/0198Manufacture or treatment batch processes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Description

【発明の詳細な説明】 産業上の利用分野 この発明は樹脂モールド型半導体装置などのリ
ードフレームを使つて製造される電子部品の製造
方法に関する。
DETAILED DESCRIPTION OF THE INVENTION FIELD OF INDUSTRIAL APPLICATION This invention relates to a method for manufacturing electronic components such as resin molded semiconductor devices that are manufactured using lead frames.

従来の技術 トランジスタ等の樹脂モールド型半導体装置は
リードフレームを使つて複数個が一括して製造さ
れ、その製造工程は次の〔A〕〜〔F〕が一般的
である。
2. Description of the Related Art A plurality of resin molded semiconductor devices such as transistors are manufactured at once using a lead frame, and the following manufacturing steps [A] to [F] are generally used.

〔A〕 リードフレーム主要部に半導体ペレツトを
マウントする工程、 〔B〕 マウントされた半導体ペレツトとリードフ
レームのリードとに金属細線をボンデイングす
る工程、 〔C〕 リードフレームの半導体ペレツトを含む主
要部を樹脂材で被覆外装してから高温保管する
工程、 〔D〕 リードフレームを半導体装置毎に切断分離
する工程、 〔E〕 個々の半導体装置の外観を検査する工程、 〔F〕 外観良品の個々の半導体装置毎に特性検査
する工程。
[A] Step of mounting the semiconductor pellet on the main part of the lead frame, [B] Step of bonding a thin metal wire to the mounted semiconductor pellet and the leads of the lead frame, [C] Mounting the main part of the lead frame including the semiconductor pellet. [D] Process of cutting and separating the lead frame into individual semiconductor devices; [E] Process of inspecting the external appearance of each semiconductor device; [F] Inspection of individual semiconductor devices with good appearance. A process of testing the characteristics of each semiconductor device.

上記製造工程の具体例を第3図乃至第7図を参
照して説明すると次の通りである。
A specific example of the above manufacturing process will be described below with reference to FIGS. 3 to 7.

例えば先ず第3図及び第4図に示すリードフレ
ーム1を用意する。これは3本一組のリード2,
2…を複数組、タイバ3,3…で一連に連結し、
各組のリード2,2…の中央の1本を先端に1つ
の放熱板4,4…を一体に連結したものであり、
各放熱板4,4…はタイバ5,5…にて一連に連
結されている。次に第5図及び第6図に示すよう
に各放熱板4,4…上のペレツトマウント位置に
半導体ペレツト6,6…をマウントしてから、そ
の各々の表面電極とリード2,2…の各組の両側
の2本の先端部とを金属細線7,7…で接続し、
而る後放熱板4,4…の裏面を露出させて半導体
ペレツト6,6…を含む主要部に外装樹脂材8,
8…にてモールド成形する。次にリードフレーム
1よりタイバ3,3…,5,5…を切断除去して
第7図に示す樹脂モールド型半導体装置9を得
て、外観検査、特性検査の各工程に送り、良品の
みが出荷される。
For example, first, the lead frame 1 shown in FIGS. 3 and 4 is prepared. This is a set of three leads 2,
Multiple sets of 2... are connected in series with tie bars 3, 3...,
Each set of leads 2, 2... has one central lead connected to one heat dissipation plate 4, 4... at the tip,
The heat sinks 4, 4, . . . are connected in series by tie bars 5, 5, . Next, as shown in FIGS. 5 and 6, semiconductor pellets 6, 6... are mounted at the pellet mounting positions on each of the heat sinks 4, 4..., and then the respective surface electrodes and leads 2, 2... Connect the two tips on both sides of each set with thin metal wires 7, 7...
After that, the back surfaces of the heat sinks 4, 4... are exposed, and the main parts including the semiconductor pellets 6, 6... are covered with exterior resin material 8,
8. Mold the product in step 8. Next, the tie bars 3, 3, . . . , 5, 5, . . . are cut and removed from the lead frame 1 to obtain the resin molded semiconductor device 9 shown in FIG. Will be shipped.

発明が解決しようとする問題点 ところで、上記のような放熱板を含むリードフ
レームは熱伝導性の良好な鋼板を打抜き成形した
ものが一般的であるが、このようなリードフレー
ムはペレツトマウント工程などで加熱されると酸
化するので、予め金メツキやニツケルメツキをし
てリードフレームの酸化防止や外観劣化防止を図
ることが行われている。しかし、これではリード
フレームに金メツキ、ニツケルメツキを施す工程
が必要でリードフレームがコスト高となる問題が
あり、そこで最近はメツキ処理を行わずにリード
フレームをペレツトマウント工程等に送つて製造
する傾向になつている。
Problems to be Solved by the Invention Incidentally, lead frames including the above-mentioned heat dissipation plate are generally stamped and formed from a steel plate with good thermal conductivity, but such lead frames cannot be processed through the pellet mounting process. Since the lead frame oxidizes when heated, gold plating or nickel plating is applied in advance to prevent oxidation and deterioration of the appearance of the lead frame. However, this requires the process of applying gold plating or nickel plating to the lead frame, which increases the cost of the lead frame.Therefore, recently, the lead frame is manufactured by sending it to a pellet mounting process etc. without plating. It's becoming a trend.

酸化防止のメツキ処理をしないリードフレーム
を使つた製造方法として、例えばペレツトマウン
ト工程ではリードフレームのペレツトマウント位
置を半導体ペレツトをマウントする直前に水素ト
ーチで焼いて酸化膜を還元除去することや、金属
細線のボンデイング工程ではリード上の酸化膜を
突き破る程度にボンデイング強度を大きくするこ
とが行われており、このようにすることによりリ
ードフレームに酸化防止のメツキ処理をしなくて
も十分に信頼性の良い半導体装置が得られること
が分かつている。ところが、酸化防止のメツキ処
理をしないリードフレームを使つて製造した半導
体装置においては金属の露呈部分が不均一に形成
されるためこの半導体装置を外部放熱器に取り付
けても放熱性がばらつく上、放熱器に取り付けず
に使用する場合には酸化膜で外観が悪くなること
があつた。例えば第7図の半導体装置9におい
て、外装樹脂材8から突出するリード2は後で半
田メツキされるので外観が悪くなることは無い
が、放熱板4の露呈部分にできる酸化膜はペレツ
トマウント時の部分的な加熱などによつて斑が多
く、特に放熱板4の裏面は各製造工程での搬送時
にレールに擦れて擦り傷などができてこの裏面で
の酸化膜の斑が目立ち、外観を悪くして後の外観
検査で不良品と判定される大きな要因となつてい
た。
For example, in the pellet mounting process, the lead frame's pellet mounting position may be burned with a hydrogen torch to reduce and remove the oxide film immediately before mounting the semiconductor pellet. In the bonding process for thin metal wires, the bonding strength is increased to the extent that it breaks through the oxide film on the lead, and by doing this, the lead frame can be made sufficiently reliable without having to be plated to prevent oxidation. It is known that a semiconductor device with good performance can be obtained. However, in semiconductor devices manufactured using lead frames that are not plated to prevent oxidation, the exposed metal parts are formed unevenly, so even if the semiconductor device is attached to an external heat sink, the heat dissipation performance will vary and the heat dissipation will be poor. When used without being attached to a container, the oxide film sometimes caused a poor appearance. For example, in the semiconductor device 9 shown in FIG. 7, the leads 2 protruding from the exterior resin material 8 will be soldered later, so the appearance will not deteriorate; There are many spots due to local heating during the manufacturing process, and in particular, the back side of the heat sink 4 is rubbed against the rail during transportation in each manufacturing process, causing scratches and other scratches. At worst, this was a major factor in the product being determined to be defective during a subsequent visual inspection.

問題点を解決するための手段 本発明は上記問題点を鑑みて提案されたもの
で、リードフレーム上に部品本体を固着し、リー
ドフレームを部分的に露呈させて部品本体を含む
主要部を樹脂材にて被覆した電子部品の前記リー
ドフレーム露呈部分の酸化膜を除去する工程と、
この酸化膜除去後に前記リードフレーム露呈部分
を均一に酸化させる工程とを加えることにより上
記問題点を解決したものである。
Means for Solving the Problems The present invention was proposed in view of the above-mentioned problems, and involves fixing a component body onto a lead frame, partially exposing the lead frame, and sealing the main part including the component body with resin. removing an oxide film on the exposed portion of the lead frame of the electronic component covered with the material;
The above problem is solved by adding a step of uniformly oxidizing the exposed portion of the lead frame after removing the oxide film.

作 用 上記手段によるとリードフレーム露呈部分が製
造工程時に不均一に酸化されていても、これを除
去してから後で積極的に酸化することにより酸化
膜は斑無く均一に形成され、外観が良くなる。
Effect: According to the above means, even if the exposed part of the lead frame is unevenly oxidized during the manufacturing process, by removing this and actively oxidizing it afterwards, the oxide film is formed uniformly without any spots, and the appearance is improved. Get better.

実施例 例えば第3図の放熱板付リードフレーム1が酸
化防止のメツキ処理されていないものであつて、
このリードフレーム1を使つて前述〔A〕〜
〔F〕の工程で第7図の半導体装置9を製造し出
荷する場合、本発明は〔C〕の樹脂モールド工程
と〔D〕のリードフレーム切断工程の間に次の酸
化膜除去工程及び酸化工程を追加する。
Example For example, if the lead frame 1 with a heat sink shown in FIG. 3 is not plated to prevent oxidation,
Using this lead frame 1, the above [A] ~
When manufacturing and shipping the semiconductor device 9 shown in FIG. 7 in the process [F], the present invention requires the following oxide film removal process and oxidation process between the resin molding process [C] and the lead frame cutting process [D]. Add a process.

上記酸化膜除去工程はリードフレーム1におけ
る各放熱板4,4…の露呈部分の酸化膜を除去す
る工程で、この酸化膜除去はエツチング法やサン
ドブラスト法などで行われる。この工程をエツチ
ング法で説明すると、例えば第1図に示すように
樹脂モールド工程が完了したリードフレーム1を
放熱板4,4…を下にしてホルダ10で吊下支持
しておいて、各放熱板4,4…の露呈部分をエツ
チング液11に浸漬する。エツチング液11は放
熱板露呈部の酸化膜(CuO2など)を選択的にエ
ツチング除去するものが使用される。放熱板露呈
部分での酸化膜除去が完了すると、その直ぐ後に
リードフレーム1を酸素雰囲気中に配して放熱板
露呈部分に積極的に酸化膜を形成する。例えば第
2図に示すようにリードフレーム1を酸化槽12
に入れて蓋13をして内部を酸素含有雰囲気で満
たし一定時間放置すれば、放熱板4,4…の露呈
部分は簡単、確実に均一に酸化される。放熱板
4,4…が銅板の場合は露呈部分全体が均一なエ
ビ茶色に酸化され、外観の良いものが得られる。
The oxide film removal step is a step of removing the oxide film on the exposed portions of each of the heat dissipating plates 4, 4, . To explain this process using an etching method, for example, as shown in FIG. 1, a lead frame 1 that has undergone a resin molding process is suspended and supported by a holder 10 with the heat sinks 4, 4... down, and each heat sink is The exposed portions of the plates 4, 4, . . . are immersed in an etching solution 11. The etching liquid 11 used is one that selectively etches away the oxide film (CuO 2 etc.) on the exposed portion of the heat sink. Immediately after the removal of the oxide film on the exposed portion of the heat sink is completed, the lead frame 1 is placed in an oxygen atmosphere to actively form an oxide film on the exposed portion of the heat sink. For example, as shown in FIG.
If the heat dissipation plates 4, 4, . . . are easily and reliably uniformly oxidized, the exposed portions of the heat dissipating plates 4, 4, . When the heat dissipation plates 4, 4, . . . are copper plates, the entire exposed portion is oxidized to a uniform shrimp brown color, resulting in a good appearance.

発明の効果 本発明によればリードフレームに酸化防止のメ
ツキ処理をしない低コストのものを使用しても、
均一な酸化膜で放熱板露出面が覆われるため、外
部放熱器に取付けた際に、放熱板全面が均一な熱
伝導性を持ち、放熱性が良好となる。また外観も
良好となる。
Effects of the Invention According to the present invention, even if a low-cost lead frame that is not plated to prevent oxidation is used,
Since the exposed surface of the heat sink is covered with a uniform oxide film, when attached to an external heat sink, the entire surface of the heat sink has uniform thermal conductivity, resulting in good heat dissipation. Moreover, the appearance is also good.

【図面の簡単な説明】[Brief explanation of drawings]

第1図及び第2図は本発明の方法を説明するた
めの酸化膜除去及び酸化工程での実施装置例の断
面図である。第3図乃至第7図は従来の電子部品
製造方法を説明するためのもので、第3図はリー
ドフレームの平面図、第4図は第3図のA−A線
断面図、第5図は樹脂モールド成形後のリードフ
レームの平面図、第6図は第5図のB−B線断面
図、第7図は樹脂モールド型半導体装置の斜視図
である。 1……リードフレーム、6……部品本体〔半導
体ペレツト〕、8……樹脂材、9……電子部品
〔半導体装置〕。
1 and 2 are cross-sectional views of an example of an apparatus used in the oxide film removal and oxidation steps to explain the method of the present invention. 3 to 7 are for explaining the conventional electronic component manufacturing method, in which FIG. 3 is a plan view of a lead frame, FIG. 4 is a sectional view taken along the line A-A in FIG. 3, and FIG. 6 is a plan view of the lead frame after resin molding, FIG. 6 is a sectional view taken along line BB in FIG. 5, and FIG. 7 is a perspective view of the resin molded semiconductor device. 1...Lead frame, 6...Component body [semiconductor pellet], 8...Resin material, 9...Electronic component [semiconductor device].

Claims (1)

【特許請求の範囲】[Claims] 1 リードフレーム上に部品本体を固着し、リー
ドフレームを部分的に露呈させて部品本体を含む
主要部を樹脂材にて被覆した電子部品の前記リー
ドフレーム露呈部分の酸化膜を除去する工程と、
この酸化膜除去後に前記リードフレーム露呈部分
を均一に酸化させる工程とを含むことを特徴とす
る電子部品の製造方法。
1. A step of fixing a component body on a lead frame, partially exposing the lead frame, and removing an oxide film on the exposed portion of the lead frame of an electronic component in which the main part including the component body is coated with a resin material;
A method for manufacturing an electronic component, comprising the step of uniformly oxidizing the exposed portion of the lead frame after removing the oxide film.
JP59204729A 1984-09-29 1984-09-29 Manufacture of electronic part Granted JPS6182452A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59204729A JPS6182452A (en) 1984-09-29 1984-09-29 Manufacture of electronic part

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59204729A JPS6182452A (en) 1984-09-29 1984-09-29 Manufacture of electronic part

Publications (2)

Publication Number Publication Date
JPS6182452A JPS6182452A (en) 1986-04-26
JPH0422340B2 true JPH0422340B2 (en) 1992-04-16

Family

ID=16495342

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59204729A Granted JPS6182452A (en) 1984-09-29 1984-09-29 Manufacture of electronic part

Country Status (1)

Country Link
JP (1) JPS6182452A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102015106570B4 (en) 2015-04-28 2016-12-15 AWS Schäfer Technologie GmbH Method for induction bending forming of a pressure-resistant pipe with a large wall thickness and a large diameter

Also Published As

Publication number Publication date
JPS6182452A (en) 1986-04-26

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