JPH0422367B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a semiconductor switch circuit with a small number of circuit elements. (Summary of the Invention) The present invention is equivalent to connecting the base and collector of a first transistor of a first conductivity type and a second transistor of a second conductivity type.
a semiconductor switch with a PNPN structure, third and fourth transistors of a first conductivity type, a fifth transistor of a second conductivity type, and first and second resistors;
a circuit element having a PN junction, and connecting the emitters of the third and fourth transistors, one end of the first resistor, and one end of the circuit element having the PN junction to form a first main terminal. , the second and fifth transistors and emitters are connected to one end of a second resistor to form a second main terminal, the base of the fifth transistor is used as a gate terminal, and the fifth transistor a collector and a base of a third and a fourth transistor are connected; a collector of the third transistor and a base of the second transistor;
The emitter of the first transistor and the collector of the fourth transistor are connected to the other end of the first resistor, and the base of the first transistor and the PN By connecting the other end of a circuit element having a junction, the semiconductor switch circuit has a small number of circuit elements, and when integrated, it occupies a small area on a chip. (Prior art and problems to be solved by the invention) A semiconductor switch with a PNPN four-layer structure (hereinafter abbreviated as a PNPN switch) has conventionally been used as a semiconductor element for on/off control of large current or high voltage.
is often used. FIG. 11 shows a first example of this type of conventional circuit, and in the figure, numeral 1 is a PNPN switch. As is known,
The PNPN switch is equivalently represented by PNP transistor 2 and NPN transistor 3. Further, 4, 5 and 6 are respectively the first
A main terminal, a second main terminal and a gate terminal. Further, the resistor 7 is used to prevent the switch 1 from being erroneously turned on due to the reverse saturation current of the base-collector junction of the transistor 2 or 3. To turn on switch 1, a gate drive current I _G is supplied from the outside via terminal 6. As a result, NPN transistor 3 turns from off to on,
Furthermore, this turns on PNP transistor 2 and therefore the entire switch 1,
Main current _IF flows. However, in the configuration shown in FIG. 11, even after _IG is stopped, _IF continues to flow due to a so-called self-holding operation. In order to turn switch 1 off, it is necessary to disconnect _IF by external means. FIG. 12 shows a second conventional example proposed to eliminate the above-mentioned drawbacks. In other words, switch 1
To turn off the gate drive current I _G and turn off the drive current I _O through terminal 8,
Supplied to the base of NPN transistor 9. As a result, a part of I _F that had been supplied to the base of NPN transistor 3 as the collector current of PNP transistor 2 is drawn out to negative power supply 10 through transistor 9, turning off NPN transistor 3 and Then switch 1 is turned off. FIG. 13 is a third conventional example, which is another example proposed to eliminate the drawbacks of FIG. 11.
That is, to turn off switch 1,
While stopping the gate drive current _IG , the off-drive current _IO is connected to the NPN transistor 11 via the terminal 8.
supply to the base of As a result, transistor 1 is connected between the base and emitter of NPN transistor 3.
1, transistor 3 is turned off and therefore switch 1 is turned off. Also the 13th
The diagram shown in FIG. 12 is superior to the one shown in FIG. 12 in that it does not require a negative power supply. However, the circuits shown in FIGS. 12 and 13 have the disadvantage that the off-drive current I _O must continue to flow even during the period when switch 1 is in the off state, which increases the power consumption of the circuit. Undesirable. Furthermore, in the case of FIG. 13, during the off period, I
There is a drawback that _O leaks into the main current path even in the path from the base of the transistor 11 to the emitter to the terminal 5. FIG. 14 shows a fourth conventional example, which can eliminate the above-mentioned drawbacks. In addition to the configuration shown in FIG. 13, an NPN transistor 13 for detecting that the switch 1 is in the on state and a resistor 14 for limiting the detection current are added. That is, to turn off switch 1,
The gate drive current I _G is stopped, and the off drive current I _O is connected to the NPN transistor 1 through the terminal 8.
Supply to the base of 1. As a result, the base and emitter of NPN transistor 3 are short-circuited,
Transistor 3 turns off and switch 1 turns on.
Turn off. On the other hand, while switch 1 is on,
Transistor 13 is also on, so terminal 12
The on-detection current I _S flows in from outside the figure through . When switch 1 turns off,
The NPN transistor 13 also turns off, and the inflow of _IS stops. This stoppage of I _S is detected by the external circuit shown in the figure, and the supply of I _O is stopped. Therefore, I _O can also be stopped after switch 1 is turned off, and the drawbacks of FIGS. 12 and 13 can be eliminated. However, in the case of FIG. 14, a circuit for detecting the stoppage of I _S and stopping I _O is required outside the figure, so there is a drawback that the number of circuit components increases. (Means for Solving the Problems) The present invention has been proposed to eliminate the above-mentioned drawbacks, and by utilizing the so-called retention characteristic of the PNPN switch, the PNPN switch is activated after the gate drive current is stopped. An object of the present invention is to provide a semiconductor switch circuit that automatically turns on. Next, embodiments of the present invention will be described. It should be noted that the embodiments are merely illustrative, and it goes without saying that various changes and improvements can be made without departing from the spirit of the present invention. FIG. 1 shows the first part of the semiconductor switch circuit of the present invention.
An example is shown below. In the figure, 1 is equivalently a PNPN formed by connecting the base and collector of a first transistor 2 of the first conductivity type, that is, PNP type, and a second transistor 3 of the second conductivity type, NPN type. The structure of a semiconductor switch is shown. Further, 17 and 18 are PNP type third and fourth transistors, respectively;
9 is an NPN type fifth transistor, 4 is a first terminal, 5 is a second main terminal, and 6 is a gate terminal. Therefore, the third and fourth transistors 1
The emitters of transistors 7 and 18, one terminal of the first resistor 15, and one end of a circuit element having PN coupling, that is, a diode 16, are connected to the first main terminal 4, respectively, and the second and fifth transistors 3, The emitter 19 and one terminal of the second resistor 7 are connected to the second main terminal 5. The base of the fifth transistor 19 is connected to the gate terminal 6, the collector is connected to the bases of the transistors 17 and 18, the collector of the transistor 17 is connected to the base of the transistor 3 and the other terminal of the resistor 7, and the collector of the fifth transistor 19 is connected to the base of the transistor 3 and the other terminal of the resistor 7. The emitter is connected to the collector of the transistor 18 and the other terminal of the resistor 15, and the base of the transistor 2 is connected to the other end of the diode 16. Next, the operation will be explained. To turn on the PNPN switch 1, connect the base of the NPN transistor 19 via the terminal 6 to the
Provides gate drive current I _G. This turns on the transistor 19, and the collector current of 19 is
Since the base currents of PNP transistors 17 and 18 also flow, transistors 17 and 18 are also turned on. As a result, the collector current of transistor 17 flows into the base of NPN transistor 3, turning transistor 3 on. On the other hand, since the transistor 18 is also turned on, the resistor 15 is short-circuited, and the sum of the conduction voltage between the base and emitter of the transistor 2 and the saturation voltage between the collector and emitter of the transistor 18 is the same as that of the diode 16.
(Strictly speaking, when transistor 18 is turned on, the potential of the emitter of transistor 2 becomes almost equal to the conduction voltage of main terminal 4.
The potential is raised to . On the other hand, since the collector current of the transistor 3 flows through the diode 16, a conduction voltage equivalent to one stage of the PN junction is generated between the main terminal 4 and the collector of the transistor 3. Therefore, conduction between the base and emitter of PNP transistor 2 becomes possible, and part of the collector current of transistor 3 flows as the base current of transistor 2), which turns on transistor 2 and turns on the entire switch 1. , a main current I _F that is determined by the conditions of the main current path outside the figure flows. To turn off switch 1, the supply of gate drive current I _G is stopped. Then, all transistors 17-19 are turned off. transistor 1
The current flowing through resistor 15 after resistor 8 is turned off is
When I _R1 , the following formula holds true. I _R1・R ₁₅ +kT/qln (I _R1 /I _SP )=kT/
qln {(I _F −I _R1 )/I _SD }...(1) where R ₁₅ ...Resistance value of 15 q...Elementary charge k...Boltzmann constant I _SP ...Reverse direction saturation current of base-emitter junction of 2 I _SD ...Reverse saturation current of the PN junction of diode 16 I _R1 is also the emitter current of transistor 2, but if I _R1 is smaller than the so-called holding current value I _H of switch 1, switch 1 remains on. When they become unable to do so, they turn off. Here, I _H is given by the following formula. I _H = V _BEN / (α _P・R ₇ ) ...(2) However, V _BEN ... Base-emitter conduction voltage of NPN transistor 3 α _P ... Common base current amplification factor R ₇ of PNP transistor 2 ... Resistance of 7 Value Now, looking at the magnitude relationship between I _F and I _R1 in equation (1), since a current limiting resistor 15 is inserted in the path of I _R1 , I _R1 is usually 1 to 3 times larger than I _F. An order of magnitude smaller. Therefore, if I _SP and I _SD are set equal,
(This is PNP when integrated on one chip.
The base-emitter junction area of transistor 2,
This can be easily achieved by making the PN junction areas of the diodes 16 equal. ) I _R1 kT/q・R ₁₅ ln(I _F /I _R1 ) ...(3) On the other hand, in (2), since 0 < α _P < 1, I _H > V _BEN /R ₇ ...( 4) Therefore, in order for switch 1 to turn off,
It is sufficient if the following conditions are met. V _BEN /R ₇ > I _R1 ...(5) and I _R1 = kT/q・R ₁₅ ln (I _F /I _R1 ) Normally kT/q is 30 mV and V _BEN is 800 mV, so for example, if I _F = 100 mV, Against R ₅
By setting = R ₇ = 5KΩ, equation (5) is satisfied. FIG. 2 shows a second embodiment of the present invention, in which the PNP transistors 17 and 18 of FIG. 1 are constructed with a multi-collector transistor 20. In the case of integration, it can be realized by forming the transistor 20 into a so-called lateral structure as shown in FIG. However, the seventh
In the figure, 34 is a separation region, 35 is an N-type region, and 3
6 to 38 are P-type regions, 39 is a base terminal,
40 is a first collector terminal, 41 is an emitter terminal, and 42 is a second collector terminal. Also, 4
3 is the main surface. The turn-on/turn-off operation in FIG. 2 is the same as that in FIG. 1, so a description thereof will be omitted. FIG. 3 shows a third embodiment of the present invention, in which two diodes 16 and 21 connected in series are used in place of the diode 16 in FIG. 2. In FIG. 3, to turn on switch 1, a gate drive current I _G is applied via terminal 6. In FIG. This turns on transistors 19 and 20, and current is supplied to the base of NPN transistor 3 via the first collector of transistor 20, turning on transistor 3 and causing collector current to flow through diodes 16 and 21. As a result, the potential difference between the base of the PNP transistor 2 and the first main terminal 4 becomes equal to the conduction voltage of two stages of PN junctions. On the other hand, since the transistor 20 is on, the voltage at the second collector of the transistor 20 is initially raised to the same potential as the first main terminal. Therefore, the base-emitter junction of PNP transistor 2 becomes conductive, and part of the collector current of transistor 3 flows through transistor 2.
The base current becomes the base current and is shunted, and the PNP transistor 2 is turned on. As a result, the entire switch 1 is turned on. To turn off the switch 1, first, the supply of the gate drive current _IG is stopped. Then transistors 19 and 20 are turned off. transistor 20
of the current flowing through the resistor 15 after it turns off.
If I _R2 , the following formula holds true. I _R2・R ₁₅ +V _BEP = 2V _D ...(6) However, V _BEP ...2's base-emitter conduction voltage V _D ...16, 21's conduction voltage Here, V _BEP V _D is 800 mV, so I _R2 V _D /R ₁₅ ...(7). If I _R2 is less than the holding current I _H of switch 1, switch 1 is turned off. Therefore(4)
From equations and equations (7), the conditions for turning off switch 1 are as follows. R ₁₅ /R ₁₇ >V _D /V _BEN 1 (8) Therefore, by setting R ₁₅ =2·R ₇ , for example, equation (8) can be easily satisfied. FIG. 4 shows a fourth embodiment of the present invention, in which a resistor 22 is inserted in series with the diode 16 of FIG. In FIG. 4, to turn on switch 1, a gate drive current I _G is applied via terminal 6. In FIG. Then, transistors 19 and 20 are turned on, current is supplied to the base of NPN transistor 3 via the first collector of transistor 20, transistor 3 is turned on, and the collector current of transistor 3 is passed through diode 16 and resistor 22.
flows. As a result, the potential difference between the base of the PNP transistor 2 and the first main terminal 4 is equal to the conduction voltage of one stage of the PN junction of the diode 16 and the conduction voltage of the resistor 2.
It is equal to the sum of the voltage drop at 2. on the other hand,
Since the transistor 20 is on, the potential at the collector of the transistor 20 initially rises to the same potential as the first main terminal 4. Therefore, the base-emitter junction of transistor 2 becomes conductive, and part of the collector current of transistor 3 becomes the base current of transistor 2 and is shunted, turning transistor 2 on. As a result, switch 1
The whole thing turns on. To turn off the switch 1, first, the supply of the gate drive current _IG is stopped. This turns off transistors 19 and 20. When the current flowing through the resistor 15 after the transistor 20 is turned off is I _R3 , the following equation holds true. I _R3・R ₁₅ +V _BEP = (I _F −I _R3 )・R ₂₂ +V _D ...(9) However, R ₂₂ ...value of resistor 22. Since V _BEP V _D is 800 mV, from equation (9), I _R3 = R ₂₂ / R ₁₅ + R ₂₂ · I _F ... (10) If I _R3 is smaller than the holding current I _H of switch 1, the switch 1 turns off. Therefore, from equations (4) and (10), the conditions for turning off the switch are as follows. R ₁₅ +R ₂₂ /R ₁₇・R ₂₂ > I _F /V _BEN ...... (11) For example, when I _F = 100mA, (V _BEN
800mV) R ₇ = 5KΩ, R ₁₅ = 10KΩ,
If R ₂₂ is set to 10Ω, equation (11) is satisfied. FIG. 5 shows a fifth embodiment of the present invention, and shows a second embodiment of the present invention.
The diode 16 shown in the figure is replaced with a PNP transistor 23. The advantage of this circuit is that the main current
In order to bypass a part of I _F as the collector current of the PNP transistor 23, the switch 1
The current capacity of the switch is small, and the switch size (the area occupied on the chip when integrated) can be reduced. Regarding the turn-on/off operation in Fig. 5, please refer to the second
Since it is the same as the one shown in the figure, the explanation will be omitted.
((In the explanatory text of Figure 2, "I _SD " is replaced with "I _SP '" (reverse saturation current of the base-emitter junction of 23), and "PN junction area of 16" is replaced with "base-emitter junction area of 23"). )) FIG. 6 shows a sixth embodiment of the present invention, in which the switch circuit of FIG. 2 can be used in both directions. In FIG. 6, 29 is a multi-emitter/multi-collector/PNP transistor, and FIG. 8 shows a simulated cross-sectional shape of the multi-emitter multi-collector PNP transistor. In FIG. 8, 43 is a main surface, 34 is a separation region, 44 is an N-type region, and 45 to 49 are P-type regions. Further, 50 is a base terminal, 51 is a first collector terminal, and 53 is a second collector terminal.
A collector terminal, 52 is a first emitter terminal, 54 is a second emitter terminal, and 50 to 54 in FIG.
correspond to 50 to 54 in FIG. 6, respectively. FIG. 9 shows another embodiment of 29, in which 55 is an N-type region and 56 to 59 are P-type regions. 50-54 are the same as 50-54 in FIG. Figures 8 and 9
When comparing the figures, the advantage of Fig. 8 is that the current transfer characteristics (current amplification factor) from the first emitter to the first and second collectors can be made the same, and the current transfer characteristics (current amplification factor) from the second emitter to the first and second collectors can be made the same. This means that all current transfer characteristics can be made the same. (In the configuration of FIG. 9, the current amplification factor from the first emitter 52 to the first collector 51 is larger than the current amplification factor to the second collector 53.) On the other hand,
The advantage of FIG. 9 is that the size of transistor 29 can be reduced. Also, in Fig. 6, 30 is an NPN transistor 31
and 32 collector areas are shared,
FIG. 10 shows a simulated cross-sectional shape when integrated. In Fig. 10, 60, 63, and 64 are N-type regions;
61 and 62 are P-type regions. Further, 65 is a collector terminal, 67 is a first base terminal, 68 is a second base terminal, 66 is a first emitter terminal, and 69 is a second
These are emitter terminals, respectively 65 in Figure 6.
Corresponds to ~69. In FIG. 10, 62, 60, and 61 are the emitters of the lateral PNP transistor 26, respectively.
It can also work as a base and collector. In other words, 30 in Figure 6 is PNPN in Figure 2.
This is equivalent to the switch 1 with an N-type emitter region 64 added. (When the switch 30 is turned on with the first main terminal 4 at a higher potential than the second main terminal 5, the N-type emitter 64 and the P-type base 6
2 is reverse biased, so 30 in FIG.
It is electrically equivalent to 1 in the figure. ) The turn-on/off operation shown in FIG. 6 will be explained in the case where the first main terminal has a higher potential than the second main terminal. If the second main terminal is at a higher potential, the circuit elements in FIG. 6, which are vertically symmetrical in position, can be replaced and the explanation will be omitted. First, to turn on the switch 30, a gate drive current I _G is applied via the terminal 6. Then
A portion of I _G flows into the base of the NPN transistor 28 through the diode 25, and flows into the base of the NPN transistor 28.
is turned on. (Since the transistor 28 is turned on, the remaining I _G flows through the path of the diode 24 → the base of the NPN transistor 27 → the collector → the collector of the transistor 28, and becomes part of the collector current of the transistor 28.) , the PNP transistor 29 turns on and current flows from the outside of the figure through the first main terminal.
A part of it flows into the emitter 52 and reaches the base of the NPN transistor 32 through the first collector 51, turning on the transistor 32. Therefore, since the collector current of the transistor 32 flows through the diode 16, the potential difference between the base of the PNP transistor 26 and the first main terminal 4 becomes equal to the conduction voltage of one stage of the PN junction. On the other hand, the potential of the emitter of the transistor 26 is raised to the potential of the first main terminal 4 by the second collector 53 of the transistor 29 . This enables the base-emitter junction of transistor 26 to conduct, causing a portion of the collector current of transistor 32 to become the base current of transistor 26, turning transistor 26 on, thereby turning on the entire switch 30. To turn on the switch 30, first
The supply of gate current I _G is stopped, and the transistor 28
and turn off 29. At this time, the operation is similar to that described with reference to FIG. (26→2,32→
Replace with 3. ) Note that switch 30 is turned
The condition for turning off is given by equation (5). (Effects of the Invention) As explained above, according to the present invention,
Since the PNPN switch does not require an off-driving circuit to turn off, the number of circuit elements is reduced compared to conventional circuits, and especially when integrated, the area occupied on the chip is reduced. There is.

[Brief explanation of drawings]

1 to 6 are examples of semiconductor switch circuits of the present invention, FIGS. 7 to 10 are diagrams showing simulated cross-sectional shapes of transistors applicable to the present invention, and FIGS. 11 to 14 are A circuit diagram of a conventional PNPN switch is shown. 1...Switch, 4, 5, 6, 8, 12, 39
~42,50~54,65~69... terminal, 2,
3, 9, 11, 13, 17, 18, 19, 20,
23, 26, 27, 28, 29, 30, 31, 3
2...transistor, 7, 14, 15, 22...
Resistor, 16, 21, 24, 25, 33...diode, 10... voltage source.

Claims (1)

[Scope of Claims] 1. A semiconductor switch having a PNPN structure in which the base and collector of a first transistor of a first conductivity type and a second transistor of a second conductivity type are connected to each other; The third and fourth transistors include third and fourth transistors of a first conductivity type, a fifth transistor of a second conductivity type, first and second resistors, and a circuit element having a PN junction; The emitter of the fourth transistor, one end of the first resistor, and the PN
one end of the circuit element having the junction, and the first
The emitters of the second and fifth transistors are connected to one end of the second resistor, and the second
, the base of the fifth transistor is a gate terminal, the collector of the fifth transistor is connected to the bases of the third and fourth transistors, and the collector of the third transistor is connected to the base of the third and fourth transistors. the base of the second transistor and the other end of the second resistor are connected; the emitter of the first transistor and the collector of the fourth transistor are connected to the other end of the first resistor; A semiconductor switch circuit characterized in that the base of a transistor is connected to the other end of a circuit element having a PN junction. 2 The third and fourth transistors are one multi-channel transistor.
2. The semiconductor switch circuit according to claim 1, wherein the semiconductor switch circuit is a collector transistor. 3. The semiconductor switch circuit according to claim 1 or 2, wherein the circuit element having the PN junction is one or more diodes. 4. The circuit element having a PN junction is a sixth transistor of the first conductivity type, and the emitter of the sixth transistor is connected to the first main terminal, and the base is connected to the base of the first transistor. 3. A semiconductor switch circuit according to claim 1, wherein the collector is connected to the second main terminal. 5. The semiconductor switch circuit according to claim 1 or 2, wherein the circuit element having the PN junction is a series connection of a diode and a resistor.