JPH04236465A - Thin-film transistor and manufacture thereof - Google Patents

Abstract

PURPOSE:To obtain a thin-film transistor which can be grown at a low temperature, whose crystallinity is good and which is provided with an operating semiconductor layer by a method wherein a polycrystalline alumina layer is sandwiched between a transparent insulating substrate and a polysilicon film as the operating semiconductor layer. CONSTITUTION:A substrate W inside a reaction chamber is heated; the inside of the reaction chamber is evacuated. Then, Ar is made to flow, and the steady flow of Ar barrier gas 31 is made to flow so that the inside of the reaction chamber is set to a definite degree of vacuum. A valve V1 is opened, and an aluminum chloride vapor 32 is made to flow into the reaction chamber. In addition, a valve V2 is opened, and a vapor 33 is made to flow into one reaction chamber. The substrate W placed on a holder is moved back and forth between the atmosphere of the aluminum chloride vapor 32 and the atmosphere of the vapor 33 so that the steady flow of the Ar barrier gas 31 is not disturbed. Thereby, a polycrystalline alumina film 7 which has been oriented to a crystal plane face (01-12) is grown on a transparent insulating substrate 1. A polysilicon film 4 as an operating semiconductor layer is grown on the oriented alumina film 7, and a thin-film transistor whose operating characteristic is good is obtained.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the structure and manufacturing method of a thin film transistor (TFT) used for driving a liquid crystal display panel.

[0002] TFT matrix-driven liquid crystal display panels have already been put to practical use in small televisions and the like, and further demand is expected for displays in large televisions and laptop computers.

[0003] TFT used in TFT matrix
There are two main structures: a staggered type (a structure where the gate is above the channel region) and an inverted staggered type (a structure where the gate is below the channel region).The staggered type has a simple structure, so it requires fewer steps. Good manufacturing yield.

[0004] In the structure of a TFT matrix used for display driving of liquid crystal display panels and the like, there is a demand for high-performance TFTs with large ON currents and low switching voltages in order to increase size and miniaturization.

The present invention can be used for the structure and manufacturing method of TFTs having the above-mentioned good characteristics.

[0006]

[Prior Art] A liquid crystal display panel using an active matrix drive method arranges TFTs in a matrix to correspond to individual pixels that display dots, and each pixel has a memory function to display a multi-line display with good contrast. Is going.

[0007] Such a liquid crystal display panel is, for example,
By applying driving voltages to a large number of gate bus lines and drain bus lines arranged intersectingly in the X and Y directions, and selectively driving the TFTs provided at the intersections of each bus line, the corresponding desired result can be achieved. It is configured to display pixels in dots.

A conventional staggered TFT used in a TFT matrix is shown in FIG. 4 below. Figure 4 (A) and (B) are conventional staggered TFTs.
FIG.

The structure will be explained together with the manufacturing process. In FIG. 4(A), ITO (a transparent film made of indium and tin oxide) is placed on a transparent insulating substrate 1 such as glass.
Coatings for source/drain electrodes consisting of films etc. and high concentration n
A contact layer 3 made of type silicon (n+-Si) or the like is successively laminated, and these films are patterned to form a source/drain electrode 2.

In FIG. 4B, an active semiconductor layer 4 made of amorphous silicon (a-Si) or the like is formed on a substrate.
A gate insulating film 5 made of a silicon nitride (Si3N4) film or the like and a gate electrode film made of an aluminum (Al) film or the like are sequentially laminated and patterned to form a gate electrode 6.

With the above steps, the formation of the main parts of the staggered TFT is completed.

0012

[Problem to be solved by the invention] According to the conventional structure and manufacturing method, it is possible to
It has been difficult to form high performance operational semiconductor layers.

An object of the present invention is to provide a TFT having an active semiconductor layer that can be grown at a low temperature and has good crystallinity, and a method for manufacturing the same.

[0014]

[Means for solving the problem] The solution to the above problem is 1)
A transparent insulating substrate (1), a polycrystalline alumina film (7) and a polysilicon film (4) grown in this order on the substrate (1), and a channel formation region of the polysilicon film (4) separated from each other. Two source/drain electrodes (2) electrically connected to the polysilicon film (4), a gate insulating film (5) and a gate electrode ( 6) a thin film transistor having the above, or 2) the polycrystalline alumina film (
7) The thin film transistor according to 1) above, wherein the polysilicon film (4) is oriented in a crystal orientation plane (01-12), and the polysilicon film (4) is oriented in a crystal orientation plane (111), or 3) the thin film transistor described in 1) or 2 above. ) Polycrystalline alumina film (7) described
The substrate (
1) This is achieved by a method of manufacturing a thin film transistor formed by atomic layer epitaxy in which the following steps are alternately exposed.

[0015]

[Operation]Recently, in Japanese Patent Publication No. 56-35158 and Japanese Patent Publication No. 60-21955, by exposing a sample gas to a predetermined raw material gas atmosphere many times, each atomic layer is
A layer-by-layer deposition atomic layer epitaxy (ALE) method has been disclosed.

[0016]Furthermore, the present inventor's patent application No. 02-0
As described in the specification of No. 31042, by ALE in the molecular flow region, an oriented alumina film can be obtained even on amorphous glass. Conventionally, when depositing a polysilicon thin film directly on a glass surface, the softening temperature of the glass (
A substrate temperature of approximately 550°C or higher was required.

However, polysilicon is formed on the oriented alumina film even at a low temperature (approximately 450° C.) below the softening temperature of glass. In this way, by using polysilicon grown on an oriented alumina film as the active semiconductor layer, a TFT with good operating characteristics can be created.

The present invention does not directly grow a polysilicon film that will become a channel region on a glass substrate as in the conventional example.
By sandwiching an oriented alumina film between the substrate and the polysilicon film, it is possible to obtain a polysilicon film with good orientation through low-temperature growth.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a sectional view of a TET according to an embodiment of the present invention. In the figure, 1 is a transparent insulating substrate, which is a glass substrate, 2 is a source/drain electrode, which is an ITO film, 3 is a contact layer, which is an n+-Si film, and 4 is an active semiconductor layer, which is a polysilicon film oriented in the crystal orientation plane (111). , 5 is a gate insulating film, which is a Si3N4 film or a silicon dioxide (SiO2) film, 6 is a gate electrode, which is an Al film, and 7 is a polycrystalline alumina film oriented in the crystal orientation plane (01-12) according to the present invention.

FIGS. 2A and 2B are cross-sectional views illustrating a manufacturing process according to an embodiment of the present invention. Figure 2(A)
In this step, a polycrystalline alumina film 7 oriented in the crystal orientation plane (01-12) is grown on a transparent insulating substrate 1 made of glass or the like by the ALE method.

The formation of the polycrystalline alumina film 7 is based on A described in Japanese Patent Application No. 63-227118 by the present inventor.
Use LE equipment. Figure 3 shows the ALE used in the example.
FIG. 2 is a perspective view of the device.

In the figure, an inert gas inlet Nc for flowing an argon (Ar) barrier gas 31 is provided in the center of a fan-shaped reaction chamber 30. Raw material gas inlets Na and N are located on the left and right sides of this inlet Nc, respectively.
b, and is exhausted by a turbo molecular pump VP via an orisis valve OF installed at the key position of the fan. The substrate W is placed on a fan-shaped holder that can move left and right.

First, the substrate W placed in the center of the reaction chamber is
The reaction chamber is heated to 450° C. and evacuated to 5×10 −7 Torr using a turbo molecular pump VP. Next, open the valve V0 and flow 500 SCCM of Ar into the orisis valve OF so that the inside of the reaction chamber becomes 1 x 10-2 Torr.
Narrow down. In this way, a steady flow of Ar barrier gas 31 is caused to flow.

[0024] Next, the aluminum chloride container was
Heat to 0°C to generate aluminum chloride vapor and close valve V.
1 to allow aluminum chloride vapor 32 to flow into the reaction chamber. Next, keep a water container (not shown) at 20°C, and close the valve V.
2 is opened to allow water vapor 33 to flow into the reaction chamber.

At this time, the aluminum chloride vapor 32 and water vapor 33 do not mix due to the Ar barrier gas 31. Also, the degree of vacuum inside the reaction chamber at this time was 1×10-2To
rr is maintained. Next, Ar barrier gas 31
The reciprocating speed is 3 as the substrate movement speed that does not disturb the steady flow of
The substrate W placed on the holder is moved back and forth between the atmosphere of aluminum chloride vapor 32 and the atmosphere of water vapor 33 6000 times at a period of seconds.

[0026] As a result of the above, the main surface is (
01-12) A polycrystalline alumina film 7 oriented in the following manner was grown. In FIG. 2(B), a source/drain electrode film with a thickness of 5 mm is deposited on a polycrystalline alumina film 7 by sputtering.
A 00 Å thick ITO film 2 is deposited.

Next, plasma vapor deposition (P-CVD)
method, a contact layer is formed on the ITO film 2.
An n+ type a-Si film 3 is grown. The growth conditions for a-Si are as follows.

Reaction gas: 20% SiH4/H2, 200 SC
CM 1% PH3/H2, 50 SCCM Gas pressure: 0.3 Torr RF power: 50 W Substrate temperature: 250 °C Next, a resist film to serve as an etching mask was formed by ordinary lithography, and reactive ion etching (R
The n+ type a-Si film 3 is etched using IE), and the ITO film 2 is patterned using a hydrochloric acid etchant to form source/drain electrodes.

The etching conditions for a-Si are as follows: CF4+O2 (10%) is used as a reaction gas, and RF power of 300 W is applied in an atmosphere where the pressure is reduced to 0.05 Torr. Then, the resist film is removed.

In FIG. 1, a crystal orientation plane (111
) oriented polysilicon film 4 is grown. The growth conditions for polysilicon are as follows.

Reaction gas: 20% SiH4/H2, 200 SC
CM gas pressure: 0.7 Torr RF power: 300 W Substrate temperature: 450°C Subsequently, by P-CVD method, SiO2 with a thickness of 3000 Å was formed as a gate insulating film.
A film 5 is grown.

The growth conditions for SiO2 are as follows. Reaction gas: 20%SiH4/H2, 200 SC
CMN2O, 200 SCCM Gas pressure: 1.0 Torr RF power: 50 W Substrate temperature: 250° C. Thereafter, a gate electrode coating made of an Al film is sequentially laminated and patterned to form the gate electrode 6.

[0033] From the above, the staggered TFT of the example
Finish forming the main part of.

[0034]

[Effects of the Invention] A TFT which can be grown at a low temperature and has an active semiconductor layer with good crystallinity, and a method for manufacturing the same, have been obtained.

[0035] As a result, the operating characteristics of the TFT are improved, and it is possible to contribute to the enlargement and miniaturization of the TFT matrix used for display driving of liquid crystal display panels and the like.

[Brief explanation of the drawing]

[Fig. 1] Cross-sectional view of a TET according to an embodiment of the present invention

[Fig. 2] Cross-sectional diagram illustrating the manufacturing process according to an embodiment of the present invention

[Figure 3] Perspective view of the ALE device used in the example

[
Figure 4: Cross-sectional view of conventional staggered TFT

[Explanation of symbols]

1 Glass substrate as transparent insulating substrate 2 ITO film as source/drain electrode 3 N+-Si film as contact layer 4 Polysilicon film oriented in crystal orientation plane (111) as active semiconductor layer 5 Si3N4 film or SiO2 as gate insulating film
Film 6 Al film at gate electrode 7 Polycrystalline alumina film oriented in the crystal orientation plane (01-12) according to the present invention

Claims (3)

[Claims] [Claim 1] A transparent insulating substrate (1), and the substrate (
1) Polycrystalline alumina film (7) and polysilicon film (4) grown in order on top, and the polysilicon film (4)
two source/drain electrodes (2) electrically connected to the polysilicon film (4) across a channel formation region; and a gate insulating film laminated in order on the channel formation region of the polysilicon film (4). (5) and gate electrode (6)
A thin film transistor comprising: 2. The polycrystalline alumina film (7) is oriented in a crystal orientation plane (01-12), and the polysilicon film (4) is oriented in a crystal orientation plane (111). The thin film transistor according to claim 1. 3. The polycrystalline alumina film (7) according to claim 1 or 2 is formed by atomic layer epitaxy in which the substrate (1) is alternately exposed to a molecular flow atmosphere of a plurality of types of source gases. A method for manufacturing a thin film transistor. Note: Here, the crystal orientation plane with a bar above 1 is represented by -1.