JPH04237119A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain the manufacturing method for a semiconductor device on which the positive electric charge, which is projected on the semiconductor substrate without passing through a gate oxide film in an ion implantation operation, is dispersed to the semiconductor substrate. CONSTITUTION:A resist mask 1, a part 1a of which comes in contact with the exposed surface of a semiconductor, is formed on a scribe line 2, and by implanting ions 6 therein in the above-mentioned state, the projected positive electrode charge 7 is allowed to directly flow into a semiconductor substrate 8 through the part 1a of the above-mentioned resist mask 1. As a result, the deterioration of a gate oxide film 4 can be prevented.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device which is suitable for manufacturing a semiconductor device which requires a step of implanting ions into a semiconductor substrate having an insulating film on its surface.

0002

2. Description of the Related Art When manufacturing semiconductor devices, there is a step in which ions are implanted after an insulating film such as a resist or an oxide film is formed on the surface of a semiconductor wafer. In this case, in addition to ions being implanted into necessary parts such as the source and drain, ions are also irradiated onto the insulating film on the wafer surface. By irradiating the insulating film with ions, the potential of the insulating film increases,
Eventually, this will lead to dielectric breakdown. Breakdown of the insulating film causes a problem in that the semiconductor device ceases to operate.

In order to suppress the increase in potential due to charging during the ion implantation process, conventional methods have been proposed, for example, in JP-A No. 54
As shown in Japanese Patent No. 89476, a method has been proposed in which Si around one element unit is exposed before the ion implantation process. However, due to the recent trend of increasing implanted ion current and thinning of insulating films, it has become difficult to sufficiently suppress charging using only such methods. In particular, when a resist is used as an implantation mask, the rate of element destruction due to resist charging increases.

FIG. 4 shows a cross section of one element unit according to the prior art when a resist is used as a mask. In the figure, 8 is a Si substrate as a semiconductor substrate, Q2 is a transistor as a semiconductor element having a source/drain region to be ion-implanted, Q1 is a transistor as a semiconductor element that should not be ion-implanted, and 1 is a transistor Q1. Resist mask to prevent ion implantation into
, Si is a scribe line where the surface of the substrate 8 is exposed, 3 is a field oxide film, 4 is a gate oxide film, 5 is an electrically floating gate electrode, 6 is an ion to be implanted, 7
is the positive charge accumulated on the surface of the resist mask 1. As shown in FIG. 4, in the cross section of a conventional device in the ion implantation process, a surface region of field oxide film 3 exists between scribe line 2 of resist mask 1 and the cross section of the device.

Next, the discharge path of the positive charges 7 accumulated on the surface of the resist mask 1 due to ion implantation will be explained. The positive charges 7 accumulated on the surface of the resist mask 1 pass through the gate electrode 5 and the gate oxide film 4 to the Si substrate 8.
run away to Although there is a possibility that some of the positive charges 7 accumulated on the surface of the resist mask 1 may flow into the Si substrate 8 through the field oxide film 3, the field oxide film 3 is usually about 5000 Å thick, and the gate Thickness of oxide film 4 (
250 Å), the resistance is high, and almost no current component passes through the field oxide film 3 and flows to the Si substrate 8. It is also conceivable that the positive charges 7 on the resist mask 1 flow into the scribe line 2 through the surface area of the field oxide film 3 between the resist mask 1 and the scribe line 2; Considering that the surface resistance of the oxide film 3 is high, it is thought that the current passing through this path is also small. Therefore,
In the covered state of the resist mask 1 shown in FIG. 4, most of the positive charges 7 accumulated on the surface of the resist mask 1 pass through the gate oxide film 4.

[0006]

[Problems to be Solved by the Invention] In the resist coating method in the conventional semiconductor device manufacturing method, the positive charges 7 accumulated on the surface of the resist mask 1 pass through the gate oxide film 4 existing under the resist mask 1. Oxide film 4
There was a problem that it was easy to deteriorate.

The present invention has been made to solve the above-mentioned problems, and is aimed at improving a semiconductor device in which positive charges irradiated onto a semiconductor substrate escape to the semiconductor substrate without passing through the gate oxide film. The purpose is to provide a manufacturing method.

[0008]

[Means for Solving the Problems] A method for manufacturing a semiconductor device according to the present invention is to apply a resist mask used as a mask in an ion implantation process so that a part of the resist mask contacts a scribe line where a semiconductor substrate is exposed. Then, ion implantation is performed in this state.

[0009]

[Operation] In the method of manufacturing a semiconductor device according to the present invention,
A resist mask surface is connected on the scribe line. Therefore, the positive charges accumulated on the resist mask surface flow directly into the semiconductor substrate without passing through the gate oxide film.
Electrical deterioration of the gate oxide film is suppressed.

0010

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. In FIG. 1, parts corresponding to those in FIG. 4 are designated by the same reference numerals, and their explanations will be omitted.

In this embodiment, the resist mask 1 covers the field oxide film 3 and the Si on the scribe line 2.
A portion 1a of the resist mask 1 is applied so as to be in contact with the exposed surface.

FIG. 2 shows the steps for forming the resist mask 1 of this embodiment when a positive resist is used.

First, as shown in FIG. 2A, a device is prepared in which a scribe line 2, a field oxide film 3, a gate oxide film 4, and a gate electrode 5 are provided on a Si substrate 8. Next, as shown in FIG. 4B, a resist mask 1 is formed by applying a resist so that the entire surface is covered. next,
As shown in the same figure (c), using a photomask 9, ultraviolet light 1 is
Exposure to 0. The mask portion 9a of the photomask 9 used at this time is provided so as to mask the transistor Q1 portion and a portion on the scribe line 2. Next, when development is performed, the exposed portion of the resist mask 1 is removed as shown in FIG. The resist mask 1 having the structure remains.

For the element in the state shown in FIG. 2(d), FIG.
Ions 6 are implanted in the following manner.

FIG. 3 is a characteristic diagram comparing the ease with which current flows on the surfaces of the resist mask 1 and the field oxide film 3 in order to concretely illustrate the effect of the present invention. As shown in the figure, current flows more easily on the surface of the resist mask 1 by an order of magnitude or more. This means that the field oxide film 3
This is also inferred from the fact that resist mask 1 is not used for the purpose of insulation, whereas resist mask 1 is an excellent insulator.

In this embodiment, a resist mask 1 covers the surface of a field oxide film 3 and is connected to a scribe line 2, as shown in FIGS. 1 and 2(d). By covering the surface portion of the field oxide film 3 with high surface resistance with the resist mask 1 with low resistance, positive charges 7 do not pass through the gate oxide film 4 and are transferred from the surface of the resist mask 1 to a portion 1a. and flows into the exposed Si surface on the scribe line 2 as shown by the arrow. Therefore, less charge passes through the gate oxide film 4.

Note that in the above embodiment, the scribe line 2
Although a structure in which the resist mask 1 is in contact with the upper Si surface has been described as an example, the same effect can be obtained by bringing the resist mask 1 into contact with a surface where a semiconductor such as a source or a drain is exposed.

[0018]

As described above, according to the present invention, ion implantation is performed with a resist mask covering the exposed semiconductor surface such as on a scribe line, so that the charge on the resist is removed from the gate oxidation. It flows into the substrate without passing through the film, which has the effect of suppressing deterioration of the gate oxide film during ion implantation.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of a device showing an ion implantation step in a method of manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view of an element showing a resist mask forming step in the same method.

FIG. 3 is a characteristic diagram showing the electrical conductivity of the resist mask surface and the field oxide film surface.

FIG. 4 is a cross-sectional view of an element showing an ion implantation step in a conventional semiconductor device manufacturing method.

[Explanation of symbols]

1 Resist mask 1a Part of resist mask 2 Scribe line 8 Si substrate In addition, in the figures, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Claims] 1. A semiconductor substrate in which a part of a resist mask used as a mask to cover the surface of a semiconductor element formed on a semiconductor substrate during ion implantation and which must not be ion-implanted is formed on a scribe line. A method for manufacturing a semiconductor device including an ion implantation step in which ions are implanted in contact with an exposed surface.