JPH04256039A - Information processor capable of counting instruction - Google Patents

Abstract

PURPOSE:To drastically reduce measuring time and to prevent the increase of hardware quantity. CONSTITUTION:A microprogram counter holds the address of a microinstruction in the course of execution. A storage device 8 stores either the operation history of a microprogram or the number of times of the execution for each machine language instruction. A trace memory control address generating means 4 generates a memory address capable of tracing the address of the microinstruction in the course of the execution. A selecting means 6 selects one of data obtained from the trace memory control address generating means 4 and the data obtained from the machine language code of an operation code register 1 as the address to be given to the storage device 8 according to the value of the operation mode of the operation code register 1. The selecting means 7 selects either the data obtained from the microprogram counter 2 or the data obtained from an incremental means 5 as the data to be written in the storage device 8 according to the value of the operation mode of the operation code register 1.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information processing apparatus capable of counting instructions and having means for measuring the number of executions of each machine language instruction.

0002

2. Description of the Related Art The number of executions of each machine language instruction is very effective information for efficiently improving the processing speed of an information processing device, especially for improving the processing speed of firmware and software. There are two methods for measuring the number of executions of each machine language instruction in a conventional information processing device: one using firmware and one using software.

First, a measurement method using firmware will be explained with reference to FIG. Referring to FIG. 3, when machine language processing is started, the operation code decoding means 11 outputs the start address of the microinstruction corresponding to each machine language instruction code, and the microprogram is activated. Microinstructions prepared in advance for measurement at the beginning of each machine language processing microprogram are executed. For this microinstruction, a memory address for instruction counting secured on the main memory is created (12).

Next, a jump to a common measurement subroutine is executed (13). That is, in the common measurement subroutine, data is read from the location specified by the memory address created together (131), the data is counted up (132), and the counted up data is written. After such a microinstruction is executed, a turn is made to the original machine language processing microroutine. From the next cycle, each machine language processing microprogram (14) is executed, and one measurement of machine language is completed.

[0005] In such a measurement method using firmware, it is necessary to rewrite the firmware. For this reason, measurement cannot be performed in a system equipped with only a read-only control storage device, the firmware must be rewritten, and the measurement microinstruction is executed for each machine language process, increasing the number of microinstruction processing steps. There are drawbacks.

Next, a measurement method using hardware will be explained with reference to FIG. Referring to FIG. 4, when machine language processing is started, the opcode held in the opcode register 1 is given as an address to the instruction count storage device. Data is read from and written to the storage device 3 in one machine cycle. Further, the data read from the storage device 3 is given to the incrementing means 5. The data counted up by the incrementing means 5 is written as is into the storage device 3, and one measurement of the machine language is completed.

[0007] Such a measurement method using hardware requires a storage device dedicated to measurement, which is not used at all in normal processing, and has the disadvantage that the amount of hardware increases.

[0008]

OBJECTS OF THE INVENTION An object of the present invention is to provide an information processing device capable of counting instructions, which significantly reduces measurement time and prevents increase in hardware amount.

[0009]

According to the present invention, microprogram counter means protects the addresses of microinstructions constituting a microprogram during execution of a microprogram that stores data processing operation procedures, and a microprogram counter means that protects the addresses of microinstructions constituting the microprogram during execution of the microprogram stores data processing operation procedures, and a microprogram counter means that protects the addresses of microinstructions constituting the microprogram while the microprogram stores data processing operation procedures. a storage means that is operable and stores either the operation history of the microprogram or the number of times each machine language instruction has been executed; an increment means that adds a predetermined number to the data read from the storage means; A trace memory control address generating means for generating a memory address capable of tracing a microinstruction address, a machine language code field indicating a data processing operation code, and the data stored in the storage means being an operation history of a microprogram or a machine language instruction. an operation code holding means for holding a machine language instruction consisting of two fields, an operation mode field indicating an operation mode such as the number of execution times for each operation; data obtained from the trace memory control address generation means as an address to be given to the storage means; a first selection means for selecting one of the data obtained from the machine language code field of the operation code holding means according to the value of the operation mode field of the operation code holding means; and the microprogram counter means as the data to be written in the storage means. and a second selection means for selecting the data obtained from the incrementing means and the data obtained from the incrementing means according to the value of the operation mode field of the operation code holding means.

0010

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained in detail with reference to the drawings.

Referring to FIG. 1, the first embodiment of the present invention includes a machine language code field 131 indicating the data processing operation code being executed, and either the operation history of the microprogram or the number of executions for each machine language instruction. Operation mode field 13 indicating the operation mode for storing
It includes an opcode register 1 that holds a machine code consisting of 2.

When measuring the number of executions of each machine language, the value of the machine code field 131 of this register 1 becomes address data for the storage device 8, and one word area is allocated for each machine language. Also, opcode register 1
The operation mode field 132 is 1 bit, and when the value of this field 132 is "H", it indicates that the mode is for measuring the number of executions of each machine language instruction, and when the value of the field 132 is "L", it indicates that the mode is for measuring the number of executions of each machine language instruction. Indicates microprogram operation history storage mode.

The microprogram counter 2 is a register that holds the address of the microinstruction being executed.

The trace memory control address generating means 4 always stores the address of the microinstruction N steps older than the microinstruction address being executed.
,2,...,N-1,N,0,1,...,N-1,N,0,
Outputs the address for the constantly circulating storage device 8, such as...

The incrementing means 5 is an adder that adds 1 to the given data and outputs the result.

The first selection means 6 receives the value of the trace memory control address generation means 4 and the value of the machine code field 131 of the operation code register 1, and the value of the operation mode field 132 of the operation code register 1 is set to "
When the value of the trace memory control address generation means 4 is "L", the value of the trace memory control address generation means 4 is selected and output as the address of the storage device 8, and when the value of the operation mode field 132 is "H", the value of the machine language code field 131 is outputted as the address of the storage device 8. Selectively output as an address.

The second selection means 7 is an operation code register 1
When the value of the mode field 132 is "L", the value of the micro program counter 2 is selected and output as write data to the storage device 8, and the value of the operation mode field 132 is "L".
When the value of 32 is "H", the value of the increment means 5 is selectively outputted as write data to the storage device 8.

The storage device 8 can perform both read and write operations in one machine cycle, and stores either the operation history of the microprogram or the number of executions of each machine language instruction.

Next, the operation of the first embodiment of the present invention will be explained in detail with reference to FIG. Referring to FIG. 1, when the value of the operation mode field 132 of the operation code register 1 is "L", the first selection means 6 selects the value of the trace memory control address generation means 4, and the second selection means 7 selects the value of the trace memory control address generation means 4. Select the value of micro program counter 2.

Therefore, the address given to the storage device 8 is a value that is generated by the trace memory control address generation means 4 in a round-robin manner and circulates in ascending order between "O" and "N". The value from the microprogram counter 2 selected by the second selection means 7 is written to the location of the storage device 8 specified by this address. This write operation allows the operation history of the microprogram to be stored.

When the value of the operation mode field 132 of the operation code register 1 is "H", the value of the machine code field 131 is selected by the first selection means 6. Therefore, the address given to the storage device 8 is different for each machine language code, and a storage location for the execution count value of each machine language instruction is secured on the storage device 8.

When one machine language is executed, the number of executions of the machine language instruction corresponding to the value of the machine language code field 131 is read from the storage device 8. The execution count value read from the storage device 8 is incremented by "1" by the incrementing means 5, and then given to the second selection means 7. Since the value of the operation mode field 132 is “H”, the second
The data given to the storage device 8 from the selection means 7 becomes the value output from the increment means 5. Therefore,
The execution count value of the machine language instruction, which is added by 1 to the execution count value of the machine language instruction previously read from the storage device 8, is written to the storage device 8, and the measurement operation for one machine language instruction is completed.

Next, a second embodiment of the present invention will be explained in detail with reference to FIG. Referring to FIG. 2, the second embodiment of the present invention stores a machine language code field 131 indicating the data processing operation code being executed and either the operation history of the microprogram or the number of executions for each machine language instruction. The operation code register 1 is provided to hold machine language consisting of an operation mode field 132 indicating an operation mode.

When measuring the number of executions of each machine language, the value of the machine language code field 131 of this register 1 is stored in the storage section 8.
1, and an area of 1 word is allocated for each machine language. Furthermore, the operation mode field 132 is 1 bit, and the value of this field 132 is “H”.
, it indicates that the mode is for counting the number of executions of each machine language instruction, and when the value of field 132 is "L", it indicates that the mode is for storing the microprogram operation history.

The microprogram counter 2 is a register that holds the address of the microinstruction being executed.

The trace memory control address generating means 4 always stores the microinstruction address N steps older from the microinstruction address being executed.
,2,...,N-1,N,0,1,...,N-1,N,0,
It outputs an address for the storage unit 81 that is constantly circulated, such as...

The incrementing means 5 is an adder that adds "1" to the supplied data and outputs the result.

When the value of the operation mode field 132 is "L", the first selection means 6 selects and outputs the value of the trace memory control address generation means 4 as the address of the storage section 81, and selects and outputs the value of the operation mode field 132. is “H”
When , the value of machine code field 231 is stored in storage unit 8.
Selectively output as address 1.

When the value of the operation mode field 132 is "L", the second selection means 7 selects and outputs the value of the microprogram counter 2 as the write data of the storage section 81, and the value of the operation mode field 132 is "L". At the time of "H", the value of the increment means 5 is selected and outputted as the write data. The storage unit 81 stores either the operation history of the microprogram or the number of executions of each machine language instruction.

The storage unit control means 9 outputs a control instruction to the storage unit 81 to perform a read operation in the first half of the machine cycle and a write operation in the second half of the machine cycle, and also changes the machine cycle from the first half to the second half. A control instruction is given to cause the data latch 10 to store the data read from the storage section 81 at the appropriate timing.

The data latch 10 temporarily stores the data read from the storage section 81 and outputs the data to the increment means 5.

Next, FIG. 2 shows the operation of the second embodiment of the present invention.
Please refer to the following for details. Referring to FIG. 2, the value of the operation mode field 132 of the opcode register 1 is “L”.
In this case, the first selection means 6 selects the value of the trace memory control address generation means 4, and the second selection means 7 selects the value of the microprogram counter 2. Therefore, the address given to the storage unit 81 is a value that cycles in ascending order between "0" and "N" created by the trace memory control address generation means 4 in a round-robin method.

The value of microprogram counter 2 is the second
The operation history of the microprogram is written into the storage section 8 via the selection means 7, and the operation history of the microprogram is stored therein. When the value of the operation mode field 132 of the operation code register 1 is "H", the first selection means 6 selects the machine language code field 132.
Select the value of 31. Therefore, the address given to the storage unit 81 is different for each machine language code, and a storage location for the execution count value of each machine language instruction is secured on the storage unit 81.

[0034] At the start of a machine cycle, execution of one machine language begins. At the same time, the execution count value of the machine language instruction corresponding to the value of the machine language code field 131 is read out from the storage section 81 according to instructions from the storage section control means 9.

The execution count value read from the storage section 81 is given to the data latch 10.

At a timing when the machine cycle changes from the first half to the second half, the storage section control means 9 instructs the data latch 10 to hold data, and the data latch 10 holds the applied data. Also, at this timing, the storage unit control means 9
outputs an instruction to the storage unit 81 to end the data read operation and start the write operation.

In the second half of the machine cycle, data latch 10
The execution count value of the machine language instruction held in data latch 1
It is read from 0 and given to the increment means 5. “1” is added to the execution count value of the machine language instruction given to the increment means 5, and the result is given to the second selection means 7. Since the value of the operation mode field 132 is "H", the second selection means 7 selects the value from the increment means 5 and supplies it to the storage section 81 as data. Therefore, the execution count value of the machine language instruction, which is obtained by adding "1" to the execution count value of the machine language instruction previously read from the storage unit 81, is written to the storage unit 8, and the measurement for one machine language instruction is performed. The operation is complete.

[0038]

As explained above, the present invention significantly reduces the measurement time by providing a means for measuring the number of executed machine language instructions using hardware, and also enables the measuring means to
By sharing the storage device for microprogram tracing and the storage device for measuring the number of executed machine language instructions,
This has the effect that the amount of hardware does not increase.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a first embodiment of the present invention.

FIG. 2 is a diagram showing a second embodiment of the invention.

FIG. 3 is a diagram for explaining a processing procedure using firmware in the prior art.

FIG. 4 is a diagram for explaining a processing procedure by hardware in the prior art.

[Explanation of symbols]

1 Operation code register 2 Microprogram counter 3 Storage device 4 Trace memory control address generation means 5 Increment means 6 First selection means 7 Second selection means 8 Storage device 9 Storage section control means 10 Data latch

Claims (2)

[Claims] 1. A microprogram counter that protects the addresses of microinstructions constituting the microprogram during execution of a microprogram that stores data processing operation procedures, and a microprogram counter that is capable of both reading and writing operations in one machine cycle. A storage means for storing either the program operation history or the number of executions for each machine language instruction, an increment means for adding a predetermined number to the data read from the storage means, and an address for tracing the microinstruction being executed. a trace memory control address generation means for generating a memory address, a machine language code field indicating a data processing operation code, and a field indicating whether the data stored in the storage means is the operation history of a microprogram or the number of executions for each machine language instruction. an operation code holding means for holding a machine language instruction consisting of two fields, an operation mode field indicating an operation mode; data obtained from the trace memory control address generation means as an address to be given to the storage means; and a machine language for the operation code holding means. a first selection means for selecting one of the data obtained from the code field according to the value of the operation mode field of the operation code holding means; the data obtained from the microprogram counter means and the first selection means as data to be written in the storage means; a second selector for selecting data obtained from the incrementing means according to the value of the operation mode field of the operation code holding means;
An information processing device capable of counting instructions, comprising: selection means. 2. The information processing device capable of counting instructions according to claim 1, wherein the storage means includes a storage section that stores either the operation history of the microprogram or the number of times each machine language instruction is executed, and the storage section. a data holding means for holding data read from the storage unit; and an instruction to cause the storage unit to perform a data read operation in the first half of one machine cycle, and an instruction to cause the data holding unit to hold the data read from the storage unit. storage section control means for incrementing the data held in the data holding means in the latter half of one machine cycle and issuing an instruction to write the data received from the second selection means to the storage section. An information processing device capable of counting instructions.