JPH04299536A - Manufacture of schottky gate type field effect transistor - Google Patents

Abstract

PURPOSE:To suppress the deterioration of the Schottky characteristic of the title transistor with high reproducibility by forming a semiconductor of the same material as that used for an undoped or low-concentration doped substrate between an active layer and gate electrode so that the direct contact of a high- concentration active layer with the gate electrode can be prevented. CONSTITUTION:After a p-type layer 2 and active layer 3 are formed in an semi-insulating GaAs substrate 1 by ion implantation and undoped GaAs 4 is deposited on the surface of the substrate 1, an intermediate-concentration layer 6 is formed by using a gate electrode 5 as a mask. Then, after side walls are formed against a gate, a high-concentration layer 7 is formed and ohmic electrodes 8 are formed of AuGe/Au films on the surface of the layer 7. Therefore, a Schottky gate type field effect transistor having an excellent Schottky characteristic can be obtained.

Description

[Detailed description of the invention]

[Purpose of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a Schottky gate field effect transistor aimed at improving Schottky characteristics.

0002

2. Description of the Related Art A Schottky gate field effect transistor is a type of junction FET whose gate is a contact between a metal and a semiconductor, and is also called a MESFET. Among them, MESFETs using GaAs, which has a high electron mobility, as a semiconductor substrate are suitable for integrated circuits that operate at high speed, and are being actively developed because they are easy to process.

[0003] In order to further increase the speed of integrated circuits, the performance of MESFETs is being improved by miniaturizing the gate length. At this time, in order to improve the performance of the MESFET, as the gate length becomes smaller, the active layer must also be made thinner with a higher concentration. However, as the active layer becomes highly doped and thin, problems arise such as deterioration of the Schottky characteristics of the MESFET, that is, a decrease in the Schottky barrier and an increase in the n value of the ideality factor.

[0004] To solve this problem, a method has been used to prevent deterioration of Schottky characteristics by nitriding the surface of the active layer to form a thin insulating film. However, although this method can suppress the decrease in Schottky barrier, it is possible to prevent the Schottky barrier from deteriorating. Problems such as deterioration in adhesion with the gate electrode metal, a significant increase in the n value, and poor reproducibility occurred, making it impossible to form a stable and good MESFET.

[0005]

[Problem to be solved by the invention] As mentioned above, MESF
There are many problems in the method of suppressing the deterioration of Schottky characteristics as the performance of ET increases, and no effective means have been available. An object of the present invention is to provide a method for manufacturing a Schottky gate field effect transistor that can suppress deterioration of Schottky characteristics with good reproducibility. [Structure of the invention]

[0006]

[Means for Solving the Problems] The present invention forms an undoped or lightly doped semiconductor of the same material as the substrate between an active layer formed on a semiconductor substrate and a gate electrode, and forms a highly doped active layer. It is characterized by having good Schottky characteristics by not being in direct contact with the gate electrode.

[0007]

[Operation] M in which the gate electrode is formed directly on the active layer
In an ESFET, as the active layer is made thinner and highly doped, the highly doped conductive layer comes closer to the gate electrode, which increases the mirror image effect, surface states, and tunnel current, resulting in Schottky characteristics. decreases.

According to the present invention, for example, by epitaxially growing an undoped or low concentration GaAs layer between the active layer formed on a GaAs substrate and the gate electrode, the high concentration active layer and the gate electrode are brought into direct contact. Moreover, by setting the thickness of the formed GaAs layer appropriately, deterioration of the Schottky characteristics can be suppressed without impairing the FET characteristics. Furthermore, since the semiconductor is made of the same material as the substrate used as the base, the process is easy, and M
It is possible to form an FET capable of MES operation instead of IS operation.

[0009]

Embodiments Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a cross-sectional view showing an example of a GaAs MESFET. As shown in the figure, a p-type layer 2 and an active layer 3 are formed on a semi-insulating GaAs substrate 1 by ion implantation. Then, a low concentration of undoped GaAs 4 is deposited, and then an intermediate concentration layer 6 is formed using the gate electrode 5 as a mask.
After sidewalls are formed for the gate, a high concentration layer 7 is formed, and an ohmic electrode 8 is formed on the surface of the layer 7 using an AuGe/Au film.

FIGS. 1A to 1E are cross-sectional views showing the manufacturing process of a GaAs MESFET according to an embodiment of the present invention. First, a resist pattern for forming a p-type layer is formed on a semi-insulating GaAs substrate 1, and Mg ions are applied at an acceleration voltage of, for example, 150 keV.
, by ion implantation at a dose of 3×1012/cm2.
A mold layer 2 is formed. After removing the resist pattern, a resist pattern for forming an active layer is formed, and using this resist pattern as a mask, Si is applied at an acceleration voltage of 10
The active layer 3 is formed by ion implantation at keV and a dose of 3×10 13 /cm 2 (FIG. 2(a)). After removing the resist pattern, 82
Heat treatment is performed at 0° C. for 30 minutes. Then MOCVD
Undoped GaAs4 is deposited at a thickness of, for example, 150 Å (FIG. 2(b)). Thereafter, a tungsten nitride film of, for example, 3000A is deposited by sputtering, and reactive ion etching (R) is performed using the resist as a mask.
The gate electrode 5 is formed by the IE) method. Then, the resist is removed to form a resist pattern for forming an intermediate concentration layer, and using this resist pattern and gate 5 as a mask, S
i ions, for example, at an acceleration voltage of 20 keV and a dose of 1.
Ions are implanted at 5×10 13 /cm 2 to form an intermediate concentration layer 6 (FIG. 2(c)). Then, the resist is removed, SiON is deposited to a thickness of 1500 Å by plasma CVD, and then etched back by RIE to form sidewalls on the gate electrode 5. Then, a resist for forming a high concentration layer is formed, and using this resist pattern and the gate electrode 5 on which the sidewalls are formed as a mask, Si ions are applied at an acceleration voltage of 30 keV and a dose of 3.
A high concentration layer 7 is formed by ion implantation at ×10 13 /cm 2 (FIG. 2(d)). Then, the resist is removed, and heat treatment is performed at 820° C. for 30 minutes, for example, in an AsH3 atmosphere. Thereafter, an ohmic electrode is formed using an AuGe/Au film on the high concentration layer 7 (FIG. 2(e)).

FIG. 3 shows a GaA film according to an embodiment of the present invention.
Undoped GaAs epitaxial layer 2 using S substrate
This is the dependence of the Schottky barrier φB on the impurity concentration of the active layer at 00 A. It can be seen that in the conventional example where the gate electrode and the active layer are in direct contact in a high concentration region, φB decreases rapidly, whereas in this example, the decrease in φB is slight. Also, the impurity concentration Nd of the active layer
It can be seen that φB hardly decreases below 1×1017/cm3.

FIG. 4 shows the dependence of φB on the thickness of an undoped GaAs epitaxial layer according to the present invention. The impurity concentration of the active layer is 2×10 16 /cm 3 . It can be seen from this figure that φB decreases rapidly when the thickness of the epitaxial layer is 100 Å or less. This is because the mirror image effect increases as the epitaxial layer becomes thinner, and the Schottky barrier decreases due to an increase in tunnel current and recombination current. It can be seen from FIG. 4 that the thickness of the epitaxial layer of 100 to 200 A can sufficiently suppress the decrease in the Schottky barrier.

In this example, a p-type layer is formed under the active layer, but this is to suppress the short channel effect, and if the short channel effect is suppressed, it is not necessarily necessary to form a p-type layer. Not necessary. Further, although this embodiment describes an FET having an LDD structure, the effects of the present invention are the same even in an FET having a high concentration layer instead of an intermediate concentration layer.

[0014]

As described above, according to the present invention, an undoped or low-concentration semiconductor made of the same material as the semiconductor substrate can be formed to an appropriate thickness between the active layer formed on the semiconductor substrate and the gate electrode. In this way, a Schottky gate field effect transistor that maintains good Schottky characteristics can be obtained.

[Brief explanation of drawings]

FIG. 1: GaAs MESFET of one embodiment of the present invention
FIG.

[Figure 2] GaAs MESFET of one embodiment of the present invention
FIG.

FIG. 3 is a diagram showing the characteristics of the present invention and shows the relationship between the impurity concentration of the active layer and the Schottky barrier.

FIG. 4 is a diagram showing the characteristics of the present invention and shows the relationship between the thickness of the undoped GaAs epitaxial layer formed between the Schottky junction electrode and the active layer and the Schottky barrier.

[Explanation of symbols]

1...Semiconductor GaAs substrate, 2...p-type layer, 3...n-type active layer, 4...Undoped GaAs, 5...gate electrode, 6...Intermediate concentration layer, 7...High concentration layer, 8...Ohmic electrode, 9...Resist, 10...Side wall.

Claims (2)

[Claims] 1. After implanting ions into a semiconductor substrate to form an active layer and activating the ion-implanted semiconductor region by high-temperature annealing, a semiconductor made of the same material as the semiconductor substrate is placed on the semiconductor substrate. A step of epitaxial growth, a step of forming a Schottky junction electrode using a high-melting point metal, a step of performing ion implantation for forming an intermediate concentration layer using the Schottky junction electrode as a mask, and a step of forming a sidewall on the Schottky junction electrode by etching back the insulating film. a step of forming and implanting ions for forming a high concentration layer, and a step of removing the sidewalls, activating the ion-implanted semiconductor region by high temperature annealing, and forming an ohmic electrode on the high concentration layer. A method for manufacturing a Schottky gate field effect transistor, characterized by comprising: 2. A method for manufacturing a Schottky gate field effect transistor, wherein the epitaxial layer according to claim 1 has an impurity concentration of 1×10 17 /cm 3 or less and a thickness of 100 to 200 angstroms. .