JPH04299561A - Lead frame and semiconductor device using the same - Google Patents

Abstract

PURPOSE:To obtain a semiconductor device of high reliability wherein the generation of chip cracks is reduced in the case of a large-sized semiconductor chip, and manufacture is facilitated. CONSTITUTION:An aperture is formed in the central part of a die pad 11 of a lead frame, and a semiconductor chip is retained only by the peripheral part. In the title semiconductor device, an aperture is formed in the central part, and the semiconductor chip is retained only by the peripheral part, thereby reducing the contact area of the semiconductor chip and the die pad 11.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame and a semiconductor device using the lead frame, and more particularly to the structure of a die pad that supports a semiconductor chip.

0002

2. Description of the Related Art In recent years, in the field of semiconductor devices, the size and thickness of packages have been reduced. On the other hand, in response to the demand for higher functionality of semiconductor devices, higher integration is progressing, and semiconductor chips are also becoming larger. Under these circumstances, the area of the semiconductor chip relative to the area of the die pad is increasing, and the size of the die pad relative to the package size is also increasing.

By the way, conventional problems with resin-sealed semiconductor devices include cracks in the semiconductor chip (chip cracks) caused by the difference in coefficient of thermal expansion between the die pad and the semiconductor chip, and the warpage of the outer package due to warping of the package. There has been a problem in that the coplanarity (flatness) of the leads deteriorates, resulting in poor connection when connecting to an external circuit.

[0004] Such problems have become increasingly serious as the die pad size increases relative to the package size as described above.

In order to solve this problem, as shown in FIG.
to improve the adhesion between the mold resin 19 and the die pad, and forcibly restrain the thermal expansion of the die pad with the surrounding resin, or adjust the mold time and post-mold curing time in the semiconductor device assembly process. Such,
Extremely strict manufacturing environment management is in place.

[0006]

[Problems to be Solved by the Invention] However, these methods have the problem that the molding process of the lead frame is complicated and that thermal expansion is forcibly restrained, resulting in reduced reliability due to the stress generated. there were. Also,
Another issue was the need to improve manufacturing environment control equipment.

The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to provide a semiconductor device that is easy to manufacture and highly reliable, reducing the occurrence of chip cracks even when semiconductor chips are increased in size. do.

[0008]

SUMMARY OF THE INVENTION Accordingly, in the present invention, an opening is provided in the center of the die pad of a lead frame so that the semiconductor chip is supported only at the peripheral edge.

Preferably, the semiconductor chip mounting area of the die pad is a thin area, and a step is formed along the periphery of the semiconductor chip.

[0010] More preferably, the step is configured to have a tapered shape.

Further, in the semiconductor device of the present invention, an opening is provided in the center of the die pad of the lead frame so that the semiconductor chip is supported only at the peripheral edge, thereby reducing the contact area between the semiconductor chip and the die pad. .

0012

[Function] According to the above structure, an opening is provided in the center of the die pad and the semiconductor chip is supported only at the peripheral edge, so the contact area between the semiconductor chip and the die pad is extremely small, resulting in chip cracking. Therefore, a highly reliable semiconductor device can be obtained.

If the die pad surface is configured to have a step along the periphery of the semiconductor chip, this step will act as a stopper and can prevent the semiconductor chip from shifting.

Furthermore, if the step is formed into a tapered shape, positioning during die bonding becomes easier.

[0015]

Embodiments Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

The lead frame of the embodiment of the present invention is shown in FIG.
As shown in (a) and (b), the die pad 11 is characterized by being constructed as a ring-shaped body having an opening H in the center. FIG. 1(b) is a perspective view of the main part of FIG. 1(a).

That is, in this lead frame, inner leads 12 are arranged radially around a die pad 11 and are integrally connected by tie bars 13, and an outer lead 14 is connected to each inner lead to form a side bar. The tip is supported by 15 and 16. Here, 17 is a support bar for supporting the die pad.

The semiconductor chip 1 is connected onto the die pad 11 of this lead frame, and resin sealing is performed through a wire bonding process in which the semiconductor chip and the inner leads are connected using wires 18, and the side bars 15, 16 is removed and the outer leads are bent for surface mounting, and the semiconductor device is completed as shown in the cross-sectional view of FIG. 19 is a sealing resin.

Note that the semiconductor chip 1 is connected to the die pad 11 through a conductive adhesive formed by a conventional syringe method, printing method, or the like.

According to this lead frame, chip cracks do not occur even during the molding process and post-molding curing process, as well as during heating during use, and a highly reliable semiconductor device can be obtained. be able to.

Furthermore, since most of the front and back surfaces of the semiconductor chip are in contact with the molding resin, there is no difference in coefficient of thermal expansion and contraction between the front and back surfaces, which prevents chip cracks, package cracks, and package warping. etc. are significantly reduced.

Furthermore, this lead frame is positioned on the wiring pattern of the mounting board and fixed by heating the mounting board side, but since there is no warping of the outer leads, there is no possibility of poor contact with the wiring board. It is possible to perform a good implementation without any problems.

[0023] In this way, it is possible to extremely easily and reliably mount a semiconductor device using a large, highly integrated semiconductor chip without requiring any special manufacturing equipment. .

Note that the lead frame material is not limited to the alloy 42, and other materials such as copper may be used.

Further, in the above embodiment, the die pad 11 is formed integrally with the lead portion such as the inner lead, but it may be possible to use the same material or different materials with different thicknesses, etc.
They may be formed separately and connected. In this case, for example, the die pad may be formed of a resin having a coefficient of thermal expansion close to that of the molding resin, thereby further improving reliability. Furthermore, a plurality of types of die pads may be prepared and combined depending on the chip size. Furthermore, in the above embodiment, the die pad is formed into a ring-shaped body so as to be supported by the entire periphery of the semiconductor chip, but it is not necessarily necessary to support the die pad by the entire periphery of the semiconductor chip, but at three or four points on the periphery. It is also possible to support a part of it, such as by supporting it.

Furthermore, as shown in FIG. 3, a step may be formed along the periphery of the semiconductor chip on the die pad 11 so that the semiconductor chip mounting area becomes a thin area 11s.

[0027] This makes it possible to prevent the semiconductor chip from being misaligned.

Furthermore, if the step of the die pad is formed in a tapered shape as shown in FIG. 4, the positioning of the semiconductor chip can be facilitated.

[0029]

As explained above, according to the present invention, since the opening is provided in the center of the die pad and the semiconductor chip is supported only at the peripheral edge, the contact area between the semiconductor chip and the die pad is reduced. Since it is extremely small, a highly reliable semiconductor device can be obtained without chip cracking.

[Brief explanation of drawings]

[Fig. 1] A diagram showing a lead frame according to an embodiment of the present invention.

[Figure 2
] A diagram showing a semiconductor device using a lead frame according to an embodiment of the present invention.

FIG. 3 is a diagram showing a semiconductor device using a lead frame according to another embodiment of the present invention.

FIG. 4 is a diagram showing a semiconductor device using a lead frame according to another embodiment of the present invention.

[Fig. 5] A diagram showing a semiconductor device using a conventional lead frame.

[Explanation of symbols]

11 Die pad 12 Inner lead 13 Tie bar 14 Outer lead 15 Sidebar 16 Sidebar 17 Support bar

Claims (4)

[Claims] 1. A lead frame comprising a die pad for supporting a semiconductor chip and a plurality of inner leads extending from the periphery of the die pad, wherein the die pad is formed of a ring-shaped body having an opening in the center. A lead frame configured to support the semiconductor chip at a peripheral portion. 2. Claim (1), wherein the semiconductor chip mounting area of the die pad is a thin area, and a step is formed along a periphery of the semiconductor chip.
Lead frame listed. 3. The lead frame according to claim 1, wherein the step is configured to have a tapered shape. 4. A semiconductor device in which a semiconductor chip is mounted on a die pad, has leads extending around the semiconductor chip, and is sealed with resin, wherein the die pad is a ring-shaped body having an opening in the center. A semiconductor device comprising: a semiconductor device configured to support a peripheral portion of the semiconductor chip.