JPH04304533A - Software debugging supporting device - Google Patents

Abstract

PURPOSE:To obtain a software debugging supporting device by which an execution state can be read out even while a real equipment CPU 11A executes a program, and a dynamic root control can be operated. CONSTITUTION:The above device is equipped with a real equipment 1A to be mounted on a software, having the real equipment CPU 11A which executes the software to be debugged, and a real equipment memory device connected through a real equipment bus 15 with the real equipment CPU 11A, which stores the above mentioned software. And also, this device is equipped with a debugging supporting equipment 2A having a supporting equipment CPU 25A which reads the execution state of the software, and a supporting equipment memory device 26A connected through a supporting equipment bus 28A with the supporting equipment CPU 25A. Then, the real equipment bus 15 is connected with the supporting equipment bus 28A.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a software debugging support device that improves debugging efficiency during computer software development.

0002

[Prior Art] Fig. 4 shows a conventional software debugging support device, which is described in the magazine "All About Microcomputer Development" (June 20, 1989, published by Dempa Shimbunsha), page 78. 1 is a configuration diagram showing an in-circuit emulator (hereinafter referred to as "ICE"). In the figure, reference numeral 1 denotes a software-installed actual machine on which software to be debugged is installed, 2 an ICE unit that performs debugging, and 3 a connection line that connects the software-installed actual machine 1 and the ICE unit 2.

[0003] In the actual machine 1 to which the software is installed,
11 is a CPU socket to which the connection line 3 is connected during debugging, and where the actual CPU is mounted after debugging;
2 is an actual machine ROM that stores software such as programs and data; 13 is an actual machine RAM that stores programs and data; 14 is an I/O interface that sends and receives signals to external devices; 15 is a CPU socket 11; an actual machine RO
M12, actual RAM 13 and I/O interface 1
This is an actual bus that connects the 4 devices to each other.

Further, in the ICE unit 2, 21 is a target CPU that acts as an actual CPU, 22 is an emulator control card that controls the operation of the target CPU 21, 23 is an emulation memory that records state changes of the actual machine bus 15, and 24 is a Emulation memory 2
3, a host CPU 25 controls the emulator control card 22, emulation memory 23, and memory control circuit 24, and in turn controls the entire ICE unit 2; 26 holds a program for controlling the host CPU 25, etc. This is host CPU memory.

27 is a target CPU 21, an emulator control card 22, and an emulation memory 2.
3 and the memory control circuit 24, and transmits data during emulation. A part of this emulation bus 27 is
As shown in FIG. 4, it includes many signal lines. 28 is an emulator control card 22, an emulation memory 23, a memory control circuit 24, and a host CP.
This is a mainframe bus that interconnects the U25s and transmits control information from the host CPU25. This main frame bus 28 is connected to one end of the emulation bus 27, and the other end of the emulation bus 27 is connected to the connection line 3.

Next, the operation of the conventional software debugging support device shown in FIG. 4 will be explained. First, before executing emulation, the host CPU 25 loads the program to be debugged into the actual machine RAM 13 via the main frame bus 28, emulator control card 22, target CPU 21, connection line 3, CPU socket 11, and actual machine bus 15. do.

[0007] Next, the host CPU 25 sets the emulator control card 22 and the memory control circuit 24 based on the emulation execution conditions specified from the outside, and starts emulation by operating the target CPU 21 according to the emulation execution conditions. do.

At this time, the target CPU 21 accesses each resource (real machine ROM 12, real machine RAM 13, and I/O interface 14) through the connection line 3, CPU socket 11, and real machine bus 15, and executes the program. The state change of the actual bus 15 at this time is C
PU socket 11, connection line 3, emulation bus 2
7 and the memory control circuit 24 to the emulation memory 23, and the emulation memory 23 internally stores this state change.

After the target CPU 21 executes the program, the execution of the program is verified from the state changes stored in the emulation memory 23.

[0010] In addition, each route is checked by controlling the routes (branches) that the program passes by changing the input conditions to the I/O interface 14 or changing the branch conditions of the program loaded into the RAM 13 of the actual machine. The host CPU 25 sequentially changes the settings.

[0011]

[Problems to be Solved by the Invention] The conventional software debugging support device is configured as described above, and the actual CPU
The target CPU 21, which acts on behalf of
There was a problem in that the execution status could not be read until the execution of the program by U21 was completed.

[0012] Also, program route control is performed using I/O
Input conditions to interface 14 or actual machine RAM
13, there is also the problem that it is not possible to control the route while the target CPU 21 is executing the program, that is, it is not possible to perform dynamic route control. Ta.

[0013] This invention was made to solve the above-mentioned problems, and it is possible to read the execution state even while the target CPU is executing the program, and it also makes it possible to perform dynamic route control. The purpose of the present invention is to obtain a software debugging support device that can also perform software debugging.

[0014]

[Means for Solving the Problems] A software debugging support device according to the present invention has a real machine CPU that executes software to be debugged, and a real machine CPU that executes software to be debugged.
A real machine to be loaded with software that has a real machine memory device connected to a PU and stores the software, a support machine CPU that reads out the execution state of the software, and a debugging support that has a support machine memory device connected to the support machine CPU via a support machine bus. It is equipped with a machine and connects the actual machine bus and the support machine bus.

[0015] Further, a software debugging support device according to another aspect of the present invention includes a real machine CP that executes software to be debugged and has a communication port.
A real machine to be loaded with the software, which is connected to the real machine CPU via a real machine bus and is equipped with a real machine memory device for storing software, and a debugging support machine equipped with a support machine CPU that reads the execution status of the software and has a communication port. , the communication port of the actual machine CPU and the communication port of the support machine CPU are connected.

[0016]

[Operation] In the present invention, the debug support device reads out the execution state of the software without affecting the actual device on which the software is installed.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The structure of an embodiment of the present invention will be described below with reference to FIG. FIG. 1 is a block diagram showing one embodiment of the present invention, and 12, 14, and 15 are the same as those described above. Reference numeral 1A indicates a software-installed actual machine that carries software to be debugged, and 2A indicates a debug support machine that debugs the software.

In the actual machine 1A to which software is installed, 11A is a real machine CPU that executes the software;
3A is a two-port RAM for storing data, etc., one port is connected to the actual machine bus 15, and the other port is connected to the support machine bus (described later). Actual machine ROM1
The 2 and 2 port RAM 13A constitute an actual memory device. The real machine CPU 11A, the real machine ROM 12, the 2-port RAM 13A, and the I/O interface 14 are interconnected by a real machine bus 15.

Furthermore, in the debug support machine 2A, 2
5A is a support machine CP that controls the entire debug support machine 2A.
U, 26A is a support machine memory device that stores programs executed by the support machine CPU 25A, and 28A is a support machine memory device that interconnects the support machine CPU 25A, the support machine memory 26A, a display circuit (described later), and a switch circuit (described later). This is a support aircraft bus. 29 is a display circuit that displays the execution status of the actual machine 1A to which software is installed based on the contents of the 2-port RAM 13A, and 30 is a switch circuit for the operator to give commands to the debug support machine 2A. It has n+1 switches.

Next, the operation of one embodiment of the present invention will be explained with reference to FIGS. 2 and 3. First, the function of constantly monitoring the execution state of the actual CPU will be explained. First, in the actual machine 1A to which the software is installed, the actual machine CP
U11A is a 2-port RAM from the debug support machine 2A side.
Based on the information instructing the arithmetic control inputted through 13A and the information inputted to the I/O interface 14, the program stored in the actual machine ROM 12 is sequentially read out, and the arithmetic control is performed. The result is outputted to the outside via the I/O interface 14 as a control output.

In the debug support device 2A, the support device CPU 25A executes a program as shown in the flowchart of FIG. That is, the display mode input by the operator to the switch circuit 30 is read (step 40), the display content is judged according to this display mode, the necessary information is read from the 2-port RAM 13A (step 41), and the actual machine to which the software is installed is read. Display the execution status of 1A on the display circuit 29 (step 4
2).

At this time, since the debug support device 2A only performs the operation of reading the contents of the 2-port RAM 13A for the actual device 1A on which the software is installed, the actual device CPU 11A
has no effect on program execution.

Next, dynamic route control of the program will be explained. This function is compatible with 2-port RAM
A part of 13A is used as actual machine CPU11A and support machine CPU25
This is achieved by using it as A's communication area. A flowchart in this case is shown in FIG.

First, the operator specifies the route of the program that he wants the actual CPU 11A to execute. This operation turns switch 0 in the switch circuit 30 from OFF to ON.
, set switches 1 to n according to the route, and change switch 0 from ON to OFF again.

The support machine CPU 25A first reads the state of switch 0 from the switch circuit 30 (step 50).
), when this is ON (step 51), a flag called c1 in the communication area is set to 1 (step 53), and the operation of the actual CPU 11A is stopped. Next, after confirming that switch 0 is turned OFF and the setting of switches 1 to n is completed by the operator (step 54), switches 1 to n are read, and the control information, which is a parameter in the 2-port RAM 13A, is read. 1 to control information n are set (step 55). At this time, a parameter called control information i is set depending on the state of switch i. Finally, set c1 back to 0 (
Step 56), one procedure ends.

On the other hand, the actual CPU 11A first reads the value of the flag c1 in the communication area in order to determine whether the parameter control information 1 to control information n are being changed. If c1=1, the setting is in progress, so wait until the setting is completed (step 60). After the settings are completed and c1=0, the program is executed along the route determined by the values of control information 1 to control information n.

In the case of this dynamic route control, execution of the actual CPU 11A is stopped while control information 1 to control information n are being set. However, the actual machine C
Most PU11A programs are of a type that ends in a short time and is repeated many times, and this stop is not a problem at all because it is done before and after the repeat to change the route. .

In the above embodiment, the two-port RAM 13A is used for communication between the CPUs, but a CPU equipped with a communication port can be used to transmit the execution status of the actual CPU 11A, or to transmit the flag c1 and control information. i, etc. may be transmitted and received through this communication port.

[0029]

As described above, according to the present invention, a real machine on which software is installed has a real machine CPU that executes software to be debugged, and a real machine memory device that is connected to the real machine CPU via a real machine bus and stores the software. , a debugging support machine having a support machine CPU that reads out the execution state of the software, and a support machine memory device connected to the support machine CPU by a support machine bus,
By connecting the actual device bus and the support device bus, the debug support device
Since the execution status of the software can be read without affecting the actual machine on which the software is installed,
This has the effect of providing a software debugging support device that can read out the execution state even while the PU is executing the program and can also perform dynamic route control.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

FIG. 2 is a flowchart showing the operation of an embodiment of the present invention.

FIG. 3 is a flowchart showing the operation of an embodiment of the present invention.

FIG. 4 is a configuration diagram showing a conventional software debugging support device.

[Explanation of symbols]

1A Actual machine to be loaded with software 2A Debug support machine 11A Actual machine CPU 12 Actual machine ROM 13A 2-port RAM 15 Actual machine bus 25A Support machine CPU 26A Support machine memory device 28A Support machine bus

Claims (2)

[Claims] Claim 1: A real machine CPU that executes software to be debugged, and a real machine bus that connects the real machine CPU.
A debugging device having a software-installed real machine having a real machine memory device connected to the support machine bus to store the software, a support machine CPU reading out the execution state of the software, and a support machine memory device connected to the support machine CPU by a support machine bus. 1. A software debugging support device comprising a support device, the actual device bus and the support device bus being connected to each other. 2. A real machine to be loaded with software, which is provided with a real CPU that executes software to be debugged and has a communication port, and a real memory device that is connected to the real CPU via a real machine bus and stores the software; The present invention is characterized in that it includes a debugging support device that reads the execution state of the software and is provided with a support device CPU that has a communication port, and the communication port of the actual device CPU and the communication port of the support device CPU are connected. Software debugging support device.