JPH0430456B2 - - Google Patents

Info

Publication number
JPH0430456B2
JPH0430456B2 JP13462486A JP13462486A JPH0430456B2 JP H0430456 B2 JPH0430456 B2 JP H0430456B2 JP 13462486 A JP13462486 A JP 13462486A JP 13462486 A JP13462486 A JP 13462486A JP H0430456 B2 JPH0430456 B2 JP H0430456B2
Authority
JP
Japan
Prior art keywords
furnace
gas
ore
blown
tuyere
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP13462486A
Other languages
English (en)
Japanese (ja)
Other versions
JPS62290843A (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13462486A priority Critical patent/JPS62290843A/ja
Publication of JPS62290843A publication Critical patent/JPS62290843A/ja
Publication of JPH0430456B2 publication Critical patent/JPH0430456B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Manufacture And Refinement Of Metals (AREA)
JP13462486A 1986-06-10 1986-06-10 フェロニッケルの製造方法 Granted JPS62290843A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13462486A JPS62290843A (ja) 1986-06-10 1986-06-10 フェロニッケルの製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13462486A JPS62290843A (ja) 1986-06-10 1986-06-10 フェロニッケルの製造方法

Publications (2)

Publication Number Publication Date
JPS62290843A JPS62290843A (ja) 1987-12-17
JPH0430456B2 true JPH0430456B2 (fr) 1992-05-21

Family

ID=15132726

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13462486A Granted JPS62290843A (ja) 1986-06-10 1986-06-10 フェロニッケルの製造方法

Country Status (1)

Country Link
JP (1) JPS62290843A (fr)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6975035B2 (en) 2002-03-04 2005-12-13 Micron Technology, Inc. Method and apparatus for dielectric filling of flip chip on interposer assembly
US7087460B2 (en) 2002-03-04 2006-08-08 Micron Technology, Inc. Methods for assembly and packaging of flip chip configured dice with interposer
US7112520B2 (en) 2002-03-04 2006-09-26 Micron Technology, Inc. Semiconductor die packages with recessed interconnecting structures and methods for assembling the same
US7115986B2 (en) 2001-05-02 2006-10-03 Micron Technology, Inc. Flexible ball grid array chip scale packages
US7129584B2 (en) 2002-01-09 2006-10-31 Micron Technology, Inc. Elimination of RDL using tape base flip chip on flex for die stacking
US7145225B2 (en) 2002-03-04 2006-12-05 Micron Technology, Inc. Interposer configured to reduce the profiles of semiconductor device assemblies and packages including the same and methods
US7161237B2 (en) 2002-03-04 2007-01-09 Micron Technology, Inc. Flip chip packaging using recessed interposer terminals
US7320933B2 (en) 2002-08-20 2008-01-22 Micron Technology, Inc. Double bumping of flexible substrate for first and second level interconnects

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1300352C (zh) * 2005-09-16 2007-02-14 刘沈杰 含结晶水的氧化镍矿经高炉冶炼镍铁工艺
CN1306049C (zh) * 2005-09-16 2007-03-21 刘沈杰 不含结晶水的氧化镍矿经高炉冶炼镍铁工艺

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7115986B2 (en) 2001-05-02 2006-10-03 Micron Technology, Inc. Flexible ball grid array chip scale packages
US7189593B2 (en) 2002-01-09 2007-03-13 Micron Technology, Inc. Elimination of RDL using tape base flip chip on flex for die stacking
US7129584B2 (en) 2002-01-09 2006-10-31 Micron Technology, Inc. Elimination of RDL using tape base flip chip on flex for die stacking
US7145225B2 (en) 2002-03-04 2006-12-05 Micron Technology, Inc. Interposer configured to reduce the profiles of semiconductor device assemblies and packages including the same and methods
US7122907B2 (en) 2002-03-04 2006-10-17 Micron Technology, Inc. Interposer substrate and wafer scale interposer substrate member for use with flip-chip configured semiconductor dice
US7112520B2 (en) 2002-03-04 2006-09-26 Micron Technology, Inc. Semiconductor die packages with recessed interconnecting structures and methods for assembling the same
US6975035B2 (en) 2002-03-04 2005-12-13 Micron Technology, Inc. Method and apparatus for dielectric filling of flip chip on interposer assembly
US7161237B2 (en) 2002-03-04 2007-01-09 Micron Technology, Inc. Flip chip packaging using recessed interposer terminals
US7087460B2 (en) 2002-03-04 2006-08-08 Micron Technology, Inc. Methods for assembly and packaging of flip chip configured dice with interposer
US7230330B2 (en) 2002-03-04 2007-06-12 Micron Technology, Inc. Semiconductor die packages with recessed interconnecting structures
US7348215B2 (en) 2002-03-04 2008-03-25 Micron Technology, Inc. Methods for assembly and packaging of flip chip configured dice with interposer
US7531906B2 (en) 2002-03-04 2009-05-12 Micron Technology, Inc. Flip chip packaging using recessed interposer terminals
US7534660B2 (en) 2002-03-04 2009-05-19 Micron Technology, Inc. Methods for assembly and packaging of flip chip configured dice with interposer
US7569473B2 (en) 2002-03-04 2009-08-04 Micron Technology, Inc. Methods of forming semiconductor assemblies
US7320933B2 (en) 2002-08-20 2008-01-22 Micron Technology, Inc. Double bumping of flexible substrate for first and second level interconnects

Also Published As

Publication number Publication date
JPS62290843A (ja) 1987-12-17

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