JPH04315230A - One-chip microcomputer - Google Patents

Abstract

PURPOSE:To simultaneously and parallelly test a circuit to use a built-in CPU for the test and a circuit not to use the CPU for the test according by setting a test mode. CONSTITUTION:A switch 5 is interposed to a bus 2 connecting a CPU 1, circuit 3 to use this CPU 1 for the test and circuit 4 not to use the CPU 1 for the test and under the test mode, the switch 5 is turned off.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a one-chip microcomputer with a test mode function for peripheral circuits.

0002

2. Description of the Related Art In recent years, one-chip microcomputers have been known in which a semiconductor integrated circuit itself has a test mode function in addition to its original operating mode for function checking. By the way, when executing the test mode, various external devices for testing are connected to the port, and the test is executed using these external devices for testing and the CPU built in the one-chip microcomputer itself. . However, the peripheral circuits to be tested include circuits that can be tested using only an external device for testing, and peripheral circuits that additionally use the built-in CPU, so a configuration compatible with these is required.

FIG. 2 is a schematic diagram of a conventional one-chip microcomputer, in which 1 indicates the built-in CPU.
, 2 is a bus, 3 is a peripheral circuit that needs to use the CPU 1 during testing, 4 is a peripheral circuit that does not need to use the CPU 1 during testing, and 5 is a switch. C.P.
U1 is connected through a bus 2 to ports P0 to P7 for connecting the peripheral circuits 3 and 4 and external devices. The switch 5 is connected to the bus 2 in close proximity to the input and output terminals of the CPU 1. When testing the peripheral circuit 3 in the test mode, the switch 5 is turned on and the CPU 1 is turned on.
A test is performed using PU 1 and external testing devices connected to ports P0 to P7. Also, when testing the peripheral circuit 4, turn off the switch 5 and turn off the port P0.
A test is performed using an external device for testing connected to ~P7. That is, after the test for either one of the peripheral circuits 3 or 4 is completed, the test for the other peripheral circuit is performed.

0004

[Problems to be Solved by the Invention] However, in such a conventional one-chip microcomputer, when one of the peripheral circuits 3 and 4 is being tested, the other peripheral circuit is not being tested. Since it becomes impossible to test, there is a problem that the test takes a long time. The present invention was made in view of the above circumstances, and its purpose is to test a circuit that uses a built-in CPU and a built-in CPU.
To provide a one-chip microcomputer capable of simultaneously testing a circuit to be tested without using a PU.

[0005]

[Means for Solving the Problems] A one-chip microcomputer according to the present invention provides a bus that connects a built-in CPU and peripheral circuits that use this CPU during testing and peripheral circuits that do not use this CPU during testing. Provide an on/off switch.

[0006]

[Operation] According to the present invention, when testing, peripheral circuits that use the built-in CPU can be tested using an external device for testing connected to the CPU and ports, and peripheral circuits that do not use the CPU can be tested. It is now possible to test in parallel using only external devices connected to the port.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be specifically explained below based on drawings showing embodiments thereof. FIG. 1 is a schematic diagram of a one-chip microcomputer according to the present invention, in which 1 is a CPU
, 2 is the bus, and 3 is the built-in CPU for testing.
1 is a peripheral circuit that needs to be used, 4 is a built-in CPU during testing, a peripheral circuit that does not need to use 1, 5
indicates a switch. CPU 1, peripheral circuits 3, 4
The ports P0 to P7 are connected to each other via a bus 2 so as to be able to exchange data with each other. This bus 2 includes the CPU 1, peripheral circuit 3, and ports P0 to
A switch 5 is interposed in the bus 2 at an intermediate position connecting P3, the peripheral circuit 4, and ports P4 to P7. The opening/closing control of switch 5 is set to C when set to test mode.
It is controlled to be turned off by inputting a signal from PU 1 or the outside.

When such a one-chip microcomputer is set to the test mode, necessary external devices for testing are connected to each port P0 to P7, and the switch 5 is turned off. As a result, the peripheral circuit 3 is simultaneously tested by the external test device connected to the CPU 1 and ports P0 to P3, and the peripheral circuit 4 is simultaneously tested by the external test device connected to the ports P4 to P7. This means that they can be implemented in parallel. Note that in the above embodiment, the configuration was explained in which the peripheral circuit 3 using the CPU 1 and the peripheral circuit 4 not using the CPU 1 were divided during testing, but it is also possible to simultaneously test multiple peripheral circuits using only an external device without using the CPU 1. may be made possible.

[0009]

As described above, in the one-chip microcomputer according to the present invention, testing of circuits that require the use of the built-in CPU during testing and circuits that do not require the use of this CPU during testing can be performed using a switch. The present invention has excellent effects such as being able to perform tests in parallel depending on the operation, thereby significantly shortening the test time.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a one-chip microcomputer according to the present invention.

FIG. 2 is a block diagram of a conventional one-chip microcomputer.

[Explanation of symbols]

1 CPU 2 Bus 3,4 Peripheral circuit 5 Switch

Claims (1)

[Claims] [Claim 1] CPU capable of setting test mode
and a circuit to be tested using the CPU and the CPU.
and other circuits to be tested without using these C
In a one-chip microcomputer in which a PU and both circuits transmit and receive information using the same bus, a switch is provided to disconnect the bus between the first circuit and CPU and the other circuit. A one-chip microcomputer characterized by: