JPH04341069A - Horizontal deflection circuit - Google Patents

Abstract

PURPOSE:To eliminate a cause to destruction of a horizontal transistor(TR) at horizontal deflection frequency changeover in a display device compatible with two horizontal frequencies. CONSTITUTION:A horizontal deflection control circuit 2 controls an fh changeover circuit 3 to make switching when a low horizontal deflection frequency of a switching signal 1 is switched to a high horizontal deflection frequency and controls a +B voltage control circuit 4 to make switching. When a high horizontal deflection frequency of the switching signal 1 is switched to a low horizontal deflection frequency, the control circuit 2 controls the +B voltage control circuit 4 to make switching at first and then controls the fh control circuit 3 to make switching, A cause to destruction of a horizontal output TR is eliminated by allowing the horizontal deflection control circuit 2 to control the fh changeover circuit 3 and the +B voltage control circuit 4 in this way.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a horizontal deflection circuit for displays, televisions, etc., which has a horizontal deflection circuit capable of handling two horizontal frequencies.

0002

2. Description of the Related Art It is a well-known fact that in a display device using a horizontal deflection circuit capable of handling a plurality of horizontal frequencies, the +B voltage is changed in response to changes in the horizontal frequency. Furthermore, as a circuit of this kind, Utility Model Application No. 62-990
97.

0003

[Problem to be solved by the invention] In the above conventional technology, +
The timing for switching the B voltage was not determined. Therefore, when the horizontal deflection frequency is switched from low to high, if the +B voltage is switched before fh, the voltage between the collector and emitter of the horizontal output transistor becomes higher than in normal operation. Furthermore, when switching the horizontal deflection frequency from a high frequency to a low frequency, if fh is switched before the +B voltage, the voltage between the collector and emitter of the horizontal output transistor becomes higher than in normal operation. In other words, unless a sufficient margin is set for the voltage between the collector and emitter of the horizontal output transistor in normal operation with respect to the absolute maximum rating, there is a problem in that the horizontal output transistor will be destroyed when the horizontal deflection frequency is switched.

0004

[Means for solving the problem] In order to solve the above problem, when switching the horizontal deflection frequency from low to high, first switch fh, then switch the +B voltage, and then increase the horizontal deflection frequency to high. When switching from one to a lower voltage, first switch the +B voltage and then switch the fh, according to the switching signal, an fh switching circuit,
A horizontal deflection control circuit is provided to control switching timing of the +B voltage switching circuit.

The horizontal deflection control circuit includes an integrating circuit that integrates the switching signal, and a reference voltage V1, which is connected to the inverting input terminal.
The first circuit inputs the above-mentioned integrating circuit output voltage to the non-inverting input terminal.
and a second voltage comparator having an inverting input terminal inputted with the reference voltage V2 and a non-inverting input terminal inputting the output voltage of the integrating circuit, and comparing the first voltage comparator and the second voltage comparator. This is achieved by controlling the switching timing of the fh switching circuit and the +B voltage switching circuit using the output signal of the device.

Furthermore, the switching signal is input to the OR circuit and the AND circuit, the output of the OR circuit is input to the D input of the first D type flip-flop, and the Q output is input to the AN
A circuit is provided in which the output of the AND circuit is input to the D input of the second D type flip-flop, and its Q output is input to the OR circuit, and the Q of the first D type flip-flop is input to the D circuit. The output controls the fh switching circuit, and the Q output of the above second D type flip-flop controls +B.
This can also be accomplished by providing a horizontal deflection control circuit that controls the voltage switching circuit.

[0007]

[Operation] The first voltage comparator switches the fh switching circuit when the output voltage of the integrating circuit becomes higher than the reference voltage V1. Further, the second voltage comparator switches the +B voltage switching circuit when the output voltage of the integrating circuit becomes higher than the reference voltage V2. At this time,
When switching the horizontal deflection frequency to a higher side, the switching signal is set to a high level, and when switching to a lower side, the switching signal is set to a low level.If the reference voltage V1 is set lower than the reference voltage V2, the horizontal deflection frequency is set to a lower level. When switching from high to high horizontal deflection frequency, first switch fh and then switch +B voltage, and when switching from high horizontal deflection frequency to low horizontal deflection frequency, first switch +B voltage and then switch fh.

Furthermore, the switching signal is input to the OR circuit and the AND circuit, the output of the OR circuit is input to the D input of the first D type flip-flop, and the Q output is input to the AN
A circuit is provided in which the output of the AND circuit is input to the D input of the second D type flip-flop, and its Q output is input to the OR circuit, and the Q of the first D type flip-flop is input to the D circuit. The output controls the fh switching circuit, and the Q output of the above second D type flip-flop controls +B.
When a horizontal deflection control circuit is provided to control the voltage switching circuit, the Q output of the first D-type flip-flop is determined whether the switching signal is at a high level or the Q output of the second D-type flip-flop is at a high level. If so, it will be at a high level. Furthermore, the Q output of the second D-type flip-flop becomes high level if both the switching signal and the Q output of the first D-type flip-flop are at high level, so the horizontal deflection frequency is set higher. When switching to the horizontal deflection frequency, set the switching signal to high level, and when switching to the lower side, set the switching signal to low level. When switching the horizontal deflection frequency from the lower side to the higher side, first switch fh, then switch the +B voltage, When switching from a higher horizontal deflection frequency to a lower horizontal deflection frequency, first press +
The operation of switching the B voltage and then switching fh is performed.

[0009]

Embodiments Hereinafter, embodiments of the present invention will be explained in detail with reference to the drawings. FIG. 1 is a diagram showing the principle of the present invention. In Figure 1, 1 is a switching signal for switching the horizontal deflection frequency of the horizontal deflection circuit, and 3 is fh for switching the horizontal oscillation frequency.
A switching circuit, 4 is a +B voltage switching circuit that switches the power supply voltage supplied to the horizontal deflection circuit, 2 is a switching signal 1
Based on fh switching circuit 3 and +B voltage switching circuit 4
This is a horizontal deflection control circuit that controls switching timing. When the switching signal 1 is a signal for switching from a low horizontal deflection frequency to a high horizontal deflection frequency, the horizontal deflection control circuit 2 controls the fh switching circuit 3 to perform the switching operation first, and then the +B voltage control circuit 4 performs the switching operation. control to perform the following. When the switching signal 1 is a signal for switching from a high horizontal deflection frequency to a low horizontal deflection frequency, the +B voltage switching circuit 4 is first controlled to perform the switching operation, and then the fh control circuit 3 is controlled to perform the switching operation.

Next, the switching signal 1 is at a low level when the horizontal deflection frequency is low, and is at a high level when the horizontal deflection frequency is high, and the fh switching circuit 3 is set at a low level when the input signal is at a low level. fh for frequency, fh for high horizontal deflection frequency when input signal is high level
, +B voltage switching circuit 4 controls horizontal deflection when the input signal is low level, +B voltage for low horizontal deflection frequency, and when the input signal is high level, +B voltage for high horizontal deflection frequency. A specific circuit example of circuit 2 will be explained. Figure 2 shows an example of the horizontal deflection control circuit 2 configured with an analog circuit, and Figure 4 shows the horizontal deflection control circuit 2.
This is an example of a digital circuit.

FIG. 2 will be described in detail. In FIG. 2, the horizontal deflection control circuit 2 includes an integrating circuit composed of a resistor 5, a capacitor 6, a first voltage comparator 7, a second voltage comparator 8, and an inverting input of the first voltage comparator 7. Reference voltage 9 is applied to the terminal, and reference voltage 1 is applied to the inverting input terminal of the second voltage comparator 8.
Consists of 0. FIG. 3 shows the operating waveforms in FIG. 2, where 11 is a signal output from switching signal 1;
12 is an output waveform of an integrating circuit composed of a resistor 5 and a capacitor 6, 13 is a signal output from the first voltage comparator 7 of the horizontal deflection control circuit 2 and controls the switching timing of the fh switching circuit 3, and 14 is a horizontal waveform. This signal is output from the second voltage comparator 8 of the deflection control circuit 2 and controls the switching timing of the +B voltage switching circuit 4.

In FIG. 2, the reference voltage 9 is set to V1,
If the reference voltage 10 is V2, and V1 and V2 are set to the level of the transient state of the integral waveform 12, and V1 is set lower than V2, when changing the horizontal deflection frequency from low to high, the switching signal is Signal 11 output from 1
changes from low level to high level, and the output waveform 12 of the integrating circuit composed of resistor 5 and capacitor 6 gradually increases, and at the point when it first reaches the same level as V1,
When the output of the first voltage comparator 7 becomes high level and the fh switching circuit 3 switches fh, the output waveform 12 of the integrating circuit composed of the resistor 5 and the capacitor 6 becomes the same level as V2. The output of voltage comparator 8 of No. 2 becomes high level, and +B voltage switching circuit 4 switches the +B voltage. When changing the horizontal deflection frequency from high to low, the signal 11 output from the switching signal 1 changes from high level to low level, and the output waveform 12 of the integrating circuit composed of resistor 5 and capacitor 6 changes. , gradually decreases, and first, when it reaches the same level as V2, the output of the second voltage comparator 8 becomes low level, and the +B voltage switching circuit 4 switches the +B voltage, which is later configured with a resistor 5 and a capacitor 6. When the output waveform 12 of the integrating circuit reaches the same level as V1, the output of the first voltage comparator 7 becomes low level, and the fh switching circuit 3 switches fh. In other words, as shown in FIG. 3, when the signal 11 output from the switching signal 1 changes from low level to high level, it is first output from the first voltage comparator 7 and controls the switching timing of the fh switching circuit 3. The signal becomes high level, and then the second voltage comparator 8 outputs +B.
The signal controlling the switching timing of the voltage switching circuit 4 becomes high level. When the signal 11 output from the switching signal 1 changes from high level to low level, first the signal output from the second voltage comparator 8 and controlling the switching timing of the +B voltage switching circuit 4 becomes low level. Next, the first voltage comparator 7 outputs f
The signal that controls the switching timing of the h switching circuit 3 becomes low level.

Next, FIG. 4 will be described in detail. In FIG. 4, the horizontal deflection control circuit 2 includes an OR circuit 15, an AN
It consists of a D circuit 16, a first D type flip-flop 17, and a second D type flip-flop 18. FIG. 5 shows the operating waveforms in FIG. 4, where 21 is a clock pulse for the first D-type flip-flop 17 and the second D-type flip-flop 18, and 11 is output from the switching signal 1. 19 is the Q output of the first D-type flip-flop 17 of the horizontal deflection control circuit 2; a signal for controlling the switching timing of the fh switching circuit 3; 20 is the second D-type flip-flop of the horizontal deflection control circuit 2; This is a signal that controls the switching timing of the +B voltage switching circuit 4 using the Q output of 18.

Q of the first D type flip-flop 17
Since an OR circuit having the output of switching signal 1 and the Q output of the second D type flip-flop as inputs is connected to the D input, the output is either the output of switching signal 1 or the Q output of the second D type flip-flop.
If either of the Q outputs of the type flip-flop is at a high level, it becomes a high level, and when both the output of the switching signal 1 and the Q output of the second D-type flip-flop 18 are at a low level, it becomes a low level. The Q output of the second D-type flip-flop 18 is connected to the D input of an AND circuit having the output of the switching signal 1 and the Q output of the first D-type flip-flop 17 as inputs.
If either the output of the switching signal 1 or the Q output of the second D-type flip-flop is at a low level, it becomes a low level, and both the output of the switching signal 1 and the Q output of the second D-type flip-flop are at a low level. becomes high level when is high level. In other words, when the signal 11 output from the switching signal 1 changes from low level to high level as shown in FIG. The control signal 19 becomes high level, and then the Q output of the second D type flip-flop 18 controls the switching timing of the +B voltage switching circuit 4.
0 becomes a high level. When the signal 11 output from the switching signal 1 changes from high level to low level, first, the signal 20 that controls the switching timing of the +B voltage switching circuit 4 at the Q output of the second D type flip-flop 18 goes low. Then, the signal 19, which controls the switching timing of the fh switching circuit 3 using the Q output of the first D-type flip-flop 17, becomes low level.

Although not specified in FIGS. 4 and 5, the clock pulse 21 is a horizontal deflection pulse,
It is also possible to use horizontal blanking pulses, vertical blanking pulses, or several frequency divisions of these pulses.

[0016]

[Effects of the Invention] Since the present invention is constructed as described above, it produces the effects as described below.

By controlling the fh switching circuit and the +B voltage switching circuit using the horizontal deflection control circuit, it is possible to eliminate the cause of destruction of the horizontal output transistor. Further, the horizontal deflection control circuit can be easily built into the deflection IC.

[Brief explanation of drawings]

[Figure 1] Principle diagram of the present invention

[Fig. 2] A circuit diagram of an example of the horizontal deflection control circuit of the present invention configured with an analog circuit.

[Figure 3] Operation waveform diagram in Figure 2

[Fig. 4] A circuit diagram of an example of the horizontal deflection control circuit of the present invention configured with a digital circuit.

[Figure 5] Operation waveform diagram in Figure 4

[Explanation of symbols]

1...Switching signal 2...Horizontal deflection control circuit 3...fh switching circuit 4...+B voltage switching circuit

Claims (4)

[Claims] Claim 1: Horizontal oscillation frequency (hereinafter fh
In a horizontal deflection circuit that can handle two horizontal frequencies, it has an fh switching circuit that switches the power supply voltage (hereinafter referred to as +B voltage) supplied to the horizontal deflection circuit, and a +B voltage switching circuit that switches the power supply voltage (hereinafter referred to as +B voltage) supplied to the horizontal deflection circuit. When switching the frequency from low to high, first switch fh, then switch the +B voltage, and when switching the horizontal deflection frequency from high to low, first switch the +B voltage, then switch fh. A horizontal deflection circuit comprising a horizontal deflection control circuit that controls the fh switching circuit and the +B voltage switching circuit according to a switching signal so as to switch the fh switching circuit. 2. The horizontal deflection control circuit according to claim 1, comprising: an integrating circuit that integrates the switching signal; a first voltage having a reference voltage V1 inputted to an inverting input terminal and the output voltage of the integrating circuit inputted to a non-inverting input terminal; A comparator and a second voltage comparator having an inverting input terminal inputted with a reference voltage V2 and a non-inverting input terminal inputting the output voltage of the integrating circuit are provided, and the first voltage comparator and the second voltage comparator are connected to each other. A horizontal deflection circuit characterized in that the switching timing of an fh switching circuit and a +B voltage switching circuit is controlled by an output signal. 3. The horizontal deflection control circuit according to claim 1, wherein the switching signal is input to an OR circuit and an AND circuit, and the output of the OR circuit is input to the D input of a first D type flip-flop; A circuit is provided in which the Q output is input to the AND circuit, the output of the AND circuit is input to the D input of the second D type flip-flop, and the Q output is input to the OR circuit. The Q output of the flip-flop and the second D-type flip-flop is f.
A horizontal deflection circuit characterized by controlling switching timing of an h switching circuit and a +B voltage switching circuit. 4. The horizontal deflection control circuit according to claim 3, wherein the first D-type flip-flop and the second D-type flip-flop
type flip-flop clock with deflection pulse or
A horizontal deflection circuit characterized by using a frequency-divided deflection pulse.