JPH0436478B2 - - Google Patents
Info
- Publication number
- JPH0436478B2 JPH0436478B2 JP59071387A JP7138784A JPH0436478B2 JP H0436478 B2 JPH0436478 B2 JP H0436478B2 JP 59071387 A JP59071387 A JP 59071387A JP 7138784 A JP7138784 A JP 7138784A JP H0436478 B2 JPH0436478 B2 JP H0436478B2
- Authority
- JP
- Japan
- Prior art keywords
- stainless steel
- oxide film
- steel material
- insulator
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Glass Compositions (AREA)
- Insulated Metal Substrates For Printed Circuits (AREA)
Description
本発明は、混成集積回路基板（いわゆるハイブ
リツドIC基板）の改良に関する。
従来、ハイブリツドIC基板としてアルミナ基
板が用いられている。しかしアルミナ基板は、そ
の大きさに制限があり、大型のものを作ることが
難かしく、また加工性が悪い。しかも大量生産が
できず、放熱性が悪いなどの問題がある。
近時ICの高集積化が進み、また多方面への需
要が広がつているが、アルミナ基板は上述した問
題があるため、これらの対応することが困難であ
る。
このようなことから、アルミナ基板に代えて鉄
やアルミニウム等の金属基板が考えられている。
しかしアルミニウム基板は、加工性、生産性、放
熱性などに秀れているものの、耐食性に劣り、問
題がある。また鉄基板は、琺瑯処理することによ
り、耐食性、耐熱性が改善されるものの、その反
面加工性が顕著に悪くなる。
本発明は、この問題を解決すべくなされたもの
で、その目的とするところは、大型で加工性、放
熱性、耐食性、耐熱性などの秀れた混成集積回路
基板を得んとするものである。
以下本発明を図示する実施例を参照して説明す
る。
本発明に係る混成集積回路基板は、ステンレス
鋼素材１の表面に酸化皮膜２を形成し、この皮膜
上にガラス質絶縁物３を塗布焼成して構成されて
いる。
ステンレス鋼素材１は、アルミニウム基板や鉄
基板と異なり、加工性、耐食性、耐熱性のすべて
に秀れ、基板素材として好適なものである。ステ
ンレス鋼の種類は、オーステナイト系ステンレス
鋼よりも熱膨張係数が小さく、Ni含有量が0.60重
量％未満のフエライト系ステンレス鋼とする。
またフエライト系ステンレス鋼は、従来のアル
ミナ基板と熱抵抗特性が類似している点において
も、回路設計上好適である。例えば第２図に各種
基板上に形成した電気回路の面積抵抗と温度係数
との関係を示している。第２図からフエライト系
ステンレス鋼であるSUS430の特性がアルミナ基
板に近いことがわかる。なお図中縦軸ａはａに示
す材質の座標軸、縦軸ｂはｂに示す材質の座標軸
である。
このステンレス鋼素材１を混成集積回路基板と
して使用するには、基板上に作成する回路をステ
ンレス鋼素材１から電気的に絶縁する必要があ
る。しかしステンレス鋼素材１にガラス質絶縁物
を直接塗布、焼成すると、ガラスの膨張係数がス
テンレス鋼に比べて小さいため、熱膨張差により
両者の剥離現象が起こる。このため、このもの
は、実質上基板として用いることができない。
そこで本発明では、ステンレス鋼素材１の表面
に酸化皮膜２を形成して、ステンレス鋼素材１と
ガラス質絶縁物３との密着性を高め、焼成時の剥
離現象を防止している。酸化皮膜２でステンレス
鋼素材１とガラス質絶縁物３との密着性が良くな
るのは、ガラス質絶縁物３の焼成時に、ガラス質
物質と酸化皮膜とが反応してステンレス鋼とガラ
スとの間に中間物質層が生成されるためである。
このことは、イオンマイクロアナライザーによる
界面の分析によつて確認されている。
この酸化皮膜２は、鉄−クロム系のスピネル型
酸化物や、クロム系又はアルミニウム系のコラン
ダム型酸化物が主体となつていることが好まし
い。酸化皮膜２の厚さは、中間生成物層の厚さに
影響し、密着性にも影響する。従つてこれらを考
慮して酸化皮膜２の厚さは、数百〜数千Åが適当
である。このような酸化皮膜２は、通常酸化雰囲
気で加熱処理することにより得られる。この処理
条件は、ステンレス鋼の成分組成によつて異な
り、また同一鋼種でも雰囲気、温度、時間の組合
せによつて多種多様である。要は、どのような処
理条件でも前述したような酸化皮膜が生成される
ものであればよい。
この酸化皮膜２上に塗布焼成するガラス質絶縁
物３は、例えば硼珪酸鉛にアルミナを10〜30含量
％含有させたものが好ましい。このガラス質絶縁
物３の厚さは、特に限定されるものではないが、
通常20〜60μm程度である。また焼成条件は、従
来公知の条件でよく、例えば750〜950℃で焼成す
る。
次に本発明の実施例につき説明する。
本発明に係る混成集積回路基板におけるステン
レス鋼素材とガラス質絶縁物との密着性を調べる
ために、酸化皮膜を介在した場合（本発明品）と
介在しない場合（比較品）とにつき剥離試験を行
つた。
〔回路基板の作製〕
ステンレス鋼素材としてFe−19Cr−0.4Nbと
Fe−17Crの２種のフエライト系ステンレス鋼を
用い、各ステンレス鋼素材に酸化皮膜（厚さ
0.1μ）を形成してこれにガラス質絶縁物（厚さ
40μ）を塗布、焼成して本発明に係る回路基板を
作製した。
一方比較回路基板については、各ステンレス鋼
素材に直接ガラス質絶縁物を塗布、焼成して回路
基板を作製した。
〔試験方法〕
このように作製した各回路基板について、塗
布、焼成した後０℃←→100℃の温度サイクル試験
を10サイクル行ない、ガラス面に３mmφのアルミ
ニウム性ピンを立てて、接着材で固定し、垂直引
張り試験を行なつた。
〔試験結果〕
その結果、酸化皮膜が形成されていない比較例
のものは、温度サイクル試験中にガラス質絶縁物
がステンレス鋼素材表面から剥離した。これに対
し本発明のものは、引張り試験によつても剥離せ
ず、ピンとガラス面を接着した接着材の部分から
剥離した。その結果を第１表に示す。
The present invention relates to improvements in hybrid integrated circuit boards (so-called hybrid IC boards). Conventionally, alumina substrates have been used as hybrid IC substrates. However, alumina substrates are limited in size, making it difficult to make large ones and having poor processability. Moreover, it cannot be mass-produced and has problems such as poor heat dissipation. In recent years, ICs have become more highly integrated, and demand is expanding in a variety of fields, but alumina substrates have the above-mentioned problems, making it difficult to meet these demands. For this reason, metal substrates such as iron and aluminum are being considered in place of alumina substrates.
However, although aluminum substrates are excellent in workability, productivity, heat dissipation, etc., they have a problem in that they are inferior in corrosion resistance. Further, although the corrosion resistance and heat resistance of iron substrates are improved by enameling, the workability is significantly deteriorated. The present invention was made to solve this problem, and its purpose is to obtain a large-sized hybrid integrated circuit board with excellent processability, heat dissipation, corrosion resistance, heat resistance, etc. be. The present invention will be described below with reference to illustrative embodiments. The hybrid integrated circuit board according to the present invention is constructed by forming an oxide film 2 on the surface of a stainless steel material 1, and coating and baking a glass insulator 3 on this film. Unlike an aluminum substrate or an iron substrate, the stainless steel material 1 has excellent workability, corrosion resistance, and heat resistance, and is suitable as a substrate material. The type of stainless steel is ferritic stainless steel, which has a smaller coefficient of thermal expansion than austenitic stainless steel and has a Ni content of less than 0.60% by weight. Ferritic stainless steel is also suitable for circuit design because it has similar thermal resistance characteristics to conventional alumina substrates. For example, FIG. 2 shows the relationship between the sheet resistance and temperature coefficient of electric circuits formed on various substrates. Figure 2 shows that the characteristics of SUS430, a ferritic stainless steel, are similar to those of an alumina substrate. In the figure, the vertical axis a is the coordinate axis of the material shown in a, and the vertical axis b is the coordinate axis of the material shown in b. In order to use this stainless steel material 1 as a hybrid integrated circuit board, it is necessary to electrically insulate the circuit formed on the board from the stainless steel material 1. However, when a vitreous insulator is directly applied to the stainless steel material 1 and fired, since the coefficient of expansion of glass is smaller than that of stainless steel, a peeling phenomenon occurs between the two due to the difference in thermal expansion. Therefore, this material cannot be used as a substrate in practice. Therefore, in the present invention, an oxide film 2 is formed on the surface of the stainless steel material 1 to improve the adhesion between the stainless steel material 1 and the glassy insulator 3 and to prevent the peeling phenomenon during firing. The reason why the oxide film 2 improves the adhesion between the stainless steel material 1 and the glassy insulator 3 is that when the glassy insulator 3 is fired, the vitreous material and the oxide film react and the stainless steel and glass bond together. This is because an intermediate material layer is generated in between.
This has been confirmed by analysis of the interface using an ion microanalyzer. The oxide film 2 is preferably mainly composed of an iron-chromium spinel oxide or a chromium- or aluminum-based corundum oxide. The thickness of the oxide film 2 affects the thickness of the intermediate product layer and also affects the adhesion. Therefore, taking these into consideration, the appropriate thickness of the oxide film 2 is several hundred to several thousand angstroms. Such an oxide film 2 is usually obtained by heat treatment in an oxidizing atmosphere. The processing conditions vary depending on the composition of the stainless steel, and even for the same type of steel, they vary depending on the combination of atmosphere, temperature, and time. In short, any treatment conditions may be used as long as the oxide film as described above is produced. The glassy insulator 3 to be coated and fired on the oxide film 2 is preferably one made of lead borosilicate containing 10 to 30% alumina. The thickness of this glass insulator 3 is not particularly limited, but
It is usually about 20 to 60 μm. Further, the firing conditions may be conventionally known conditions, for example, firing at 750 to 950°C. Next, examples of the present invention will be described. In order to investigate the adhesion between the stainless steel material and the glass insulator in the hybrid integrated circuit board according to the present invention, a peel test was conducted with and without an oxide film (inventive product) and without an oxide film (comparative product). I went. [Preparation of circuit board] Fe-19Cr-0.4Nb and stainless steel materials were used.
Two types of ferritic stainless steels, Fe-17Cr, are used, and each stainless steel material has an oxide film (thickness
0.1μ) and then coat this with a glassy insulator (thickness
A circuit board according to the present invention was produced by coating and baking a 40 μm film. On the other hand, for comparison circuit boards, a glass insulator was directly coated on each stainless steel material and fired. [Test method] After coating and baking each circuit board produced in this way, a temperature cycle test of 0°C←→100°C was performed for 10 cycles, and aluminum pins of 3 mm diameter were set on the glass surface and fixed with adhesive. Then, a vertical tensile test was conducted. [Test Results] As a result, in the comparative example in which no oxide film was formed, the glassy insulator peeled off from the surface of the stainless steel material during the temperature cycle test. On the other hand, the product of the present invention did not peel off even in the tensile test, but peeled off from the adhesive bonding the pin and the glass surface. The results are shown in Table 1.
【表】
また酸化皮膜は、Cr2O3とFeCr2O4の混合酸化
物が主体であつた。
更に本発明に係る回路基板の耐圧は、ステンレ
ス鋼としてFe−19Cr−0.4Nbを用いたもので
1.3kV、Fe−17Crを用いたもので1.2kVであり、
基板としての特性を十分に満足していた。
以上説明したように本発明によれば、回路基板
の素材としてステンレス鋼を用いるので、耐食
性、耐熱性、加工性及び放熱性のいずれも秀れ、
大型基板を大量生産することができ、コストを大
幅に低減することができる。また基板の加工がで
きるので、それ自体を構造用部品とすることがで
き、新しい用途分野に利用できる。
更にまた、酸化皮膜を介在させることにより、
ガラス質絶縁物をステンレス鋼素材に密着させる
ことができ、使用時における剥離を防止すること
ができる顕著な効果を奏する。[Table] The oxide film was mainly composed of a mixed oxide of Cr 2 O 3 and FeCr 2 O 4 . Furthermore, the withstand voltage of the circuit board according to the present invention is that using Fe-19Cr-0.4Nb as stainless steel.
1.3kV, 1.2kV using Fe-17Cr,
The characteristics as a substrate were fully satisfied. As explained above, according to the present invention, since stainless steel is used as the material for the circuit board, it has excellent corrosion resistance, heat resistance, workability, and heat dissipation.
Large substrates can be mass-produced, and costs can be significantly reduced. Furthermore, since the substrate can be processed, it can be used as a structural component and can be used in new fields of application. Furthermore, by interposing an oxide film,
The glassy insulator can be brought into close contact with the stainless steel material, and has the remarkable effect of preventing peeling during use.
第１図は本発明に係る混成集積回路基板の一例
を示す断面図、第２図は回路基板を構成する各素
材について、そこに形成された回路の面積抵抗と
温度係数との関係を示す説明図である。
１……ステンレス鋼素材、２……酸化皮膜、３
……ガラス質絶縁物。
FIG. 1 is a cross-sectional view showing an example of a hybrid integrated circuit board according to the present invention, and FIG. 2 is an explanation showing the relationship between sheet resistance and temperature coefficient of a circuit formed on each material constituting the circuit board. It is a diagram. 1... Stainless steel material, 2... Oxide film, 3
...glass insulator.
Claims (1)
テンレス鋼素材と、その表面に形成された酸化皮
膜と、同皮膜上に塗布焼成されたガラス質絶縁物
と、上記酸化皮膜とガラス質絶縁物との間に介在
する、酸化皮膜とガラス質絶縁物との反応で生じ
た中間物質層とを具備した混成集積回路。 ２ フエライト系ステンレス鋼素材は、ニオブが
含有されている特許請求の範囲第１項記載の混成
集積回路。 ３ フエライト系ステンレス鋼素材に含有される
ニオブの含有量は0.4重量％である特許請求の範
囲第２項記載の混成集積回路。[Claims] 1. A ferritic stainless steel material with a Ni content of less than 0.60% by weight, an oxide film formed on its surface, a glassy insulator coated and fired on the film, and the oxide film and a glassy insulator and an intermediate material layer formed by a reaction between an oxide film and a glassy insulator. 2. The hybrid integrated circuit according to claim 1, wherein the ferritic stainless steel material contains niobium. 3. The hybrid integrated circuit according to claim 2, wherein the niobium content contained in the ferritic stainless steel material is 0.4% by weight.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7138784A JPS60214583A (en) | 1984-04-10 | 1984-04-10 | hybrid integrated circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7138784A JPS60214583A (en) | 1984-04-10 | 1984-04-10 | hybrid integrated circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60214583A JPS60214583A (en) | 1985-10-26 |
| JPH0436478B2 true JPH0436478B2 (en) | 1992-06-16 |
Family
ID=13459045
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7138784A Granted JPS60214583A (en) | 1984-04-10 | 1984-04-10 | hybrid integrated circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60214583A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62198137A (en) * | 1986-02-26 | 1987-09-01 | Nippon Kinzoku Kk | Insulating substrate for electric device |
| JPH034584A (en) * | 1989-06-01 | 1991-01-10 | Matsushita Electric Ind Co Ltd | Hybrid integrated circuit device |
| JPH034585A (en) * | 1989-06-01 | 1991-01-10 | Matsushita Electric Ind Co Ltd | Hybrid integrated circuit device |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5332376A (en) * | 1976-09-07 | 1978-03-27 | Tokyo Shibaura Electric Co | Electric device substrate |
| JPS53116473A (en) * | 1977-03-23 | 1978-10-11 | Tokyo Shibaura Electric Co | Electric device board |
-
1984
- 1984-04-10 JP JP7138784A patent/JPS60214583A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60214583A (en) | 1985-10-26 |
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