JPH0438043U - - Google Patents
Info
- Publication number
- JPH0438043U JPH0438043U JP1990079932U JP7993290U JPH0438043U JP H0438043 U JPH0438043 U JP H0438043U JP 1990079932 U JP1990079932 U JP 1990079932U JP 7993290 U JP7993290 U JP 7993290U JP H0438043 U JPH0438043 U JP H0438043U
- Authority
- JP
- Japan
- Prior art keywords
- pattern
- lead pattern
- lead
- stages
- bonding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
- H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
- H10W72/07554—Controlling the environment, e.g. atmosphere composition or temperature changes in dispositions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/547—Dispositions of multiple bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Description
第1図は、この考案の一実施例によるワイヤー
ボンデイングリードパターンの上面図、第2図は
第1図の一部拡大図、第3図〜第5図は従来のワ
イヤボンデイングリードパターンを説明する説明
図である。
図において、10は高密度リードパターン、1
2はボンデイングリードピツチ、13はボンデイ
ングリード巾、14はリード巾及びリード間ギヤ
ツプ、15はボンデイングリード段数、16はN
段目のボンデイングリード間隔である。なお、図
中、同一符号は同一又は相当部分を示す。
Fig. 1 is a top view of a wire bonding lead pattern according to an embodiment of the invention, Fig. 2 is a partially enlarged view of Fig. 1, and Figs. 3 to 5 illustrate conventional wire bonding lead patterns. It is an explanatory diagram. In the figure, 10 is a high-density lead pattern, 1
2 is the bonding lead pitch, 13 is the bonding lead width, 14 is the lead width and gap between the leads, 15 is the number of bonding lead stages, and 16 is N.
This is the bonding lead spacing between stages. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.
Claims (1)
ーを介して導通を得る基板上のリードパターンに
おいて、ボンデイングリードの段数を3段以上と
し、かつ上記パターンの簡易設計式を備えたこと
を特徴とするワヤーボンデイングリードパターン
。 A lead pattern on a substrate that obtains conduction from a bonding pad of an IC through a wire made of gold or the like, which has three or more stages of bonding leads, and has a simple design formula for the pattern. Yarbonding lead pattern.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990079932U JP2506606Y2 (en) | 1990-07-25 | 1990-07-25 | Wire bonding lead pattern |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990079932U JP2506606Y2 (en) | 1990-07-25 | 1990-07-25 | Wire bonding lead pattern |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0438043U true JPH0438043U (en) | 1992-03-31 |
| JP2506606Y2 JP2506606Y2 (en) | 1996-08-14 |
Family
ID=31624542
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990079932U Expired - Fee Related JP2506606Y2 (en) | 1990-07-25 | 1990-07-25 | Wire bonding lead pattern |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2506606Y2 (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63140627U (en) * | 1987-03-07 | 1988-09-16 | ||
| JPH0256942A (en) * | 1988-08-23 | 1990-02-26 | Fuji Xerox Co Ltd | Semiconductor device |
-
1990
- 1990-07-25 JP JP1990079932U patent/JP2506606Y2/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63140627U (en) * | 1987-03-07 | 1988-09-16 | ||
| JPH0256942A (en) * | 1988-08-23 | 1990-02-26 | Fuji Xerox Co Ltd | Semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2506606Y2 (en) | 1996-08-14 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH0438043U (en) | ||
| JPH01171047U (en) | ||
| JPS60181051U (en) | Structure of lead frame | |
| JPH0415856U (en) | ||
| JPS6013737U (en) | Semiconductor integrated circuit device | |
| JPS6112249U (en) | semiconductor equipment | |
| JPH0480045U (en) | ||
| JPH0388337U (en) | ||
| JPS609235U (en) | bonding pad | |
| JPS63182533U (en) | ||
| JPH0472651U (en) | ||
| JPH0211336U (en) | ||
| JPH0390442U (en) | ||
| JPH0399461U (en) | ||
| JPH03117928U (en) | ||
| JPH0474455U (en) | ||
| JPS59135662U (en) | Wiring pattern structure | |
| JPS6049663U (en) | wiring board | |
| JPS585362U (en) | Lead frame board | |
| JPS61109164U (en) | ||
| JPS60153543U (en) | Lead frame for semiconductor devices | |
| JPS6059541U (en) | Lead frame for integrated circuits | |
| JPH0440542U (en) | ||
| JPH0474462U (en) | ||
| JPH02125371U (en) |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |