JPH0440116A - Linear division method - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method for linearly dividing a frequency, and is used for controlling the speed of a motor.

A conventional technology that linearly divides a frequency is a binary rate multiplier (hereinafter referred to as BRM). This thins out (or divides) the frequency. An example of a 3-bit BRM is shown in Figure 3. In this example, the number of pulses specified by a 3-bit frequency division ratio is The fourth example shows how pulses are thinned out when the value of the 3-bit frequency division ratio that is output at full scale, that is, every 8 pulses, is from O to 7.
As shown in the figure. The output pulse is the original oscillation pulse minus unnecessary pulses, and each pulse is synchronized with the original oscillation when it is regarded as a clock.

Although FIG. 3 shows an example of 3 bits, the same applies even if the frequency division ratio is larger. At this time, the condition is that the frequency division ratio must always be a binary number.

Generally, a single actual IC can set a 6-bit frequency division ratio, and those with 6 bits or more are connected in cascade. When this IC is used, the frequency division ratio is a multiple of 6 bits, such as 6 bits or 12 bits. In actual applications, the highest frequency required is created using a crystal oscillator, etc., and this is used as the principle wave number.The number of ICs is determined by the number of bits that satisfies the required frequency division ratio, and this frequency division ratio is expressed as a binary number. By determining the frequency using a computer or the like, a frequency with an arbitrary division ratio can be obtained.

Problems to be Solved by the Invention However, with this kind of RM, as shown in Figure 4, it is not possible to output the same frequency as the original oscillation, and the frequency division ratio is also fixed, so it can be set flexibly depending on the purpose. There were problems such as not being able to do so. Furthermore, the thinning pattern is determined within the IC, making it impossible to set the frequency in detail.

Since the BRM is an independent IC, it is a microcomputer and requires at least several chip components as an interface circuit when applied.

Such hardware circuits generally undergo circuit changes when specifications change.

The present invention has been made in view of these problems, and provides a highly flexible linear frequency division method that allows frequency setting up to the original oscillation and can be processed by software.

Means for Solving the Problems The linear frequency division method of the present invention utilizes a clock synchronous serial communication function, in which the clock frequency is used as the source oscillation, thinned data is stored in memory, and this data is used as the clock. This is achieved by synchronizing and continuously outputting.

Effect: With this configuration, the thinned-out data is stored in the memory, and by changing this data with software, it becomes possible to set the division ratio in detail. Furthermore, by setting all data to 1, it is possible to output the same frequency as the clock frequency.

Embodiment An embodiment of the present invention is shown in FIGS. 1 and 2. Clock synchronous serial communication is a method of synchronizing parallel data with a clock frequency and outputting it one bit at a time. In FIG. 1, 1 is data to be output, that is, thinned-out data. 2 is a serial data output, and 3 is a clock output. In this figure, a program has been created that continuously outputs thinned-out data (this program is designed to be automatically processed, for example, by interrupt processing, etc.).

With such a configuration, by providing data as thinned-out data according to the frequency division ratio as shown in FIG. 2, it becomes possible to set an arbitrary frequency.

In the conventional 3-bit BRM, only the frequency division ratio can be set from 0/8 to 7/8, but in the present invention, the full range from 0/8 to 8/8 can be specified.

Although the present embodiment has been explained using a 3-bit frequency division ratio, the same applies to a larger frequency division ratio. For example, in the case of 4 bits, it becomes 16 bits of thinned data, and it is sufficient to prepare 2 bytes of data on the memory. By outputting this data alternately, 4-bit branching becomes possible. Similarly, 5 bits requires 4 bytes, 6 bits requires 8 bytes, and 7 bits requires 16 bytes, and by continuously outputting these data, a frequency with an arbitrary division ratio can be easily obtained.

Effects of the Invention As described above, the present invention obtains an arbitrary divided frequency by outputting the thinned-out data provided on the memory to clock synchronous serial communication. It has the characteristic that it can be easily realized. Furthermore, since the thinning data that determines the frequency division ratio is stored in the memory, fine-grained station division control is possible by changing this data. Furthermore, it is possible to set the same frequency as the original oscillation, which was difficult in the past.

[Brief explanation of drawings]

FIG. 1 shows data processing 1 in an embodiment of the present invention...
... Thinned data, 2 ... Serial output, 3
・・・・・・Clock output. Name of agent: Patent attorney Shigetaka Awano and one other person

Claims (1)

[Claims] In a microcomputer set with a clock-synchronous serial output function, the clock frequency is used as the source oscillation, the data continuously stored in the memory is used as thinned-out data, and this data is synchronized with the clock and output continuously. A linear frequency division method that is characterized by dividing the frequency linearly.