JPH0441383Y2 - - Google Patents

Description

[Detailed description of the invention] (a) Industrial application field This invention relates to a power supply monitoring device for an arithmetic unit or the like that drives an electronic circuit including a CPU with a built-in power supply device.

(B) Conventional technology Generally, electronic circuits including CPUs receive power supply voltage from an external power supply, further convert it to a predetermined voltage with a built-in power supply, and are driven by the voltage of this built-in power supply. It is becoming more and more common. Arithmetic units, etc. that include this type of electronic circuit are further equipped with an internal power supply voltage monitoring circuit, and if an abnormality occurs in the power supply or the built-in power supply itself, the power supply voltage may cause problems in the operation of the electronic circuit. Some devices reset the electronic circuit when the voltage drops below a certain level.

(c) Problems that the invention aims to solve The conventional power supply monitoring device described above monitors only the built-in power supply voltage, so when a voltage abnormality is detected, the electronic circuit goes into a reset state, and after the voltage is restored, it returns to the reset state. is released. Therefore, after recovery, the occurrence of a voltage abnormality is not clearly indicated, and a self-diagnosis function for voltage abnormalities cannot be provided. Furthermore, if a voltage abnormality display is displayed and held instead of being reset when a power supply abnormality is detected, the voltage abnormality display will be held even when the power supply is simply turned on, and after that,
It is necessary to create a new reset state.

In view of the above, an object of this invention is to provide a power supply monitoring device that can distinguish and process abnormalities in the built-in power supply and externally supplied power.

(d) Means and action for solving the problem The power supply monitoring device of this invention detects when the external supply voltage falls below a predetermined first level, and outputs a power supply voltage abnormality signal. a built-in power supply voltage monitoring circuit that detects when the built-in power supply voltage supplied to the electronic circuit from the built-in power supply falls below a predetermined second level and outputs a built-in power supply voltage abnormality signal; a first off-delay timer receiving the output of the monitoring circuit; a second off-delay timer having a shorter delay time than the first off-delay timer and receiving the output of the built-in power supply voltage monitoring circuit; an abnormality notification holder that is cleared by the output of the second off-delay timer and set by the output of the second off-delay timer;
The electronic circuit is reset using the off-delay timer output.

In the power supply monitoring device of this invention, when the power is turned on, both the supply voltage monitoring circuit and the built-in power supply voltage monitoring circuit output an abnormal signal, but the delay time of the second off-delay timer is longer than that of the first off-delay timer. is short, priority is given to clearing for the holder, and no abnormality is reported. On the other hand, since the second off-delay timer is output via the built-in power supply voltage monitoring circuit, the electronic circuit is reset by that signal and starts initial operation. Additionally, if a momentary interruption occurs in the external power supply, the power supply voltage monitoring circuit detects this, outputs an abnormal signal, and clears the holder via the first off-delay timer. Since the disconnection does not reduce the built-in power supply voltage below the second predetermined level, in this case, no signal is output from the second off-delay timer, the holder remains reset, and no abnormality is reported. Also not done. Of course, the reset signal is not input to the electronic circuit either.

On the other hand, if any abnormality occurs in the built-in power supply voltage, the output of the supply power voltage monitoring circuit does not derive an abnormal signal, and therefore the holder does not receive a clear signal, whereas the built-in power supply voltage monitoring circuit Then, since it is below the second predetermined level, an abnormality signal is outputted, and this abnormality signal is outputted via the second off-delay timer to reset the electronic circuit and set the holder. When the holder is set, a power supply abnormality notification is issued, allowing the operator to know that there is an abnormality in the electronic circuit.
A predetermined process is performed and the information is forcibly cleared by manual operation or the like.

(e) Examples This invention will be explained in more detail below using examples.

FIG. 1 is a block diagram of a monitoring device showing one embodiment of this invention.

The power supply input terminals 1a and 1b are configured to receive a power supply V ₀ from the outside, and this external supply voltage V ₀ is monitored by a power supply voltage monitoring circuit 2. When the supply voltage V ₀ becomes less than or equal to the predetermined voltage ₀ , the supply voltage monitoring circuit 2 outputs an abnormality signal. On the other hand, input terminal 1a,
The power supply voltage V ₀ input to 1b is input to the built-in power supply 3, and V 1 , V ₀ suitable for electronic circuit operation is input.
A built-in power supply voltage of V ₂ is supplied to the electronic circuit 4. The voltage V ₁ output from this built-in power supply device 3 is input to the built-in power supply voltage monitoring circuit 5, which monitors whether or not this built-in power supply voltage V ₁ becomes a predetermined level _{1 or} lower. Outputs power supply voltage abnormality signal. Here, ₀ is the minimum voltage (slightly higher) that guarantees normal operation of the built-in power supply 3, and ₁
is set to the lowest voltage (slightly higher) that ensures normal operation of the electronic circuit 4. The output of the supply voltage monitoring circuit 2 is sent to the holder 9 as a clear signal via an off-delay timer 6 and an OR circuit 8.
Further, the output of the built-in power supply voltage monitoring circuit 5 is inputted as a set output of the holder 9 via an off-delay timer 7, and is also inputted as a reset signal of the electronic circuit 4. .

While the holder 9 is in the set state, the abnormality indicator light 10 continues to be lit. As a clear signal for the holder 9, a forced clear signal is also input together with the output of the off-delay timer 6 through an OR circuit 8. If clear and set outputs are input to the holder 9 at the same time, clearing takes priority. Furthermore, the delay time t ₀ of the off-delay timer 6 and the delay time t ₁ of the off-delay timer 7 are set to be t ₀ >t ₁ .

Next, the operation of the above-mentioned embodiment monitoring device will be explained separately at the time of power startup, instantaneous power failure, built-in power supply abnormality, and forced clearing.

When the power supply starts up, both the supply power supply voltage V ₀ and the built-in power supply voltage V ₁ rise, but by ₀ and ₁ , respectively.
Until the voltage exceeds the voltage, both the supply power voltage monitoring circuit 2 and the built-in power supply voltage monitoring circuit 5 output abnormal signals. On the other hand, the supply voltage V ₀ eventually exceeds ₀ , and
When the built-in power supply voltage V ₁ exceeds ₁ , the abnormal signal turns off, and the off-delay timer 6 starts at t ₀ from this point.
Thereafter, the off-delay timers 7 are turned off after _t1 . As mentioned above, since t ₀ > t ₁ is set, by the time the clear signal input to the holder 9 through the OR circuit 8 turns off, the set signal has already been turned off (see Figure 2), and the Then, the drive is started without the holder 9 being set and the abnormality indicator light 10 not being lit. Of course, when the off-delay timer 7 is turned on, the electronic circuit 4 is initially reset.

Next, to explain momentary interruptions, momentary interruptions are:
Since the external power supply voltage is temporarily stopped and the built-in power supply voltage does not fall to the non-operating state, the supply power supply voltage V ₀ instantly drops below ₀ , and the supply power supply voltage monitoring circuit 2 detects this. However, since an abnormal signal is output, the off-delay timer 6 turns off the clear signal after a delay time of _t0 . In this case, the built-in power supply voltage monitoring circuit 5 does not output any abnormal signal because the built-in power supply voltage _V1 does not become lower than _V1 , and there is no change in the output of the off-delay timer 7.
The operation will continue.

However, even if the supplied power supply voltage is normal, if an abnormality occurs in the built-in power supply voltage and V ₁ drops below ₁ , the built-in power supply voltage monitoring circuit 5 detects this and outputs an abnormality signal. Therefore, the off-delay timer 7 resets the electronic circuit 4, sets the holder 9, and lights up the abnormality indicator light 10. Even if the built-in power supply voltage eventually returns to normal, the holder 9 is not reset, and the operator can see the failure indicator light 10 to know the history of failures and is given an opportunity to take corrective action.

To return the circuit to the recovery state, a forced clear signal is input. As a result, a clear signal is input to the holder 9 through the OR circuit 8, and the holder 9
is reset, and the abnormality indicator light 10 is also turned off.

(f) Effects of the invention According to this invention, it is possible to clearly distinguish between cases where the external power supply is cut off and cases where the internal power supply is abnormal, and it is easy to take appropriate measures depending on the situation. . Further, in the case of a momentary power outage, there is an advantage that unnecessary abnormality display is not performed.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a monitoring device showing an embodiment of this invention, and FIG. 2 is a time chart for explaining the operation of the monitoring device. 2... Supply power voltage monitoring circuit, 3... Built-in power supply, 4... Electronic circuit, 5... Built-in power supply voltage monitoring circuit, 6, 7... Off-delay timer, 9... Holder, 10... Abnormality display light.

Claims (1)

[Scope of utility model registration request] A power supply voltage monitoring circuit detects when the external supply voltage falls below a predetermined first level and outputs a supply power voltage abnormality signal, and a built-in power supply voltage supplied to the electronic circuit from the built-in power supply reaches a predetermined first level. a built-in power supply voltage monitoring circuit that detects this and outputs a built-in power supply voltage abnormality signal when the power supply voltage falls below level 2; a first off-delay timer that receives the output of the supply power voltage monitoring circuit; and the first off-delay timer. a second off-delay timer whose delay time is shorter than that of the second off-delay timer and which receives the output of the built-in power supply voltage monitoring circuit, and which is cleared by the output of the first off-delay timer and set by the output of the second off-delay timer. 1. A power supply monitoring device, comprising: an abnormality notification holder, and configured to reset an electronic circuit with the output of the second off-delay timer.