JPH0442496A - Nonvolatile ram - Google Patents

Abstract

PURPOSE:To obtain the compact nonvolatile RAM which can preserve the storage contents of an SRAM when the power supply is interrupted by arranged on one tip and preserving the storage contents of the SRAM automatically while written in an EZROM when the power supply is interrupted. CONSTITUTION:When power supply voltage is dropped, the drop in voltage is detected by a power supply voltage detection circuit 4, a writing signal is automatically transmitted to a writing circuit 3 from the detection circuit 4, and the contents of the memory cell of an SRAM 1 is written in the memory cell of an EZROM 2. At this time, the power supply necessary for writing operation is supplied from a backup power source 5. All these circuit parts are integrally incorporated in the one tip. Thus, the storage contents are preserved at the time of the interruption of the power supply, etc., and also, occupying space can be made small.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention can be read and written as a high-speed RAM when the power supply voltage is normal, and when the voltage drops due to a power outage, the stored contents are automatically transferred to a non-volatile memory (E2ROM). This relates to non-volatile RAM that is written to and stored in the memory.

[Conventional technology]

Figure 3 shows the conventional non-volatile RA commonly known as NVRAM.
The configuration of M is shown.

SRAM 1 that can read and write at high speed and E that can be electrically rewritten to save the memory contents of SRAM 1
2ROM 2 and a write circuit 3 that writes the memory contents of SRAM 1 to E2ROM 2 in response to a write signal are arranged on one chip.
By writing to M2, the memory contents can be saved in the event of a power outage, etc. However, the real-time storage contents of SRAM 1 are erased.

That is, the real-time storage contents are volatile, which is the same as in a normal volatile RAM.

In order to save real-time memory contents in a conventional NVRAM during a power outage, a configuration as shown in FIG. 4 must be adopted.

In the figure, 11 is the NVRAM, 12 is a power supply voltage detection circuit that detects a drop in the power supply voltage and sends a write signal to the NVRAM 11 when the power supply voltage drops, and 13 is the power supply required to write to the E2ROM when the power supply voltage drops due to a power outage, etc. This is a backup power supply circuit that supplies

[Problem to be solved by the invention]

Conventional NVRAMs have a problem in that when used alone, the memory contents are not saved in the event of an unexpected drop in power supply voltage such as a power outage.

In addition, in the above case, in order to save the memory contents, a power supply voltage detection circuit that sends a write signal to the NVRAM when the power supply voltage drops, and a power supply necessary to operate the write circuit 3 to the E2ROM 2 in the event of a power outage are required. It is necessary to provide a back amplifier power supply circuit for supplying power and a control circuit for controlling this power supply circuit, which is complicated, and furthermore, there is a problem that the entire device occupies a large space.

The present invention was made to solve the above problems.
It is an object of the present invention to provide a small-sized non-volatile RAM that can save its memory contents even when the power supply voltage drops unexpectedly such as a power outage.

[Means to solve the problem]

The nonvolatile RAM of the present invention is an SR that can read and write at high speed.
AM and an electrically rewritable non-volatile E! to save the memory contents of the SRAM. In addition to the ROM and a write circuit that writes the stored contents of the SRAM to the E2ROM using a write signal, there is also a power supply voltage detection circuit that detects when the power supply voltage drops and sends a write signal to the write circuit, and a power supply voltage detection circuit that detects when the power supply voltage drops and sends a write signal to the write circuit. A backup power supply circuit is provided on one chip to buffer the power supply until the memory contents of the SRAM are written to the E2ROM, and the memory contents of the SRAM are automatically written to and saved in the E2ROM in the event of a power outage. That is.

〔Example〕

FIG. 1 shows the configuration of one embodiment of the present invention, and FIG.
A specific example of the bank-up power supply circuit in one embodiment of the figure is shown.

In the figure, 1, 2 and 3 indicate the same or corresponding parts as the same reference numerals in FIG. 3, 4 is a power supply voltage detection circuit, 5 is a bank up power supply, and 6 is a power supply charging circuit.

Although it may be difficult to incorporate the capacitor for the backup power supply 5 into one chip, it is easy to integrate other circuit parts into one chip.

If the capacitor for backup power supply 5 is built into the 1000 knob, please make sure that the capacitance does not increase as IC'.
This can be handled by multi-layering or using a ferroelectric film.

When the power supply voltage drops, it is detected by the power supply voltage detection circuit 4, and a write signal is automatically sent from the detection circuit 4 to the write circuit 3, and the contents of the memory cells of SRAM 1 are written to the memory cells of E2ROM 2. . At this time, the power required for the write operation is supplied from the backup power supply 5 because the power supply voltage has already decreased.

The voltage of the backup power supply 5 only needs to be maintained during the period when the storage contents of the SRAM 1 are written into the E2ROM 2.

The capacitor of the bank-up power supply 5 is constantly charged by the power supply charging circuit 6 while the power supply voltage is normal. The power supply charging circuit 6 also functions to prevent the discharge current of the capacitor of the backup power supply 5 from flowing outside when the power supply voltage decreases.

A secondary battery may be used as the bank-up power supply 5 instead of a capacitor.

〔Effect of the invention〕

As explained above, according to the present invention, the one-chip configuration saves the memory contents in the event of a power outage, which eliminates complexity compared to the conventional configuration.
This has the effect of reducing the space occupied and improving the reliability of the device.

[Brief explanation of the drawing]

Fig. 1 is an explanatory diagram showing the configuration of an embodiment of the present invention, Fig. 2 is an explanatory diagram showing a specific example of a backup power supply circuit in the embodiment of Fig. 1, and Fig. 3 is a conventional NVRAM. FIG. 4 is an explanatory diagram showing the structure of a non-volatile RAM. FIG. 4 is a diagram showing a structure in which real-time storage contents are saved in the event of a power outage or the like using a conventional NVRAM. 1...SRAM, 2...E2ROM, 3...Writing circuit, 4...Power supply voltage detection circuit, 5...Backup power supply, 6...Power supply charge circuit Note that the same symbols in the drawings indicate the same or Show equivalent. Patent distributor: New Japan Radio Co., Ltd.

Claims (1)

[Claims] An SRAM that can be read and written at high speed, an electrically rewritable non-volatile E^2ROM for storing the memory contents of the SRAM, and a write circuit that writes the memory contents of the SRAM to the E^2ROM in response to a write signal. A power supply voltage detection circuit detects when the power supply voltage drops and sends a write signal to the write circuit, and a backup power supply circuit backs up the power supply until the memory contents of the SRAM are written to the E^2ROM in the event of a power outage. A non-volatile RAM disposed on a run chip, and configured such that the memory contents of the SRAM are automatically written to and saved in the E^2ROM in the event of a power outage.
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