JPH0442575A - semiconductor equipment - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a semiconductor device.

[Conventional technology]

With aluminum (A, f2) sputtering, it is difficult to fill contact holes with a high aspect ratio.

Conventionally, therefore, attempts have been made to reduce the contact resistance by burying polysilicon with a high carrier concentration or selectively burying a high melting point metal.

[Problem to be solved by the invention]

Regarding the method of burying polysilicon in contact holes, it is impossible to increase the impurity concentration beyond the solid solution limit, so contact holes with high aspect ratios have high contact resistance.

In addition, the method of selectively embedding a high melting point metal into the contact hole is effective in reducing contact resistance, but silicon and the high melting point metal react at the interface with the silicon layer, causing the metal to spread further outward from the periphery of the contact hole. Silicidation progressed, causing leakage current.

[Means to solve the problem]

The semiconductor device of the present invention has polysilicon containing germanium at a high concentration as an impurity in a contact hole formed on one of a silicon substrate of a -conductivity type and a silicon film of one conductivity type. It has metal wiring on silicon.

[Effect]

The band gap of germanium (Ge) of 0.66 eV is much smaller than the band gap of silicon (Si) of 1.12 eV, and the resistivity is also about four orders of magnitude lower than that of Si.

Therefore, compared to the conventional case where polysilicon was buried in the contact hole, by filling the contact hole with polysilicon containing a high concentration of germanium,
Contact holes can be significantly reduced.

Furthermore, Si and Ge form an alloy, and there is no solid solubility limit for the Ge concentration in Si.
e can be injected.

Moreover, since the Si/Ge alloy has a smaller band gap than Si, the Schottky barrier bite with the Affl electrode is also low, and ohmic contact can be easily established.

Furthermore, since the metal is not in direct contact with the device parts such as the diffusion layer, there is no risk of alloying progressing and causing leakage current, unlike when a high melting point metal is embedded.

〔Example〕

An embodiment of the present invention will be described with reference to FIG.

A field oxide film 2, a gate oxide film 3, a gate electrode 4, a source 5, a drain 6, a glabella insulating film 7, and a contact hole 8 are formed on a P-type silicon substrate 1 to constitute an N-channel MOSFET.

Contact hole 8, up to the solid solution limit! A polysilicon film 9 containing (P) diffused and a high concentration of Ge is embedded.

AJ wiring 10 is formed thereon.

Next, an example of the manufacturing method will be explained.

Opening 0 formed by dry etching the glabellar insulating film.
Polysilicon diffused to the solid solution limit is deposited by CVD into a contact hole measuring 8×0.8 μm 2 and 0.7 μm in height to fill the contact hole.

Since the CVD method allows good gas circulation, polysilicon is deposited even in contact holes with high aspect ratios.

Thereafter, unnecessary polysilicon on the glabellar insulating film is etched back by RIE method.

Next, using the resist as a mask, apply G to the contact hole.
ions were implanted.

The implantation conditions were acceleration energy of 200 keV and 400 keV.
keV, and the implantation amount (dose) is 5×10 16 /cm 2 .

The reason why two-stage ion implantation using two types of acceleration energy is performed is because the contact hole is as deep as 700 prefectures.

800°C to equalize the Ge concentration in polysilicon
, and annealed for 30 minutes in a nitrogen atmosphere.

In this embodiment, phosphorus is used as an impurity in polysilicon, but boron can be used as an impurity in polysilicon for a P-type silicon layer such as a source/drain of a P-channel MOSFET.

It can also be applied to contact structures of other devices such as bipolar transistors.

〔Effect of the invention〕

According to the present invention, a contact hole with a high aspect ratio can be filled.

Moreover, the specific resistance of the material itself is low, and ohmic contact with metal electrodes can be easily formed, making it possible to reduce contact resistance.

Furthermore, since the metal and the source-drain are not in direct contact, the risk of leakage current due to metal intrusion into the Si substrate and breakdown of the junction due to alloy spikes is eliminated.

It is possible to eliminate device deterioration due to increased contact resistance, which is considered to be a major problem in future fine pattern devices.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing one embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... P-type silicon substrate, 2... Field oxide film, 3... Gate oxide film, 4... Gate electrode, 5...
・Source, 6... Drain, 7... Interlayer insulating film, 8
...Contact hole, 9...Ge-containing polysilicon film.

Claims (1)

[Claims] A contact hole formed on one of a silicon substrate of one conductivity type and a silicon film of one conductivity type has polysilicon containing a high concentration of germanium as an impurity, and a metal wiring is formed on the polysilicon. A semiconductor device comprising: