JPH0442727A - Current limiting circuit - Google Patents
Current limiting circuitInfo
- Publication number
- JPH0442727A JPH0442727A JP14575690A JP14575690A JPH0442727A JP H0442727 A JPH0442727 A JP H0442727A JP 14575690 A JP14575690 A JP 14575690A JP 14575690 A JP14575690 A JP 14575690A JP H0442727 A JPH0442727 A JP H0442727A
- Authority
- JP
- Japan
- Prior art keywords
- load
- voltage
- zener diode
- resistor
- current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000015556 catabolic process Effects 0.000 abstract 1
- 230000007423 decrease Effects 0.000 abstract 1
- 230000002459 sustained effect Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
Landscapes
- Emergency Protection Circuit Devices (AREA)
Abstract
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は電流制限回路に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to current limiting circuits.
従来の電流制限回路は、第２図に示すように、電源１の
正極にＮＰＮ）ランジスタ３のコレクタと抵抗器４の一
端とを接続し、ＮＰＮ）ランジスタ３のベースに抵抗器
４の他端とツェナーダイオード６のカソードを接続し、
ＮＰＮ）ランジスタ３のエミッタに抵抗器５の一端を接
続し、抵抗器５の他端とのツェナーダイオード６のアノ
ードとを負荷２の一端に接続し、負荷２の他端に第２の
ツェナーダイオードのアノードと電源１の負極とを接続
して構成していた。As shown in FIG. 2, the conventional current limiting circuit connects the collector of an NPN transistor 3 and one end of a resistor 4 to the positive terminal of a power supply 1, and connects the other end of the resistor 4 to the base of the NPN transistor 3. Connect the cathode of Zener diode 6 with
NPN) One end of a resistor 5 is connected to the emitter of the transistor 3, the other end of the resistor 5 and the anode of the Zener diode 6 are connected to one end of the load 2, and the other end of the load 2 is connected to a second Zener diode. The anode of the power source 1 was connected to the negative electrode of the power source 1.
上述した従来の電流制限回路は、負荷が消費する最大電
流を制限する回Ｈ′ｎ４成となっているが、負荷が電流
を消費しない場合、電源の電圧がそのまま負荷に加わる
ので、負荷に電源電圧以上の耐圧を持たせなければなら
なず、コストアップの原因になるという欠点かある。The conventional current limiting circuit described above has a circuit H'n4 configuration that limits the maximum current consumed by the load, but if the load does not consume current, the voltage of the power supply is directly applied to the load, so the power supply is applied to the load. The drawback is that it must have a withstand voltage higher than the voltage, which increases costs.
本発明の電流制限回路は、電源の正極にＮＰＮトランジ
スタのコレクタと第１の抵抗器の一端とを接続し、前記
ＮＰＮトランジスタのベースに前記第１の抵抗器の他端
と第１のツェナーダイオードのカソードと第２のツェナ
ーダイオードのカソードとを接続し、前記ＮＰＮトラン
ジスタのエミッタに第２の抵抗器の一端を接続し、前記
第２の抵抗器の他端と前記第１のツェナーダイオードの
アノードとを負荷の一端に接続し、前記負荷の他端に前
記第２のツェナーダイオードのアノードと前記電源の負
極とを接続して構成している。The current limiting circuit of the present invention connects the collector of an NPN transistor and one end of a first resistor to the positive electrode of a power supply, and connects the other end of the first resistor and a first Zener diode to the base of the NPN transistor. and the cathode of the second Zener diode, one end of a second resistor is connected to the emitter of the NPN transistor, and the other end of the second resistor and the anode of the first Zener diode are connected to each other. is connected to one end of a load, and the anode of the second Zener diode and the negative electrode of the power source are connected to the other end of the load.
次に本発明について図面を参照して説明する６第１図は
本発明の一実施例を示すブロック図である。Next, the present invention will be described with reference to the drawings. 6 FIG. 1 is a block diagram showing one embodiment of the present invention.
第１図において、本実施例の電流制限回路は電源１の正
極にＮＰＮトランジスタ３のコレクタと抵抗器４の一端
とを接続し、ＮＰＮ）ランジスタ３のベースに抵抗器４
の他端とツェナーダイオード６のカソードとツェナータ
イオード７のカソードとを接続し、ＮＰＮ）ランジスタ
３のエミッタに抵抗器５の一端を接続し、抵抗器５の他
端とツェナーダイオード６のアノードとを負荷２の一端
に接続し、負荷２の他端にツェナーダイオード７のアノ
ードと電源１の負極とを接続して構成している。In FIG. 1, the current limiting circuit of this embodiment connects the collector of an NPN transistor 3 and one end of a resistor 4 to the positive terminal of a power supply 1, and connects the collector of an NPN transistor 3 to one end of a resistor 4 to the base of the NPN transistor 3.
Connect the other end to the cathode of the Zener diode 6 and the cathode of the Zener diode 7, connect one end of the resistor 5 to the emitter of the NPN transistor 3, and connect the other end of the resistor 5 to the anode of the Zener diode 6. is connected to one end of the load 2, and the anode of the Zener diode 7 and the negative electrode of the power supply 1 are connected to the other end of the load 2.
次に、本実施例の動作について説明する。Next, the operation of this embodiment will be explained.
負荷２に消費する電流が大きくなると、抵抗器５を流れ
る電流が増加する。ここでツェナーダイオード６に加わ
る電圧は、抵抗器５とＮＰＮ）−ランジスタ３のベース
・エミッタ間電圧の和なので、ツェナーダイオード６に
かがる電圧が増加し、やがてツェナー電流が流れる。こ
れによってＮＰＮトランジスタ３のベース電流が減少し
、コレクタ電流が制限されることにより負荷２に流れる
電流は制限される。When the current consumed by the load 2 increases, the current flowing through the resistor 5 increases. Here, the voltage applied to the Zener diode 6 is the sum of the voltage between the resistor 5 and the base-emitter voltage of the transistor 3 (NPN), so the voltage applied to the Zener diode 6 increases, and eventually a Zener current flows. This reduces the base current of the NPN transistor 3 and limits the collector current, thereby limiting the current flowing to the load 2.
次に、負荷２の消費電流がほとんど無くなるか、あるい
は十分小さくなった時、ＮＰＮ）−ランジスタ３のベー
ス電圧は電源１の電圧まで上昇しようとするか、ここで
、ツェナータイオード７のツェナー電圧が電源１の電圧
より低く設定されてあれば、抵抗器４を通してツェナー
電流が流れＮＰＮトランジスタ３のベース電圧はツェナ
ー電圧に保たれる。ＮＰＮ ）ランジスタ３のエミッタ
電圧はベース電圧よりベース・エミッタ間電圧分低く保
たれるため、負荷２の電圧はツェナーダイオード７のツ
ェナー電圧以下に制限される。Next, when the current consumption of the load 2 becomes almost zero or becomes sufficiently small, the base voltage of the NPN transistor 3 tries to rise to the voltage of the power supply 1, or the Zener voltage of the Zener diode 7 If the voltage is set lower than the voltage of the power supply 1, a Zener current flows through the resistor 4, and the base voltage of the NPN transistor 3 is maintained at the Zener voltage. Since the emitter voltage of the (NPN) transistor 3 is kept lower than the base voltage by the base-emitter voltage, the voltage of the load 2 is limited to the Zener voltage of the Zener diode 7 or less.
以上説明したように、本発明は、電源の正極にＮＰＮ）
−ランジスタのコレクタと第１の抵抗器の一端とを接続
し、ＮＰＮ）ランジスタのベースに第１の抵抗器の他端
と第１のツェナーダイオードのカソードと第２のツェナ
ーダイオードのカソードとを接続し、ＮＰＮトランジス
タのエミッタに第２の抵抗器の一端を接続し、第２の抵
抗器の他端と第１のツェナータイオードのアノードとを
負荷の一端に接続し、負荷の他端に第２のツェナーダイ
オードのアノードと電源の負極とを接続して構成するこ
とにより、負荷にかかる電圧も制限することができるの
で、負荷の耐圧不足を解決することができて、負荷の部
品のコストを低減することができる効果がある。As explained above, the present invention uses NPN (NPN) as the positive electrode of the power supply.
- Connect the collector of the transistor to one end of the first resistor, and connect the other end of the first resistor, the cathode of the first Zener diode, and the cathode of the second Zener diode to the base of the NPN transistor. One end of the second resistor is connected to the emitter of the NPN transistor, the other end of the second resistor and the anode of the first Zener diode are connected to one end of the load, and the other end of the load is connected to the second resistor. By connecting the anode of Zener diode 2 and the negative pole of the power supply, the voltage applied to the load can be limited, which solves the problem of insufficient withstand voltage of the load and reduces the cost of load components. There are effects that can be reduced.
第１図は本発明の一実施例を示す回路図、第２図は従来
の電流制限回路の一例を示す回路図である。
１・・・電源、２・・・負荷、３・・・ＮＰＮ）ランジ
スタ、４．５・・・抵抗器、６．７・・・ツェナーダイ
オード。FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing an example of a conventional current limiting circuit. 1...Power supply, 2...Load, 3...NPN) transistor, 4.5...Resistor, 6.7...Zener diode.
Claims (1)
抵抗器の一端とを接続し、前記ＮＰＮトランジスタのベ
ースに前記第１の抵抗器の他端と第１のツェナーダイオ
ードのカソードと第２のツェナーダイオードのカソード
とを接続し、前記ＮＰＮトランジスタのエミッタに第２
の抵抗器の一端を接続し、前記第２の抵抗器の他端と前
記第１のツェナーダイオードのアノードとを負荷の一端
に接続し、前記負荷の他端に前記第２のツェナーダイオ
ードのアノードと前記電源の負極とを接続して成ること
を特徴とする電流制限回路。A collector of an NPN transistor and one end of a first resistor are connected to the positive terminal of a power supply, and the other end of the first resistor, the cathode of the first Zener diode, and the second Zener diode are connected to the base of the NPN transistor. and the emitter of the NPN transistor.
The other end of the second resistor and the anode of the first Zener diode are connected to one end of a load, and the anode of the second Zener diode is connected to the other end of the load. and the negative electrode of the power source are connected to each other.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14575690A JPH0442727A (en) | 1990-06-04 | 1990-06-04 | Current limiting circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14575690A JPH0442727A (en) | 1990-06-04 | 1990-06-04 | Current limiting circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0442727A true JPH0442727A (en) | 1992-02-13 |
Family
ID=15392431
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14575690A Pending JPH0442727A (en) | 1990-06-04 | 1990-06-04 | Current limiting circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0442727A (en) |
-
1990
- 1990-06-04 JP JP14575690A patent/JPH0442727A/en active Pending
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