JPH0443356B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an improvement in a Josephson sampling circuit constructed using Josephson elements.

2. Description of the Related Art Conventionally, a Josephson sampling circuit constructed using a Josephson element has been proposed having the following configuration with reference to FIG.

In other words, the bias current IB is obtained from the bias power supply terminal TB and is intermittent with a scheduled period.
The sampling pulse generation circuit 1 has a sampling pulse generation circuit 1 which repeatedly operates according to the following to generate a sampling pulse current IP.

This sampling pulse generation circuit 1 has the configuration of a superconducting quantum interferometer 2 configured using a Josephson device (not shown) having two control lines C1 and C2, and 2, the bias current IB from the bias power supply terminal TB is supplied through the resistor R1, and the control line C of the superconducting quantum interferometer 2
1, the trigger signal current IT from the trigger signal source terminal TT is supplied via the variable delay circuit 3;
Further, a switching DC current ID from the switching DC source terminal TD is supplied to the control line C2, and the superconducting quantum interferometer 2
, a sampling pulse current IP is obtained via a Josephson element J. In addition, in FIG. 1, R2 is the control line C1
This is a resistor inserted as necessary.

In addition, the signal current S from the signal current source 4, the sampling pulse current IP from the sampling pulse generation circuit 1 described above, and the sampling DC current IS from the sampling DC source terminal TS are input, and the bias voltage It is operated by the bias current IB obtained from the power supply terminal TB through the resistor R3, and the signal current S from the signal current source 4
The sampling gate circuit 5 outputs an output signal voltage VS sampled by the sampling pulse current IP from the sampling pulse generation circuit 1 described above.

This sampling gate circuit 5 has the configuration of a superconducting quantum interferometer 6 configured using a Josephson device (not shown) having three control lines C1, C2, and C3, and the superconducting quantum interference A bias current IB from a bias power supply terminal TB is supplied to a total of 6 through a resistor R3, a signal current S from a signal current source 4 is supplied to a control line C1, and a signal current S from a signal current source 4 is supplied to a control line C1. , control line C2
The sampling pulse current IP from the sampling pulse generation circuit 1 is supplied via the resistor R5, and the sampling DC current IS from the sampling DC power supply terminal TS is supplied to the control line C3. , Furthermore, the superconducting quantum interferometer 6 outputs an output signal voltage VS.

Further, the signal current source 4 is connected to the above-mentioned bias power supply terminal TB via the resistor R4, and is supplied with the trigger signal current IT from the above-mentioned trigger signal source terminal TT. Bias power supply terminal with signal current IT as input
It is operated by a bias current IB from TB and outputs a signal current S.

The above is the configuration of the conventionally proposed Josephson sampling circuit.

The Josefson sampling circuit having such a configuration is characterized in that the superconducting quantum interferometer 2 that constitutes the sampling pulse generation circuit 1 does not have a control line C1, and that the superconducting quantum interferometer 2 that constitutes the sampling gate circuit 5 does not have a control line C1. "Cryogenics,
Vo1.18, No.5, 1983'', pages 244 to 255 of ``Josephson Sampling Technique'' (hereinafter referred to as
References), especially Figure 7a on page 248
It has a similar configuration to the Josephson sampling circuit shown in .

The conventional Josephson sampling circuit shown in FIG. 1 is similar to the Josephson sampling circuit shown in FIG. ~
The four lines from the bottom of the right column on page 248 explain:
Since the operation is similar in principle, the explanation will be used to explain the operation of the conventional Josephson sampling circuit shown in FIG. Although detailed explanation is omitted, when the signal current source 4 is triggered by the trigger signal current IT from the trigger signal source terminal TT, the signal current source 4 generates
It is possible to obtain a signal current S that is synchronized with the bias current IB from the bias power supply terminal TB, and if the level of the switching DC ID from the switching DC source terminal TD is adjusted in advance, the sampling pulse Since the generation circuit 1 is triggered by the trigger signal current IT from the trigger signal source terminal TT, the sampling pulse generation circuit 1 is synchronized with the bias current IB from the bias power supply terminal TB. The sampling pulse current IP can be obtained. Therefore, if the level of the sampling DC current IS from the sampling DC source terminal TS is adjusted in advance, the sampling pulse current IP can be obtained from the sampling gate circuit 5 based on the sampling pulse current IP. Then, the output signal voltage VS can be obtained by sampling the signal current S from the signal current source 4 by the sampling pulse current IP from the sampling pulse generation circuit 1.

Problems to be Solved by the Invention In the conventional Josephson sampling circuit shown in FIG. Therefore, when the signal current source 4 is constructed from a circuit that operates at room temperature, the signal current S
This causes fluctuations (jitters) due to thermal noise, etc. In such a case, a fluctuation occurs between the sampling pulse current IP obtained from the sampling pulse generation circuit 1 and the signal current S based on the fluctuation of the signal current S in this case.

From the above, in the case of the conventional Josephson sampling circuit shown in FIG. It has a drawback that the output signal voltage VS sampled by the sampling pulse current IP of the signal current S cannot be obtained with high precision.

The present invention therefore seeks to propose a new Josefson sampling circuit that does not have the above-mentioned drawbacks.

Means for Solving the Problems The Josephson sampling circuits according to the first to third inventions of the present application repeatedly operate at a predetermined period, as in the case of the conventional Josephson sampling circuit described above in FIG. The present invention has a sampling pulse generation circuit configured using a Josephson element that repeatedly operates with a bias current that is intermittent with the same period as a signal current from a signal current source to generate a sampling pulse current.

In addition, the signal current from the signal current source, the sampling pulse current from the sampling pulse generation circuit, and the sampling DC current are input,
The present invention includes a sampling gate circuit configured using a Josephson element, which is operated by a bias current and outputs an output signal sampled by a sampling pulse current of a signal current from a signal current source.

However, the Josephson sampling circuit according to the first invention of the present application has the following configuration:
A portion of the signal current from the signal current source is input to the sampling pulse generation circuit as a trigger signal current.

Further, in the Josefson sampling circuit according to the second invention of the present application, in the Josephson sampling circuit having the above-described configuration, a signal current from a signal current source is input to a sampling gate circuit via a delay circuit. Further, a part of the signal current from the signal current source is input to the sampling pulse generation circuit as a trigger signal current.

Furthermore, in the Josephson sampling circuit according to the third invention of the present application, in the Josephson sampling circuit having the above-described configuration, a part of the signal current from the signal current source is transmitted to the sampling pulse generating circuit through the switch circuit. The second trigger signal current is input to the sampling pulse generation circuit as the first trigger signal current.
The trigger signal current is inputted.

Effects The Josephson sampling circuit according to the first invention of the present application has a sampling pulse generation circuit and a sampling gate circuit similar to those of the conventional Josephson sampling circuit described above in FIG. A part of the signal current from the signal current source is input to the sampling pulse generation circuit as the trigger signal current, so that the sampling pulse generation circuit is triggered by the trigger signal current. The output is the same as in the case of the conventional Josephson sampling circuit described above in FIG. 1, and therefore, from the sampling pulse generation circuit, The sampling pulse current can be obtained from the sampling gate circuit by adjusting the level of the sampling DC current in advance, as in the case of the conventional Josephson sampling circuit described above in Fig. 1. Therefore, it is clear that based on the sampling pulse current from the sampling pulse generation circuit, it is possible to obtain an output signal sampled from the signal current from the signal current source by the sampling pulse current from the sampling pulse generation circuit. It is.

However, in the case of the Josephson sampling circuit according to the first aspect of the present invention, a part of the signal current from the signal current source is inputted to the sampling pulse generation circuit as a trigger signal current. Therefore, if the signal current source is configured with a circuit that operates at room temperature, and the signal current from the signal current source fluctuates due to thermal noise, etc., the signal with the fluctuation occurs. Current is supplied to the sampling pulse generation circuit. Therefore, even if fluctuations occur in the signal current from the signal current source due to the above-mentioned thermal noise, there will be no signal between the sampling pulse current obtained from the sampling pulse generation circuit and the signal current obtained from the signal current source. Fluctuations due to current fluctuations can be prevented from occurring.

For this reason, the output signal sampled by the sampling pulse current of the signal current from the sampling gate circuit is
can be obtained with high precision.

Further, according to the Josephson sampling circuit according to the second invention of the present application, the present invention has the following features except that the signal current from the signal current source is input to the sampling gate circuit via the delay circuit. Since this is the same as the Josephson sampling circuit according to the first invention, a detailed explanation will be omitted, but it is clear that the same effect as the Josephson sampling circuit according to the first invention described above can be obtained. It is.

However, in the case of the Josephson sampling circuit according to the second invention of the present application, the signal current from the signal current source is input to the sampling gate circuit through the delay circuit, so that the delay circuit By adjusting the delay time for the signal current from the signal current source, the sampling pulse current from the sampling pulse generation circuit that is just supplied to the sampling gate circuit can be delayed with respect to the signal current that is just obtained from the signal current source. It is possible to eliminate the relative delay between the sampling pulse current from the sampling pulse generation circuit and the signal current from the signal current source, which are just supplied to the sampling gate circuit.

Therefore, even if the sampling pulse current from the sampling pulse generation circuit that is just supplied to the sampling gate circuit lags behind the signal current that is just obtained from the signal current source, the signal current from the sampling gate circuit is ,
The output signal sampled by the sampling pulse current can be obtained with high precision.

Furthermore, according to the Josephson sampling circuit according to the third invention of the present application, a portion of the signal current from the signal current source is supplied to the sampling pulse generation circuit as a trigger signal current (first trigger signal current). can be input by turning on the switch circuit, and when the switch circuit is off, the signal current from the signal current source as the first trigger signal current is input to the sampling pulse generation circuit. The switch circuit is the same as the Josephson sampling circuit according to the first invention of the present application, except that the second trigger signal current is supplied. By turning on the
As in the case of the Josephson sampling circuit according to the second invention, even if the signal current from the signal current source fluctuates, the sampling gate circuit
The output signal of the signal current from the signal current source sampled by the sampling current from the sampling pulse generation circuit can be obtained with high precision as being unaffected by fluctuations in the signal current. In addition, if the switch circuit is turned off, as in the case of the conventional Josephson sampling circuit described above in Fig. 1, when fluctuations occur in the signal current from the signal current source, the signal current is An output signal obtained by sampling the signal current from the source by the sampling current from the sampling pulse generation circuit is obtained as being affected by fluctuations in the signal current. Therefore, the output signal obtained from the sampling gate circuit at this time is influenced by the fluctuation of the signal current, and the fluctuation of the signal current obtained from the sampling gate circuit when the switch circuit is turned on as described above. It is possible to measure the fluctuation of the signal current from the signal current source by comparing it with the output signal that is not affected by the signal current source.

Embodiment 1 Next, a first embodiment of the Josephson sampling circuit according to the present invention will be described with reference to FIG.

In FIG. 2, parts corresponding to those in FIG. 1 are designated by the same reference numerals, and detailed description thereof will be omitted.

The Josephson sampling circuit according to the present invention shown in FIG. 2 is different from the conventional Josephson sampling circuit shown in FIG. By being supplied to the control line C1 of the superconducting quantum interferometer 6 constituting the sampling gate circuit 5, the signal current S is supplied to the sampling gate circuit 5 via the variable delay circuit 8.
In addition, the superconducting quantum interferometer 2 constituting the sampling pulse generation circuit 1 is configured to be inputted to the control line C3, in addition to the control lines C1 and C2.
A part of the signal current S from the signal current source 4 is connected to the control line C3 of the variable delay circuit 11.
and the switch circuit 7, a part of the signal current S from the signal current source 4 is supplied to the sampling pulse generation circuit via the variable delay circuit 11 and the switch circuit 7. It has the same configuration as that of the conventional Josephson sampling circuit described above in FIG.

The above is the configuration of the embodiment of the Josephson sampling circuit according to the present invention.

According to the Josephson sampling circuit according to the present invention having such a configuration, it has the same configuration as the conventional Josephson sampling circuit described above in FIG. 1, except for the matters mentioned above. Although the explanation is omitted, the signal current source 4 receives the trigger signal current IT from the trigger signal source terminal TT.
, the signal current source 4 generates a bias current IB from the bias power supply terminal TB in synchronization with the bias current IB from the bias power supply terminal TB, as in the case of the conventional Josephson sampling circuit described above in FIG. In addition, the levels of the switching DC current ID from the switching DC source terminal TD and the triggering signal current IT from the triggering signal source terminal TT are adjusted in advance. If the switch circuit 7 is turned on, the sampling pulse generation circuit 1 is triggered by a part of the signal current S from the signal current source 4, and the first
As in the case of the conventional Josefson sampling circuit described above in the figure, it is possible to obtain the sampling pulse current IP that is synchronized with the bias current IB from the bias power supply terminal TB, and therefore,
If the level of the sampling DC current IS from the sampling DC source terminal TS is adjusted in advance,
From the sampling gate circuit 5, based on the sampling pulse current IP, as in the case of the conventional Josephson sampling circuit described above in FIG.
Sampling pulse current from sampling pulse generation circuit 1 of signal current S from signal current source 4
Output signal voltage VS sampled by IP
can be obtained.

Therefore, according to the Josephson sampling circuit according to the present invention shown in FIG.
By inputting a part of the trigger signal current as the trigger signal current, the sampling pulse generation circuit 1
, a sampling pulse current similar to that of the conventional Josephson sampling circuit described above in FIG. 1 can be obtained, and based on the sampling pulse current, the sampling gate circuit generates the As in the case of the conventional Josephson sampling circuit described above, it is possible to obtain the output signal voltage VS sampled by the sampling pulse current from the sampling pulse generation circuit 1 of the signal current S from the signal current source 4. can.

However, in the Josephson sampling circuit according to the invention shown in FIG.
Since a part of the signal current S from the sampling pulse generating circuit 1 is inputted as a trigger signal current for the sampling pulse generating circuit 1, the signal current source 4 is constituted by a circuit that operates at room temperature. In this case, if fluctuations occur in the signal current S from the signal current source 4 due to thermal noise or the like, the signal current S with the fluctuations is supplied to the sampling pulse generation circuit 1.

Therefore, even if fluctuations occur in the signal current S from the signal current source 4 due to the thermal noise described above, the sampling pulse current obtained from the sampling pulse generation circuit 1 and the signal current S obtained from the signal current source 4 are different. During this period, fluctuations based on fluctuations in the signal current S can be prevented from occurring.

Therefore, the output signal voltage VS of the signal current S sampled by the sampling pulse current from the sampling pulse generation circuit 1 is output from the sampling gate circuit 5 to the output signal voltage VS sampled by the sampling pulse current from the sampling pulse generation circuit 1. Compared to the case,
can be obtained with high precision.

Further, according to the Josephson sampling circuit according to the present invention shown in FIG. 11 respectively, the variable delay circuits 8 and 11
By individually adjusting the delay time for the signal current S from the signal power source 4, the sampling pulse current from the sampling pulse generation circuit 1 that is just supplied to the sampling gate circuit 5 can be adjusted exactly from the signal current source 4. The resulting signal current S
To eliminate the relative delay between the sampling pulse current from the sampling pulse generation circuit 1 and the signal current from the signal current source 4, which are just supplied to the sampling gate circuit 5, even if there is a delay with respect to the sampling gate circuit 5. be able to.

Therefore, even if the sampling pulse current from the sampling pulse generation circuit 1 that is just supplied to the sampling gate circuit 5 lags behind the signal current S that is just obtained from the signal current source 4, the sampling gate circuit 5 From this, the output signal voltage VS of the signal current S sampled by the sampling pulse current from the sampling pulse generation circuit 1 can be obtained with high precision.

Furthermore, according to the Josephson sampling circuit according to the present invention shown in FIG. A part of the signal current S from the switch circuit 7 can be inputted by turning on the switch circuit 7. Therefore, by turning on the switch circuit 7, the sampling pulse generation circuit 1 is triggered by a portion of the signal current S as the first trigger signal current from the signal current source 4. is being done. Further, by turning off the switch circuit 7, a part of the signal current S as the first trigger signal current from the signal current source 4 is not supplied to the sampling pulse generation circuit 1, so that the sampling pulse generation circuit 1 is not supplied with the signal current S as the first trigger signal current from the signal current source 4. In place of the signal current S from the signal current source 4 as the first triggering signal current in the circuit 1, a triggering signal source terminal is used as in the case of the conventional Josephson sampling circuit described above in FIG. It can be triggered by a trigger signal current IT (this is referred to as a second trigger signal current) from TT.

Therefore, by turning on the switch circuit 7, even if the signal current S from the signal current source 4 fluctuates as described above, the signal current S from the signal current source 4 is transmitted from the sampling gate circuit 5.
The output signal voltage VS sampled by the sampling current from the sampling pulse generation circuit 1 can be obtained with high precision as being unaffected by fluctuations in the signal current S. Furthermore, if the switch circuit 7 is turned off, as in the case of the conventional Josephson sampling circuit described above in FIG. From, the output signal voltage VS of the signal current S from the signal current source 4 sampled by the sampling current from the sampling pulse generation circuit 1 is expressed as
It can be obtained as being influenced by fluctuations in the signal current S. Therefore, the output signal voltage VS obtained from the sampling gate circuit 5 at this time, which is affected by the fluctuation of the signal current S, and the output signal voltage VS obtained from the sampling gate circuit 5 when the switch circuit 7 is turned on as described above. Output signal voltage that is not affected by fluctuations in the signal current S
By comparing VS with VS, fluctuations in the signal current S from the signal current source 4 can be measured.

Embodiment 2 Next, a second embodiment of the Josephson sampling circuit according to the present invention will be described with reference to FIG.

In FIG. 3, parts corresponding to those in FIG. 2 are designated by the same reference numerals.

The Josephson sampling circuit according to the present invention shown in FIG.
has a similar configuration to the Josephson sampling circuit according to the present invention shown in FIG. 2, except that it is configured as described below.

That is, a superconducting quantum interferometer 2 similar to that in FIG. 2 except that the control line C1 is omitted.
and a sawtooth wave current generating circuit 10 provided in the preceding stage.

In this case, the sawtooth wave current generation circuit 10 includes a superconducting quantum interferometer 9 having three control lines C1 to C3.
The bias current IB from the bias power supply terminal TB is supplied to the superconducting quantum interferometer 9 via the resistor R6, and the superconducting quantum interferometer 2 includes: Since the control line C1 to which the trigger signal current IT from the trigger signal source terminal TT is supplied is omitted, in the superconducting quantum interferometer 9, the control line C1 is omitted.
1, a trigger signal current IT is supplied from the trigger signal source terminal TT, and a switching DC current is supplied from the switching DC power supply terminal TD to the control line C2 of the superconducting quantum interferometer 9. A switching DC current ID' similar to ID is supplied from the switching DC source terminal TD', and a signal current from the signal current source 4 is also supplied to the control line C3 of the superconducting quantum interferometer 9. A part of S is supplied through the variable delay circuit 11 and the switch circuit 7, and a series circuit of resistors R8 and R9 is connected in parallel with the superconducting quantum interferometer 9. By leading the connection midpoint of R8 and R9 to the outside via the inductor L, a sawtooth wave current can be obtained from the superconducting quantum interferometer 9 via the inductor L, and , the sawtooth wave current is supplied to the control line C3 of the superconducting quantum interferometer 2.

The above is the configuration of the second embodiment of the Josephson sampling circuit according to the present invention.

The Josephson sampling circuit according to the present invention having such a configuration has the same configuration as the Josephson sampling circuit according to the present invention described above in FIG. 2, except for the above-mentioned matters. Although omitted, the superconducting quantum interferometer 9 constituting the sawtooth wave generating circuit 10 of the sampling pulse generating circuit 1 is triggered by a portion of the signal current S from the signal current source 4. The superconducting quantum interferometer 2 is triggered by the sawtooth wave current, and the sampling pulse generating circuit 1 generates a sawtooth wave current according to the present invention as shown in FIG. It is clear that sampling pulse currents similar to those in the Josephson sampling circuit can be obtained.

Therefore, it is clear that the Josephson sampling circuit according to the invention shown in FIG. 3 can provide the same functions and effects as the Josephson sampling circuit according to the invention shown in FIG.

However, in the case of the Josephson sampling circuit according to the present invention shown in FIG. 3, the sampling pulse generation circuit 1 corresponds to the superconducting quantum interferometer 2 of the Josephson sampling circuit according to the invention shown in FIG. It has a configuration in which a sawtooth wave generation circuit 10 is provided before the superconducting quantum interferometer 2, and therefore the superconducting quantum interferometer 2 is generated by the sawtooth current from the sawtooth wave generation circuit 10. Since the superconducting quantum interferometer 2 does not have a sawtooth wave generating circuit 10 in the front stage of the superconducting quantum interferometer 2, the superconducting quantum interferometer 2 can be triggered by the signal current as a trigger signal from the signal current source 4. In the case where the trigger is caused by a part of the signal current S, the superconducting quantum interferometer 2 can be triggered even if the trigger cannot be performed because the level of the part of the signal current S is small; Therefore, even if the level of a part of the signal current S as a trigger signal from the signal current source 4 to the sampling pulse generation circuit 1 is small, the sampling pulse current from the sampling pulse generation circuit 1 can be reliably obtained. Therefore, the output signal voltage VS sampled by the sampling pulse current from the sampling pulse generation circuit 1 of the signal current S from the signal current source 4 can be reliably obtained from the sampling gate circuit 5. can.

Note that the above description merely shows a few embodiments of the present invention, and various modifications and changes may be made without departing from the spirit of the present invention.

[Brief explanation of drawings]

FIG. 1 is a connection diagram showing a conventional Josephson sampling circuit. FIG. 2 is a connection diagram showing an embodiment of the Josephson sampling circuit according to the present invention. FIG. 3 is a connection diagram showing another embodiment of the Josephson sampling circuit according to the present invention. 1...Sampling pulse generation circuit, 2, 6,
9...Superconducting quantum interferometer, 3...Variable delay circuit,
4... Signal current source, 5... Sampling gate circuit, 7... Switch circuit, 8, 11... Variable delay circuit, 10... Sawtooth wave generation circuit, C1, C2,
C3... Control line of superconducting quantum interferometer, J... Josephson element, L... Inductor, R1, R2,
R3...Resistor, TB...Bias power supply terminal,
TD, TD′...DC source terminal for switching, TS...
...DC source terminal for sampling, TT...Signal source terminal for trigger.

Claims (1)

[Scope of Claims] 1. It is constructed using a Josephson element that repeatedly operates with a bias current that is intermittent at the same cycle as a signal from a signal current source that operates repeatedly at a predetermined cycle to generate a sampling pulse current. a sampling pulse generation circuit having a signal current from the signal current source, a sampling pulse current from the sampling pulse generation circuit, and a sampling direct current as inputs, and is operated by the bias current, A Josephson sampling circuit comprising a sampling gate circuit configured using a Josephson element that outputs an output signal sampled by the sampling pulse current of the signal current from the signal current source, A Josephson sampling circuit characterized in that a part of the signal current is input to the sampling pulse generation circuit as a trigger signal current. 2. A sampling pulse generation circuit configured using a Josephson element that repeatedly operates using a bias current that is intermittent at the same frequency as a signal from a signal current source that operates repeatedly at a predetermined cycle to generate a sampling pulse current. , with the signal current from the signal current source, the sampling pulse current from the sampling pulse generation circuit, and the sampling DC current as inputs, is operated by the bias current to generate the signal from the signal current source. In the Josephson sampling circuit, the signal current from the signal current source is transmitted to the delay circuit. A part of the signal current from the signal current source is input to the sampling pulse generation circuit as a trigger signal current thereof. Josephson sampling circuit characterized by: 3. A sampling pulse generation circuit configured using a Josephson element that repeatedly operates using a bias current that is intermittent at the same frequency as a signal from a signal current source that operates repeatedly at a predetermined cycle to generate a sampling pulse current. , with the signal current from the signal current source, the sampling pulse current from the sampling pulse generation circuit, and the sampling DC current as inputs, is operated by the bias current to generate the signal from the signal current source. In a Josephson sampling circuit having a sampling gate circuit configured using a Josephson element that outputs an output signal sampled by the sampling pulse current of the current, a part of the signal current from the signal current source is , the first trigger signal current is input to the sampling pulse generation circuit through the switch circuit, and the second trigger signal current is input to the sampling pulse generation circuit. Josephson sampling circuit characterized by: