JPH0444143U - - Google Patents
Info
- Publication number
- JPH0444143U JPH0444143U JP1990086142U JP8614290U JPH0444143U JP H0444143 U JPH0444143 U JP H0444143U JP 1990086142 U JP1990086142 U JP 1990086142U JP 8614290 U JP8614290 U JP 8614290U JP H0444143 U JPH0444143 U JP H0444143U
- Authority
- JP
- Japan
- Prior art keywords
- pattern
- circuit board
- edge
- resin
- utility
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/013—Manufacture or treatment of die-attach connectors
- H10W72/01308—Manufacture or treatment of die-attach connectors using permanent auxiliary members, e.g. using alignment marks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
- H10W72/07311—Treating the bonding area before connecting, e.g. by applying flux or cleaning
Landscapes
- Die Bonding (AREA)
Description
第１図及び第５図は本考案の実施例を示すＩＣ
実装構造の断面図、第２図は 第１図及び第５図
に示す回路基板の平面図、第３図は 従来例のＩ
Ｃ実装構造の断面図、第４図は 第３図に示す回
路基板の平面図である。 １，５……回路基板、２，６……ＩＣチツプ、
３，７……接着剤、４，８……パターン、９……
縁。
実装構造の断面図、第２図は 第１図及び第５図
に示す回路基板の平面図、第３図は 従来例のＩ
Ｃ実装構造の断面図、第４図は 第３図に示す回
路基板の平面図である。 １，５……回路基板、２，６……ＩＣチツプ、
３，７……接着剤、４，８……パターン、９……
縁。
Claims (1)
- ＩＣを実装する回路基板において、ＩＣチツプ
搭載部とパターンとの間にパターンまたは樹脂に
より縁を形成することを特徴とするＩＣ回路基板
構造。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990086142U JPH0444143U (ja) | 1990-08-17 | 1990-08-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990086142U JPH0444143U (ja) | 1990-08-17 | 1990-08-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0444143U true JPH0444143U (ja) | 1992-04-15 |
Family
ID=31817655
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990086142U Pending JPH0444143U (ja) | 1990-08-17 | 1990-08-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0444143U (ja) |
-
1990
- 1990-08-17 JP JP1990086142U patent/JPH0444143U/ja active Pending