JPH044432U - - Google Patents

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Publication number
JPH044432U
JPH044432U JP4531890U JP4531890U JPH044432U JP H044432 U JPH044432 U JP H044432U JP 4531890 U JP4531890 U JP 4531890U JP 4531890 U JP4531890 U JP 4531890U JP H044432 U JPH044432 U JP H044432U
Authority
JP
Japan
Prior art keywords
flip
flop
integrated circuit
semiconductor integrated
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4531890U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP4531890U priority Critical patent/JPH044432U/ja
Publication of JPH044432U publication Critical patent/JPH044432U/ja
Pending legal-status Critical Current

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  • Logic Circuits (AREA)

Description

【図面の簡単な説明】
第１図は本考案の第一実施例の要部を示す回路
図。第２図は本考案の第二実施例の要部を示す回
路図。第３図は本考案の第三実施例の要部を示す
回路図。第４図は従来例の要部を示す回路図。 １１……初段クロツクドライバＤ１、１２……
次段クロツクドライバＤ２、１３……終段クロツ
クドライバＤ３、１４……フリツプフロツプＦＦ
、２０〜２９……クロツクドライバＤ、Ｃ……ク
ロツク信号、Ｌ１〜Ｌ３，Ｌ１ａ〜Ｌ３ａ……配
線。

Claims (1)

  1. 【実用新案登録請求の範囲】 複数のフリツプフロツプと、 各フリツプフロツプにクロツクを供給する１以
    上の段数のクロツクドライバと を備えたゲートアレー型の半導体集積回路におい
    て、 前記クロツクドライバから各フリツプフロツプ
    までの配線路の長さが等しくなるように、前記ク
    ロツクドライバと各フリツプフロツプ間にツリー
    状に配置された配線を備えた ことを特徴とする半導体集積回路。
JP4531890U 1990-04-27 1990-04-27 Pending JPH044432U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4531890U JPH044432U (ja) 1990-04-27 1990-04-27

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4531890U JPH044432U (ja) 1990-04-27 1990-04-27

Publications (1)

Publication Number Publication Date
JPH044432U true JPH044432U (ja) 1992-01-16

Family

ID=31559385

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4531890U Pending JPH044432U (ja) 1990-04-27 1990-04-27

Country Status (1)

Country Link
JP (1) JPH044432U (ja)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63229510A (ja) * 1987-03-18 1988-09-26 Fujitsu Ltd クロツク・スキユ−計算方式

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63229510A (ja) * 1987-03-18 1988-09-26 Fujitsu Ltd クロツク・スキユ−計算方式

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