JPH0444987B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a single-chip microcomputer, and particularly to a general-purpose timer thereof.

[Conventional technology]

FIG. 2 is a block diagram showing the configuration when a general-purpose timer of a conventional single-chip microcomputer is used as a watchdog timer. In the figure, 1 is a single-chip microcomputer, 2 is a general-purpose timer, 3 is a timer input/output terminal, 4 is a timer output control circuit, and when in the output function, an N-channel open drain circuit with "0" level active operates. 5 is a counter, 6 is a timer function control register, 7 is a CPU,
8 is ROM, 9 is RAM, 10 is general-purpose input/output circuit,
11 is a reset input terminal, 12 is an external reset input, 13 is a pull-up resistor, and 14 and 15 are one-shot multivibrators.

Next, the operation will be explained.

When the external reset input terminal 12 is set to "0" level, the reset input terminal 11 becomes "0" level, and the single chip microcomputer 1
immediately enters the reset state. At this time, the terminal whose input function and output function are switched by the program is in the input function mode.
The timer input/output terminal 3 also enters the input mode, and because of the pull-up resistor 13, the potential becomes "1" level.

When the external reset input terminal 12 is set to the "1" level, the reset input terminal 11 is set to the "1" level, and the CPU 7 starts executing the program at a predetermined timing. The initial setting part of this program also includes setting the functions of the general-purpose timer 2. To set the timer, first operate the timer function setting register 6 to close the count source of the counter 5, then set the predetermined count number in the counter itself and the reload register of the counter 5, and then close the timer function setting register 6. Operate again to activate the timer output control circuit 4, set the timer input/output terminal 3 to output mode, and set the count source of the counter 5 to the internal clock.

The above operations complete the initial setting of the general-purpose timer 2, but the potential of the timer input/output terminal 3 remains at the "1" level. When the microcomputer 1 is operating normally, the program is designed to periodically rewrite the value of the counter 5, and no overflow will occur. However, if the microcomputer 1 goes out of control and stops executing the routine to rewrite the value of the counter 5. , the counter 5 overflows and the output of the timer input/output terminal 3 becomes "0" level.

This change generates a positive pulse from the Q output terminal of the one-shot multivibrator 14.
As this pulse falls, a pulse with a width sufficient to reset the microcomputer 1 is generated from the output terminal of the next-stage one-shot multivibrator 15. This is transmitted to the reset input terminal 11, the microcomputer 1 performs a reset operation, the timer input/output terminal 3 becomes input mode, and the potential is set to "1" by the pull-up resistor 13.
Return to level. Thereafter, the same operation as when the reset input terminal 12 is set to the "1" level is performed.

In the above case, if the delay circuit using the external one-shot multivibrators 14 and 15 is omitted and the timer input/output terminal 3 and the reset input terminal 11 are connected, the output of the timer input/output terminal 3 becomes "0" level. As soon as the reset begins, the general-purpose timer 2 enters the input mode, the width of the reset pulse becomes extremely narrow, and the reset circuit may not operate completely internally.

[Problem that the invention seeks to solve]

A conventional single-chip microcomputer is configured as described above, and has two general-purpose timers.
To use as a watchdog timer,
There was a problem in that it required an external delay circuit.

This invention was made in view of the problems of the conventional ones as described above, and it is a single-chip microcomputer that does not require an external delay circuit even when a general-purpose timer is used as a watchdog timer. The purpose is to provide the following.

[Means for solving problems]

The microcomputer according to the present invention has a built-in delay circuit that delays the reset timing of the timer function setting circuit 6 of the general-purpose timer 2 from the reset timing of other parts within the microcomputer.

[Effect]

In this invention, when an overflow occurs in the counter 5 and the output of the timer input/output terminal 3 reaches the "0" level, other parts begin to be reset, but the general-purpose timer itself 2 is reset by the built-in delay circuit. , the general purpose timer 2 is delayed in entering input mode, and the internal reset circuit is fully operational.

〔Example〕

FIG. 1 is a block diagram showing an embodiment of the present invention.
10, 11, and 13 are the same as those indicated by the same reference numerals in FIG. 2, 1a is a microcomputer according to the present invention, 2a is a general-purpose timer according to the present invention, and 16 is a reset timing delay circuit.

Next, the operation will be explained.

When reset input terminal 11 is set to “0” level, single chip microcomputer 1
A immediately shifts to the reset state except for the general-purpose timer 2a portion. After a predetermined delay, the general-purpose timer 2a also enters the reset state, and the timer input/output terminal 3 enters the input mode. When the application of the "0" level to the reset input terminal 11 is stopped, the pull-up resistor 13 causes the reset input terminal 1 to
1 voltage becomes the "1" level, and the CPU 7 starts executing the program at a predetermined timing.
Before CPU7 starts executing the program,
The output of the reset timing delay circuit 16 is in a state that releases the reset.

The initial setting part of the program for the CPU 7 also includes setting the function of the general-purpose timer 2a. The setting of the timer is exactly the same as in the case of the conventional one. First, operate the timer function setting register 6 to close the count source of the counter 5. Next, set the predetermined count number in the counter itself and the reload register of the counter 5. Then, the timer function setting register 6 is operated again, the timer output control circuit 4 is activated, the timer input/output terminal 3 is set to the output mode, and the count source of the counter 5 is set to the internal clock.

The above operations complete the initial setting of the general-purpose timer 2a, but the potential of the timer input/output terminal 3 remains at the "1" level. When the microcomputer 1a is operating normally, the program is such that it periodically rewrites the value of the counter 5, and overflow does not occur. However, if the microcomputer 1a goes out of control and stops executing the routine to rewrite the value of the counter 5. , the counter 5 overflows and the output of the timer input/output terminal 3 becomes "0" level. Since the timer input/output terminal 3 is directly connected to the reset input terminal 11, the microcomputer 1a
immediately enters the reset state except for the general-purpose timer 2a portion. The general-purpose timer 2a is also reset after a delay by the reset timing delay circuit 16, and the timer input/output terminal 3 becomes input mode.
“0” level output disappears, pull-up resistor 1
3 returns to the “1” level and CPU7
starts executing the program at a predetermined timing. Before the CPU 7 starts executing the program, the output of the reset timing delay circuit 16 is
It is now ready to release the reset. Similar operations are performed thereafter.

Although the above embodiment shows an example in which the reset timing delay circuit 16 delays the reset of only the general-purpose timer 2a, it may also be configured to delay the reset of other input/output circuits 10, etc.

Further, in the above embodiment, the output of the reset timing delay circuit 16 is the input that is delayed by a certain period of time, but the general-purpose timer 2a is reset later than other resets in the microcomputer 1a, and the general-purpose timer 2a is reset later than other resets in the microcomputer 1a. The same effect can be achieved regardless of the configuration as long as the reset is canceled by the time the function settings are made.

In addition, in the above, the reset circuit is set to “0”.
Although the case where the reset is performed at the level has been described, the reset may be performed at the "1" level.

The output format of the timer input/output terminal 3 is not limited to the N-channel open drain format, and the same effect can be obtained even when the general-purpose timer 2a does not have an input function from an external terminal as in the above embodiment. can.

〔Effect of the invention〕

As described above, according to the present invention, even when a general-purpose timer is used as a watchdog timer,
The small size of the system, which requires no external circuitry and uses a single-chip microcomputer,
It has the advantage of being lightweight and can be constructed at low cost.

Note that even if the conventional structure is configured to ensure resetting even with a narrow reset pulse, an external delay circuit is required when used in a system that has peripheral circuits that require resetting. According to this method, since the minimum time of the reset pulse of the watchdog timer can be guaranteed, an external delay circuit is not required in this case as well.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG. 2 is a block diagram showing a configuration when a general-purpose timer of a conventional single-chip microcomputer is used as a watchdog timer. In the figure, 1a is a single chip microcomputer, 2a is a general-purpose timer, 3 is a timer input/output terminal, 4 is a timer output control circuit, 5 is a counter, 6 is a timer function control register, 7 is a CPU,
8 is ROM, 9 is RAM, 10 is general-purpose input/output circuit,
11 is a reset input terminal, 13 is a pull-up resistor, and 16 is a reset timing delay circuit.
Note that the same reference numerals in each figure indicate the same parts.

Claims (1)

[Scope of Claims] 1. In a single-chip microcomputer using an integrated circuit device in which a central processing unit, a memory device, and a general-purpose timer are integrated in one chip, the general-purpose timer is configured to:
The timer function setting circuit is provided with a timer output terminal that is controlled to perform output or prohibit output, and the timer function setting circuit operates to perform the above control under operation by the central processing unit during normal operation, and The timer function setting circuit has a built-in delay circuit that controls the above-mentioned timer output terminal to be set to an output prohibited state at the time of reset, and delays the reset timing of the above-mentioned timer function setting circuit from the reset timing of other parts of the microcomputer. A single-chip microcomputer characterized by: