JPH0445065Y2 - - Google Patents

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to computer systems, in particular,
This article relates to a watchdog timer used to detect CPU runaway in computer systems.

[Conventional technology]

A conventional computer system is shown in FIG.
In Figure 2, 1 is CPU, ,WDC,
RESET, V _DD , V _SS are the terminals of CPU1, and the terminals
When the signal on RS is "L" level, CPU1 is in operation mode, and when it is "H" level, it is in standby mode.
When the signal on the terminal is “L” level, CPU1
will be initialized and all memory etc. will be cleared.
The terminal WDC is an output port that outputs a signal to reset the watchdog timer at a fixed cycle when the CPU 1 is in the operation mode, and the terminals V _DD ,
V _SS is the power supply terminal of CPU1. Further, 2 is a runaway detection circuit, 3 is a standby switch, 4 is an inverter, 5 is a resistor, and 6 is a DC power supply.

FIG. 3 is a circuit diagram showing in detail the runaway detection circuit constituting the computer system of FIG. 2. In FIG. 3, Q1 is an operational amplifier, Q2 is a transistor, D1 to D3 are diodes, R1 to R7 are resistors, C1 and C2 are capacitors, and E1 is a DC power supply. The runaway detection circuit shown in FIG.
It is described as a watchdog circuit in IEM-962, pages 15 to 17.

In a computer system that has an operating mode and a standby mode using the standby switch 3 shown in FIG. 2, in the standby mode, the CPU stops oscillation of the system clock in order to retain data in the memory and reduce current consumption. As a result, the program execution is stopped. At this time, the runaway detection circuit 2 does not need to function, so the second
As shown in the figure, the standby switch 3 turns off the power supply.

[Problem that the invention attempts to solve]

In the conventional computer system described above, when the standby switch 3 is turned from on to off, the output level of the runaway detection circuit 2 is unstable due to, for example, variations in the active elements. For this reason,
The CPU may be reset when it is not necessary, and data held in standby mode may be erased.

Furthermore, when the standby switch 3 is switched from on to off, the runaway detection circuit shown in Fig. 3 is switched from standby mode to operating mode. A certain time t _p is required for the initial settings of the CPU 1, etc., before the output pulse) is output, and the time over time t _pver of the runaway detection circuit 2 is set so that t _p ≪ t _pver . Circuit constants are set. Therefore, if the standby switch 3 is turned on and off in a time shorter than the time _tp , the watchdog timer reset pulse will not be output from the CPU 1, and the capacitor C2 will be charged and the CPU 1 will be reset. become.

The runaway detection circuit 2 shown in FIG. 3 measures time using the voltage across a capacitor C2, which is a time measuring section, and the CPU 1 outputs a watchdog timer reset pulse at a constant period _ts . The relationship between t _s and time-over time t _pver is set so that t _pver >20t _s .

[Means for solving problems]

In order to solve the above-mentioned problems, the present invention includes a standby switch 3 for switching between a CPU operating mode and a standby mode, and a watchdog function when the standby switch is turned off to switch to standby mode. circuit means 7, Q2 for resetting the time measuring section C2 that measures the time over time of the runaway detection circuit 2;
and a circuit that supplies power to the runaway detection circuit even when the standby switch is switched to standby mode.

[Effect]

When the CPU is in standby mode,
The runaway detection circuit is energized, and even if chattering occurs when the standby switch is operated, the time measurement section is reset each time chattering occurs, so the actual time over time will not be reduced. It doesn't happen.

〔Example〕

FIG. 1 is a circuit diagram showing an embodiment of a computer system according to the present invention. In FIG. 1, 7 is a resistor connected between node P on the output side of inverter 4 and the base of transistor Q2, and standby switch 3, inverter 4, and resistors 5 and 7 constitute mode setting means. In addition, the first
In the figures, the same or corresponding parts as in FIGS. 2 and 3 are given the same reference numerals.

In this way, the difference between the computer system in FIG. 1 and the computer system in FIG. 2 is that the runaway detection circuit 2 is powered at all times in the same way as the CPU 1, and A resistor 7 is connected between the node P on the output side of the inverter 4 and the base of the transistor Q2.

In the computer system configured in this way, when the standby switch 3 is turned off,
The level of node P becomes "H", and transistor Q
2 is turned on, and the timing capacitor C2, which is a time measuring section, is reset to approximately 0V at both ends. Therefore, as long as the standby switch 3 is off, the runaway detection circuit 2 stops functioning.

Also, when standby switch 3 is turned on,
The level of the node P becomes "L", and the transistor Q
2 is off. In other words, the transistor Q2 turns on when the watchdog timer reset pulse, which is the output signal of the output port WDC, changes from "L" to "H", and at this time, the capacitor C
2 is discharged, operational amplifier Q1 outputs an "H" level, and the runaway detection circuit starts functioning as a watchdog timer. Further, since the output level of the operational amplifier Q1 is "H", the reset of the CPU 1 is in an inactive state.

The current consumption in the above computer system is 3mA in the CPU1 operating mode;
0.5mA in standby mode, 0.5mA in runaway detection circuit operating mode and standby mode.
It is. Therefore, the current consumption in the standby mode in the above computer system is 1 mA, which is only 0.5 mA more than the 0.5 mA current consumption in the conventional example.

[Effect of idea]

As explained above, in the present invention, even if chattering occurs when operating the standby switch, the time measuring section is reset each time the chattering occurs, so the actual time of the time over time will not be reduced. Since this does not occur, the effect is that as long as the standby switch is off, the CPU will not be reset even if the standby switch is turned on and off for a shorter time than the CPU's initial setting time.

Further, if the runaway detection circuit is always energized like the CPU, the output of the runaway detection circuit will not become unstable, which has the effect of preventing malfunctions when the standby switch is turned on and off.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing an embodiment of a computer system according to the present invention, Fig. 2 is a circuit diagram showing a conventional computer system, and Fig. 3 is a runaway detection component of the system shown in Figs. 1 and 2. It is a circuit diagram showing a circuit. 1... CPU, 2... Runaway detection circuit, 3... Standby switch, 4... Inverter, 5, 7,
R1 to R7...Resistance, 6...DC power supply,
WDC, , V _DD , V _SS ... terminal, Q1 ...
Operational amplifier, Q2...transistor, D1 to D3
...Diode, C1, C2...Capacitor, E
1...DC power supply.

Claims (1)

[Claims for Utility Model Registration] Has an operating mode and a standby mode.
In a computer system consisting of a CPU and a runaway detection circuit that acts as a watchdog circuit, there is a standby switch for switching between the operating mode and standby mode, and when the standby switch is switched to standby mode, the time of the runaway detection circuit is determined. A computer system comprising: circuit means for resetting a time measuring section that measures overtime; and a circuit that supplies power to the runaway detection circuit even when the standby switch is switched to standby mode.