JPH0446426A - Received digital line control signal detection method - Google Patents
Received digital line control signal detection methodInfo
- Publication number
- JPH0446426A JPH0446426A JP15576990A JP15576990A JPH0446426A JP H0446426 A JPH0446426 A JP H0446426A JP 15576990 A JP15576990 A JP 15576990A JP 15576990 A JP15576990 A JP 15576990A JP H0446426 A JPH0446426 A JP H0446426A
- Authority
- JP
- Japan
- Prior art keywords
- line control
- digital line
- control signal
- received
- received digital
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
- Time-Division Multiplex Systems (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はデジタル電子交換機のデジタル回線制御装置の
受信デジタル回線制御信号検呂方式に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a receiving digital line control signal check method for a digital line control device of a digital electronic exchange.
従来、この種の受信デジタル回線制御信号検出方式は、
受信しているデジタル回線制御信号パターンと、交換機
の中央処理装置側が期待している制御信号パターンとを
デジタル回線制御装置が内蔵しているプログラム制御に
よって常時周期的に比較監視を行い、期待したデジタル
回線制御信号パターンを検出すると中央処理装置に報告
をしていた。Conventionally, this type of received digital line control signal detection method was
The digital line control device constantly compares and monitors the received digital line control signal pattern with the control signal pattern expected by the exchange's central processing unit using the built-in program control. When a line control signal pattern was detected, it was reported to the central processing unit.
上述した従来の方式においては、デジタル回線制御装置
が内蔵しているプログラム制御によってデジタル回線上
に多重化された各チャネルごとの受信デジタル回線制御
信号パターンを読み出し、交換機の中央処理装置が期待
している受信デジタル回線制御信号パターンと常時周期
的に比較を行なっているために、比較をする必要のない
チャネルの受信デジタル回線制御信号パターンまで常時
プログラム制御によって比較を行なうというむだな処理
を行なっており、受信デジタル回線制御信号検出に要す
る処理が、多重化されるチャンネルが多くなるほど負荷
がかかり、検出時間が遅くなると言う欠点がある。In the conventional method described above, the received digital line control signal pattern for each channel multiplexed on the digital line is read out by the built-in program control of the digital line control device, and the central processing unit of the exchange Since it is constantly and periodically compared with the received digital line control signal pattern of the channel that does not need to be compared, it is a wasteful process of constantly comparing the received digital line control signal pattern of the channel that does not need to be compared. However, as the number of multiplexed channels increases, the processing required for detecting the received digital line control signal increases, and the detection time becomes slower.
本発明の受信デジタル回線制御信号検出方式は、チャネ
ル多重化されたデジタル回線を収容し中央処理装置の制
御により時分割接続処理を行うデジタル電子交換システ
ムにおいて、前記デジタル回線上に多重化された各チャ
ネルごとの受信デジタル回線制御信号パターンをドロッ
プするドロップ手段と、ドロップされた前記受信デジタ
ル回線制御信号パターンを各チャネルごとに保持する受
信信号保持手段と、前記中央処理装置からの前記受信デ
ジタル回線制御信号パターンの期待値を各チャネルごと
に保持する比較信号保持手段と、前記受信信号保持手段
及び前記比較信号保持手段のそれぞれから周期的に前記
受信デジタル回線制御信号を読出し比較しパターンの一
致を検出する比較手段と、前記中央処理装置から前記受
信デジタル回線制御信号パターンの期待値を受信し前記
比較信号保持手段に格納し前記比較手段からパターンの
一致検出の報告を受け前記中央処理装置に報告する制御
手段とを有する回線制御装置を備えている。The received digital line control signal detection method of the present invention is used in a digital electronic switching system that accommodates channel-multiplexed digital lines and performs time-division connection processing under the control of a central processing unit. a dropping means for dropping the received digital line control signal pattern for each channel; a received signal holding means for holding the dropped received digital line control signal pattern for each channel; and the received digital line control from the central processing unit. Comparison signal holding means for holding an expected value of a signal pattern for each channel, and periodically reading and comparing the received digital line control signal from each of the received signal holding means and the comparison signal holding means to detect pattern matching. and a comparing means for receiving an expected value of the received digital line control signal pattern from the central processing unit, storing it in the comparison signal holding means, receiving a report of pattern matching detection from the comparing means, and reporting it to the central processing unit. and a line control device having a control means.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第１図は本発明の一実施例を示すブロック図である。本
実施例の受信デジタル回線制御信号検出方式は、デジタ
ル回線７に接続されたデジタルトランク６と、デジタル
多重化装置５と、ドロッパ／インサータ４と、時分割ス
イッチ２と、中央処理装置１と、回線制御装置１４とを
備えている。FIG. 1 is a block diagram showing one embodiment of the present invention. The received digital line control signal detection method of this embodiment includes a digital trunk 6 connected to a digital line 7, a digital multiplexer 5, a dropper/inserter 4, a time division switch 2, a central processing unit 1, A line control device 14 is provided.
回線制御装置１４は、デジタルトランク６と接続された
ドロップ回路１２と、受信信号バッファ回路１０と、比
較信号バッファ回路１１と、比較回路９と、制御線８を
介してドロッパ／インサータ４と接続された制御口Ｆ！
＠１３を有している。The line control device 14 is connected to the dropper/inserter 4 via a drop circuit 12 connected to the digital trunk 6, a received signal buffer circuit 10, a comparison signal buffer circuit 11, a comparison circuit 9, and a control line 8. Control port F!
@13.
次に、動作を説明する。Next, the operation will be explained.
デジタルトランク６がデジタル回線７がら受信している
信号はドロップ回路１２に送られ、デジタル信号上に多
重されているデジタル回線制御信号が、各チャネル対応
にドロップされ受信信号バッファ回＆１８１０に送られ
て、各チャネルごとに持っている受信信号バッファに書
込まれて行く。中央処理装置１がその処理動作に対応し
て期待している信号パターンは、時分割スイッチ２．ハ
イウェイ３．ドロッパ／インサータ４及び制御線８を経
由し制御回路１３で受信され、比較信号バッファ回路１
１内にある各チャネルごとに持っている比較信号バッフ
ァに書込まれる。そして、比較回路９により、受信信号
バッファ回ＦＩ＠１０と比較信号バッファ回路１１との
それぞれから同一のチャネルの信号パターンが周期的に
読みだされて、比較が行なわれ、信号パターンの一致が
検出されたら、制御回路１３がドロッパ／インサータ４
を経由して中央処理装Ｗ１に報告する。The signal that the digital trunk 6 is receiving from the digital line 7 is sent to the drop circuit 12, and the digital line control signal multiplexed on the digital signal is dropped for each channel and sent to the reception signal buffer circuit &1810. , and are written to the receive signal buffer that each channel has. The signal pattern expected by the central processing unit 1 in response to its processing operation is determined by the time division switch 2. Highway 3. The signal is received by the control circuit 13 via the dropper/inserter 4 and the control line 8, and is sent to the comparison signal buffer circuit 1.
The signal is written to a comparison signal buffer for each channel in the memory. Then, the comparison circuit 9 periodically reads out the signal patterns of the same channel from each of the received signal buffer circuit FI@10 and the comparison signal buffer circuit 11, performs a comparison, and detects a match between the signal patterns. When the dropper/inserter 4
The information is reported to the central processing unit W1 via.
以上説明した様に本発明は、デジタル回線の受信デジタ
ル回線制御信号の検出をハードウェアによる検出方式に
することにより、プログラム制御による常時監視検８方
式に比べて検出時間の短縮、プログラム制御の負荷の軽
減ができる効果がある。As explained above, the present invention uses a hardware detection method to detect received digital line control signals on a digital line, thereby reducing the detection time and reducing the burden of program control compared to the 8 methods of constant monitoring detection using program control. It has the effect of reducing
第１図は本発明の一実施例を示すブロック図である。
１・・・中央処理装置、２・・・時分割スイッチ、３・
・・ハイウェイ、４・・・ドロッパ／インサータ、５・
・・デジタル多重化装置、６・・・デジタルトランク、
７・・・デジタル回線、８・・・制御線、９・・・比較
回路、１０・・・受信信号バッファ回路、１１・・・比
較信号バッファ回路、１２・・・ドロッパ回路、１３・
・・制御回路、１４・・・回線制御装置。FIG. 1 is a block diagram showing one embodiment of the present invention. 1...Central processing unit, 2...Time division switch, 3.
...Highway, 4...Dropper/Inserter, 5.
...Digital multiplexer, 6...Digital trunk,
7... Digital line, 8... Control line, 9... Comparison circuit, 10... Reception signal buffer circuit, 11... Comparison signal buffer circuit, 12... Dropper circuit, 13.
...Control circuit, 14...Line control device.
Claims (1)
置の制御により時分割接続処理を行うデジタル電子交換
システムにおいて、前記デジタル回線上に多重化された
各チャネルごとの受信デジタル回線制御信号パターンを
ドロップするドロップ手段と、ドロップされた前記受信
デジタル回線制御信号パターンを各チャネルごとに保持
する受信信号保持手段と、前記中央処理装置からの前記
受信デジタル回線制御信号パターンの期待値を各チャネ
ルごとに保持する比較信号保持手段と、前記受信信号保
持手段及び前記比較信号保持手段のそれぞれから周期的
に前記受信デジタル回線制御信号を読出し比較しパター
ンの一致を検出する比較手段と、前記中央処理装置から
前記受信デジタル回線制御信号パターンの期待値を受信
し前記比較信号保持手段に格納し前記比較手段からパタ
ーンの一致検出の報告を受け前記中央処理装置に報告す
る制御手段とを有する回線制御装置を備えたことを特徴
とする受信デジタル回線制御信号検出方式。In a digital electronic switching system that accommodates channel-multiplexed digital lines and performs time-division connection processing under the control of a central processing unit, a received digital line control signal pattern for each channel multiplexed on the digital line is dropped. a dropping means, a received signal holding means for holding the dropped received digital line control signal pattern for each channel, and a received signal holding means for holding the expected value of the received digital line control signal pattern from the central processing unit for each channel. comparison signal holding means; comparison means for periodically reading out and comparing the received digital line control signals from each of the received signal holding means and the comparison signal holding means to detect pattern matching; A line control device comprising a control means for receiving an expected value of a digital line control signal pattern, storing it in the comparison signal holding means, receiving a report of pattern matching detection from the comparison means, and reporting it to the central processing unit. A received digital line control signal detection method characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15576990A JPH0446426A (en) | 1990-06-14 | 1990-06-14 | Received digital line control signal detection method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15576990A JPH0446426A (en) | 1990-06-14 | 1990-06-14 | Received digital line control signal detection method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0446426A true JPH0446426A (en) | 1992-02-17 |
Family
ID=15613009
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15576990A Pending JPH0446426A (en) | 1990-06-14 | 1990-06-14 | Received digital line control signal detection method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0446426A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6522853B2 (en) | 2000-09-13 | 2003-02-18 | Kabushiki Kaisha Toshiba | Image printing method and image printing apparatus |
| US6556566B1 (en) | 1997-10-09 | 2003-04-29 | Nec Corporation | Time division switch with inserter and dropper using external memory and time division switching method |
-
1990
- 1990-06-14 JP JP15576990A patent/JPH0446426A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6556566B1 (en) | 1997-10-09 | 2003-04-29 | Nec Corporation | Time division switch with inserter and dropper using external memory and time division switching method |
| US6522853B2 (en) | 2000-09-13 | 2003-02-18 | Kabushiki Kaisha Toshiba | Image printing method and image printing apparatus |
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