JPH0446524A - load drive circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a load drive circuit used in various electronic devices.

BACKGROUND OF THE INVENTION Conventional driving circuits for supplying and stopping DC power supply voltage to a load often have a circuit configuration as shown in FIG.

A load drive circuit 50 in FIG. 6 controls a drive circuit 53 to turn on and off a field effect transistor 54 by turning on and off a switch 51, thereby supplying and stopping the voltage V of the DC power supply 1 to the load 31. was going on.

Problems to be Solved by the Invention However, in the configuration of the conventional load drive circuit described above, when the load 31 shown in FIG.
Also, the rise time of the field effect transistor 54 and the switch 51 when the switch 51 is turned on are required.
There is a problem in that the fall time of the field effect transistor 54 when turned off cannot be arbitrarily set.

The present invention solves the above-mentioned conventional problems, does not require a separate power supply for short-circuit protection, uses one charging/discharging capacitor to protect a field-effect transistor from short-circuit, and switches on the field-effect transistor. It is an object of the present invention to provide a load drive circuit that can arbitrarily set the rise time at the time of switching off the field effect transistor and also set the fall time at the time of switching off the field effect transistor.

Means for Solving the Problems In order to solve the above problems, the load drive circuit of the present invention connects an output terminal to a DC power supply via a main switching element,
A control circuit for turning on and off the main switching element is provided between the DC power supply and the main switching element, and a control element, a charging/discharging capacitor, and the above capacitor are connected between the control circuit and the main switching element. connecting a parallel circuit of resistors for short-circuit protection of the main switching element, and connecting a resistor for controlling the fall time of the main switching element with the capacitor between the control element and the gate or base of the main switching element; Further, a resistor is connected between the control circuit and the switching element to control the rise time of the main switching element using the capacitor.

Effect By having the above configuration, the rise time of the main switching element can be arbitrarily set using one charging/discharging capacitor, and the fall time can also be arbitrarily set, and the main switching element will not be destroyed when the load is short-circuited. It can be used as a load drive circuit that also has a short-circuit protection function.

EXAMPLE Hereinafter, an example of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram of a load driving circuit showing one embodiment of the present invention. In FIG. 1, the positive terminal of the DC power supply 1 is the input terminal of the load drive circuit 10, the source of the field effect transistor 11 as the main switching element, the positive terminal of the charging/discharging capacitor 12, and the Zener diode 1.
3 cathode, transistor 14 emitter, resistor 15
It is connected to one end of ゜16.

The other end of the resistor 15 is connected to the pace of the transistor 14 and also to one end of the resistor 17. The collectors of the transistors 1 and 4 are connected to one end of the resistor 18. The other end of the resistor 18 is the anode of the Zener diode 13, the negative terminal of the charge/discharge capacitor 12, one end of the resistor 19, the other end of the resistor 16, and the field effect transistor 11.
connected to the gate. The other end of the resistor 19 is connected to the anode of the diode 20. The drain of the field effect transistor 11 is connected to one end of a resistor 3o and one end of a load 31. A negative terminal of the DC power supply 1 is connected to the other end of the load 31, the other end of the resistor 3o, and the other end of the switch 25. One end of the resistor 22 and 23 of the differential circuit 21 as a control circuit for on/off control of the field effect transistor 11 is connected to the positive terminal of the DC power supply 1, and the other end of the resistor 22 is connected to one end of the resistor 24. and one end of the switch 25 and the base of the transistor 26. The emitter of transistor 26 is connected to one end of resistor 27 and further connected to the emitter of transistor 28. The base of the transistor 28 is connected to the other end of the resistor 23 and one end of the resistor 29. The other end of the resistor 24, the other end of the resistor 27, and the other end of the resistor 29 are connected to the negative terminal of the DC power supply 1. The other end of the resistor 17 is connected to the collector of the transistor 26 of the differential circuit 21, and the cathode of the diode 20 is connected to the collector of the transistor 26 of the differential circuit 21.
8 collector.

The operation of the above configuration will be explained below.

When the switch 25 is off, the transistor 26 is in the second
The transistor 26 is turned on as shown in the collector voltage waveform A of FIG. 2(a), the transistor 14 is turned on, and the transistor 28 is turned off as shown in the collector voltage waveform A' of the transistor 28 in FIG. 2(b). There is. At this time,
The same voltage as the voltage V of the DC power supply 1 is applied to the gate of the field effect transistor 11, and the field effect transistor 11 is turned off. The voltage waveform A'' in FIG. 2(C) shows the gate voltage waveform of the field effect transistor 11. Also, since the voltage V of the DC power supply 1 is not applied to the load 31, the voltage of the load 31 is figure(
The voltage waveform of d) becomes A゛゛.

At this time, when the switch 25 is switched from off to on at time t1, the transistor 26 is turned off as shown in the collector voltage waveform B of the transistor 26 in FIG. 2(a), the transistor 14 is also turned off, and the transistor 28 is turned off. Figure 2 (
As shown in the voltage waveform B' of the transistor 28 in b), the voltage waveform shown in FIG.
V is a charging/discharging capacitor 12, a resistor 19, and a diode 2
0, the current flowing through the transistor 28 and the resistor 27 is generated by the time constant of the charging/discharging capacitor 12 and the resistors 19 and 20, and after a delay time Δtl, the field effect transistor 11 is turned on, as shown in FIG. 2(d). As shown by the voltage waveform V across the load 31, the voltage V of the DC power supply 1 is applied to the load 31. This delay time Δt1 becomes the rise time of the field effect transistor 11, and it is possible to set an arbitrary rise time using the charge/discharge capacitor 12 and the resistors 19 and 27. The voltage -■ in FIG. 2(a) is the minimum voltage (cutoff voltage) at the gate (or base) at which the field effect transistor (or transistor) becomes non-conductive.

Furthermore, when the switch 25 is switched from on to off at time t2, the transistor 26 is switched from the transistor 2 in FIG. 2(a).
6 is turned on as shown in the collector voltage waveform C, the transistor 14 is further turned on, and the transistor 28 is turned on as shown in FIG.
As shown in the collector voltage waveform C' of the transistor 28 in b), the voltage across the charge/discharge capacitor 12, which is the gate voltage of the field effect transistor 11, is turned off through the charge/discharge capacitor 12, the transistor 14, and the resistor 18. Due to the current flowing through the resistor 16 and the time constant determined by the charging/discharging capacitor 12 and the resistors 18 and 16, -Vl
The field effect transistor 11 is turned off with a delay time Δt2, and the voltage V of the DC power source 1 is not applied to the load 31 (so that the voltage waveform C in FIG. 2(d) is reached). This delay time Δt2 becomes the fall time of the field effect transistor 11, and it is possible to set an arbitrary fall time using the charging/discharging capacitor 12 and the resistors 16 and 18.

Further, the short circuit protection operation of the field effect transistor 11 is as follows. When the switch 25 is turned on, the field effect transistor 11 is turned on as described above, and the load 3 is turned on.
1 is applied with a voltage V from a DC power supply 1. At this time,
When both ends of the load 31 are shorted, the field effect transistor 1
1 drops to approximately the same voltage as the negative voltage of DC power supply 1, transistor 28 switches from on to off, and transistors 14 and 26 connect their off states. The voltage -1 of the charge/discharge capacitor 12 is discharged by the current flowing from the charge/discharge capacitor 12 via the resistor 16 at a time constant determined by the charge/discharge capacitor 12 and the resistor 16. During the discharge time determined by this time constant, a gate voltage is applied to the field effect transistor 11, so that a short circuit current is applied to the field effect transistor 11 during this time without impairing the characteristics of the field effect transistor 11. It becomes possible to continue flowing. In this way, the short circuit protection time can be set to any desired time using the capacitor 12 and the resistor 16.

FIG. 3 is a circuit diagram of a load driving circuit showing another embodiment of the present invention. FIG. 3 shows an embodiment in which a flip-flop circuit is used as a control circuit to control on/off of the field effect transistor 11. One end of the resistor 34 of the flip-flop circuit 33 is connected to the positive terminal of the DC power supply 1.

The other end of the resistor 34 is connected to the anode of the diode 36, as well as to the anodes of the diode 37 and the diode 38.

The cathode of diode 37 is connected to the base of transistor 39. One end of the resistor 40 is connected to the positive terminal of the DC power supply 1. The other end of the resistor 40 is connected to the anode of the diode 35, as well as to the anodes of the diode 41 and the diode 42. The cathode of diode 42 is connected to the base of transistor 43. The emitters of transistor 39 and transistor 43 are connected to the negative terminal of DC power supply 1. One end of the resistor 17 is connected to the flip-flop circuit 3
The cathode of the diode 20 is connected to the collector of the transistor 43 and the cathode of the diode 36 of the flip-flop circuit 33. The cathode of the diode 38 and the cathode of the diode 41 are input terminals for a signal that controls turning on and off of the field effect transistor 11. Connections of other parts are the same as those shown in FIG.

The operation of the above configuration will be explained below.

Collector voltage waveform A of transistor 43 in FIG. 4(b)
As shown in FIG. 4 (
As shown in the collector voltage waveform A' of the transistor 39 in C), the transistor 39 is in the on state, and the transistor 1
4 is also in the on state, and the gate voltage waveform A'' of the field effect transistor 11 in FIG. 4(d) is at the same voltage as the voltage V of the DC power supply 1, and the voltage across the load 31 in FIG. 4(e) is the same. As shown in the waveform '', no voltage is applied to the load '31.At this time, at time t1, the voltage shown in Figure 4 (
When the "L" signal is input to the input as shown in a), the transistor 43 is turned on, the collector voltage waveform of the transistor 43 in FIG. 4(b) becomes B, and the transistor 39 is turned off and the 4 Transistor 3 in Figure (C)
The collector voltage waveform of 9 becomes B', and the transistor 14 is also turned off. Since the transistor 43 is turned on, the gate voltage waveform -Vl of the field effect transistor 11 shown in FIG.
is turned on, and the voltage waveform V of the DC power supply 1 is applied to the load 31 as shown in the voltage waveform V of FIG. 4(e). delay time Δ
t1 is the rise time of the field effect transistor 11, and it is possible to set an arbitrary rise time using the charging/discharging capacitor 12 and the resistor 19.

Also, at time t2, as shown in FIG. 4(a), the R input is “
When the L'' signal is input, the transistor 43 is turned off, resulting in the collector voltage waveform C of the transistor 43 shown in FIG. 4(b), and the transistor 39 is turned on, resulting in the collector voltage waveform of the transistor 39 shown in FIG. Voltage waveform C'
At the same time, the transistor 14 is turned on. Since the transistor 43 is turned off, the gate voltage waveform C' of the field effect transistor 11 in FIG.
After a delay time At2, the field effect transistor 11 turns off, and the voltage V of the DC power source 1 is no longer applied, resulting in a voltage waveform C'' in FIG. 4(e). The delay time Δt2 becomes the rise and fall time of the field effect transistor 11, and the capacitor 1
2 and resistors 16 and 18, it is possible to set an arbitrary fall time. Further, the short circuit protection operation of the field effect transistor 11 is as follows. If both ends of the load 31 are short-circuited while the voltage V of the DC power supply 1 is applied to the load 31, the source voltage of the field effect transistor 11 drops to approximately the same voltage as the negative voltage of the DC power supply 1, remains off. The subsequent short-circuit protection operation is as detailed in FIG.

FIG. 5 is a load driving circuit showing another embodiment of the present invention.

FIG. 5 shows an example in which a simple electronic control circuit is used to control on/off of the field effect transistor 11. In FIG. One end of the resistor 46 of this control circuit 45 is connected to the positive terminal of the DC power supply 1. The other end of the resistor 46 is connected to an anode of a diode 47 and an anode of a diode 48. The cathode of diode 48 is connected to the base of transistor 49. The collector of transistor 49 is connected to the cathode of diode 2o. The emitter of the transistor 49 is connected to the negative terminal of the DC power supply 1. The cathode of the diode 47 is connected to one end of the resistor 17 and further connected to one end of the switch 25. The other end of the switch 25 is connected to the negative terminal of the DC power supply 1. The other end of the switch 25 is connected to the negative terminal of the DC power supply 1. Connections of other parts are the same as those shown in FIG.

The operation of the above configuration will be explained below.

When switch 55 is in the off position, diode 47 is conductive and transistor 49 is off because no bias voltage is generated. Also, the transistor 14 is biased and turned on. At this time, field effect transistor 1
Since the same voltage as the voltage V of the DC power supply 1 is applied to the gate voltage of the field effect transistor 11, the field effect transistor 11 is not turned on. When switch 55 is switched from off to on, diode 47 becomes non-conductive, transistor 14 is turned off, and transistor 49 is biased, so it is turned on. At this time, the field effect transistor 11 is turned on by the time constant of the charging/discharging capacitor 12 and the resistor 19. The rise time of the voltage V applied to the load 31 is determined by the time constants of the charging/discharging capacitor 12 and the resistor 19, as described above. When switch 55 is switched from on to off, diode 47 becomes conductive, no bias voltage is generated in transistor 49, and transistor 49 is turned off.

Further, the transistor 14 is biased and turned on. At this time, the voltage of the charge/discharge capacitor 12, which is the gate voltage of the field effect transistor 11, is discharged by the time constant of the charge/discharge capacitor 12, the resistor 18, and the resistor 16, and the field effect transistor 11 is turned off. load 3
The fall time of the voltage V applied to the capacitor 1 is determined by the time constants of the charging/discharging capacitor 12, the resistor 18, and the resistor 16, as described above.

When the switch 55 is on, the field effect transistor 11
If both ends of the load 31 are short-circuited when is in the on state,
Since the source voltage of the field effect transistor 11 drops to approximately the same voltage as the negative voltage of the DC power supply 1, the transistor 49 is turned off and the transistor 14 continues to be turned off.

At this time, the voltage of the charging/discharging capacitor 12 which becomes the gate voltage of the field effect transistor 11 is
2 and the time constant of resistor 16. During this discharge time, the gate voltage is applied to the field effect transistor 11, so that the short circuit current cannot continue to flow through the transistor 11 without damaging the characteristics of the field effect transistor 11. This discharge time is determined by the time constant of the capacitor 12 and the resistor 16, and becomes the short circuit protection time of the field effect transistor 11.

Effects of the Invention As described above, according to the present invention, the rise time and fall time when driving the main switching element can be set arbitrarily using a single capacitor, and the load can be controlled arbitrarily without the need for a separate power supply. The main switching element can be provided with a short-circuit protection function in the event of a short circuit, so it has a simple circuit configuration.
It is easily realized and extremely useful.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram of a load driving circuit showing one embodiment of the present invention, Fig. 2 is a voltage waveform diagram at each main part of Fig. 1, and Figs. 3 and 5 are other embodiments of the present invention. 4 is a circuit diagram of the load drive circuit showing the voltage waveform diagram at each main part of FIG. 3,
FIG. 6 is a circuit diagram of a conventional load drive circuit. DESCRIPTION OF SYMBOLS 1...DC power supply, 10...Load drive circuit, 11...Main switching element, 12...
... Charge/discharge capacitor, 13... Corner diode, 14, 26° 28... Transistor, 15, 16.17.18° 19.22, 23, 24
．． 27,29.30...Resistance, 20...
・Diode, 21...Differential circuit, 25...
...Switch, 31...Load, 32...
...Load drive circuit, 33...Flip-flop circuit, 34°40...Resistor, 35, 36, 37
, 38, 41° 42... Diode, 39.4
3...Transistor, 44...Load drive circuit, 45...Control circuit, 46...
Resistance, 47.48...Diode, 49...
...Transistor, 55...Switch. Name of agent: Patent attorney Shigetaka Awano (1 person) Figure [-72--L power supply con- r)73 --- Noener power supply 1a, 26, 2L-L transistor 25--Nuino hand 37 − Member pieces” Figure Figure Figure

Claims (3)

[Claims] (1) Connect the output terminal to the DC power supply via the main switching element, provide a control circuit between the DC power supply and the main switching element to turn on and off the main switching element, and connect the control circuit and the main switching element to the main switching element. Between the elements,
A parallel circuit of a resistor is connected between the control element, the charging/discharging capacitor, and the capacitor to protect the main switching element from short circuit, and the capacitor and the main switching element are connected between the control element and the gate or base of the switching element. A load drive circuit comprising a resistor connected to control the fall time of the switching element, and a resistor connected between the control circuit and the main switching element to control the rise time of the main switching element with the capacitor. (2) The load drive circuit according to claim 1, wherein a differential circuit is used as the control circuit. (3) The load drive circuit according to claim 1, wherein a flip-flop circuit is used as the control circuit.