JPH0447436B2 - - Google Patents

Description

[Detailed description of the invention]

TECHNICAL FIELD OF THE INVENTION The present invention relates to an induction heating cooker that heats food in a cooking pot, which is a load, by induction heating the cooking pot, which is a load, using, for example, a high-frequency magnetic field. Technical Background of the Invention Recently, induction heating cookers of this type that can continuously vary the heating output have been developed and are being put into practical use. Problems with the Background Art By the way, in such induction heating cookers, the heating output is varied by switching transistors in the inverter circuit. There is a time difference in the timing, and depending on the on/off timing, an abnormally large current flows from the resonant circuit consisting of the heating coil and the capacitor to the transistor in the inverter circuit, causing trouble to the transistor.
Furthermore, there are problems such as increased power loss and increased noise during switching. Purpose of the Invention This invention was made in view of the above circumstances, and its purpose is to prevent abnormally large current from flowing through the transistors of the inverter circuit, thereby improving safety and reliability. The purpose of the present invention is to provide an excellent induction heating cooker. Summary of the Invention The present invention provides a single-ended inverter circuit including a heating coil connected to a DC power source to inductively heat a load, a transistor connected in series with the heating coil, and a single-ended inverter circuit including a transistor connected to the heating coil in series with the heating coil. In an induction heating cooker comprising a capacitor that forms a resonant circuit with the heating coil during a period when the heating coil is non-conducting, and a drive circuit that drives the transistor of the inverter circuit, the induction cooking device mainly includes a CR time constant circuit. an oscillation circuit configured to output the voltage across the capacitor in the CR time constant circuit that repeats charging and discharging as a signal used for determining the drive start point and drive period of the drive circuit; Based on the comparison with the collector voltage of the transistor
A synchronization circuit that controls the discharge start timing of the capacitor in the CR time constant circuit to trigger the oscillation circuit; and a synchronization circuit that controls the discharge start timing of the capacitor in the CR time constant circuit; By providing an output setting circuit that compares the voltage across the capacitor with a set voltage that can be continuously varied from the outside and controls the drive circuit using this comparison output, how can the output be set? In this case, the transistor is turned on at a time when the collector voltage is, for example, approximately zero potential. Embodiment of the Invention An embodiment of the invention will be described below with reference to the drawings. In FIG. 1, reference numeral 1 denotes a plug connected to an AC power source, and a fan motor 4 and a transformer 5 for cooling the transistor are connected to this plug 1 via a current fuse 2 and a power switch 3. Further, the plug 1 is connected to a heating coil 9 and an inverter circuit 10 via a DC power supply circuit 15 consisting of a diode bridge rectifier circuit 6, a choke coil 7, and a plain vortex capacitor 8 via the current fuse 2 and power switch 3. A series circuit with is connected. This inverter circuit 10 is
It has a single-ended type configuration mainly consisting of NPN transistors 10a and 10b. A capacitor 11 and a diode 12 are connected in parallel to the inverter circuit 10, and the capacitor 11 and the heating coil 9 form a series resonant circuit. On the other hand, 20 is a drive circuit, and this drive circuit 20 is an oscillation circuit 6 supplied via an output setting circuit 40.
The transistor of the inverter circuit 10 is turned on and off by the output of 0. The output voltage of the DC power supply circuit 15 and the collector voltage of the transistor in the inverter circuit 10 are each supplied to a feedback circuit 80, and the oscillation circuit 60 is triggered by the feedback circuit 80. That is, the oscillation frequency of the oscillation circuit 60 is synchronized with the resonance frequency of the heating coil 9 and the capacitor 11. The output setting circuit 40 has an output setting operation section (variable resistor) 100, and the set output thereof is displayed on an output display circuit 120. Reference numeral 140 denotes an input current detection circuit that detects an input current using a current transformer 141 provided in the connection line between the power switch 3 and the DC power supply circuit 15, and outputs a voltage signal corresponding to this input current. It is. The output of this input current detection circuit 140 is supplied to an accessory load detection circuit 160 and an abnormal current detection circuit 180. Small object load detection circuit 1
60 uses the collector voltage of the transistor in the inverter circuit 10 as an internal reference voltage generation power source, compares the reference voltage with the output voltage of the input current detection circuit 140, and determines the size of the load, that is, the cooking pot, by this comparison. This is to detect whether or not the value is below a certain level. Abnormal current detection circuit 180
Detects whether the load current is abnormal based on the output of the input current detection circuit 140.
Therefore, when the small object load detection circuit 160 detects a load with a size below a certain level, or when the abnormal current detection circuit 180 detects an abnormality in the load current, a notification to that effect is supplied to the start/stop circuit 200, and the start/stop circuit A start/stop command is supplied from 200 to the output setting circuit 40. Furthermore, the start/stop circuit 200 is adapted to respond to the detection output of the overheat detector 220 as well. This overheat detection circuit 220 instructs the start/stop circuit 200 to that effect when the temperature of the load exceeds a certain level. The secondary output of the transformer 5 is supplied to a power supply circuit 240, which supplies the drive circuit 20, the output setting circuit 40, the oscillation circuit 60, the feedback circuit 80, and the small load detection circuit. Operating voltages are supplied to the circuit 160 and the abnormal current detection circuit 180, respectively. FIG. 2 specifically shows FIG. 1. In FIG. 2, a power supply circuit 240 rectifies the secondary output of the transformer 5 with rectifier circuits 241 and 242.
The DC voltage is smoothed by smoothing capacitors 243 and 244, and is supplied between the buses A and C and between the buses B and C, respectively, and the DC voltage obtained between the buses A and C is supplied to an NPN transistor 245,
It is converted into a constant voltage by a resistor 246 and a constant voltage diode 247, and is supplied between bus lines D and C. Thus, bus lines A and C are connected to drive circuit 20, output setting circuit 40, oscillation circuit 60, and output display circuit 120. Also, bus line B
is connected to the inverter circuit 10. Furthermore, the bus line D includes a drive circuit 20, an output setting circuit 40, an oscillation circuit 60, a feedback circuit 80, an output display circuit 120, a load current detection circuit 140, and an accessory load detection circuit 16.
0, connected to the abnormal current detection circuit 180 and the start/stop circuit 200. The oscillation circuit 60 is a so-called unstable multivibrator, and a series circuit of resistors 61, 62 and a capacitor 63 is connected between bus bars A and C.
The voltage available at the interconnection point of 2 and capacitor 63 is applied to the inverting input (-) of comparator 64.
Further, a series circuit of resistors 65 and 66 is connected between bus lines D and C, and the interconnection point of the resistors 65 and 66 is connected to the output terminal of the comparator 64 via a resistor 67. Furthermore, the interconnection point of the resistors 65 and 66 is connected to the non-inverting input terminal (+) of the comparator 64. A diode 68 of the polarity shown is connected between the output terminal of the comparator 64 and the interconnection point of the resistors 61 and 62. The output setting circuit 40 constitutes a series circuit including a semi-fixed resistor 41, a variable resistor 100 which is the output setting operation section, and a resistor 42, and this series circuit is connected between bus lines D and C. Furthermore, a series circuit of a resistor 43 and a capacitor 44 is connected between bus lines D and C, and the interconnection point between the resistor 43 and the capacitor 44 is connected to the variable resistor 100 and the resistor 42 through a diode 45 having the polarity shown. Connect to a connection point. Then, the voltage obtained at the interconnection point between the resistor 43 and the capacitor 44 is supplied to the non-inverting input terminal (+) of the comparator 46. The inverting input terminal (-) of the comparator 46 is supplied with the output of the oscillation circuit 60, that is, the voltage obtained at the interconnection point between the resistor 62 and the capacitor 63. Further, a series circuit of resistors 47, 48 and a diode 49 is connected between the bus lines D and C, and the interconnection point between the resistor 48 and the constant voltage diode 49 is connected to the output terminal of the comparator 46.
Then, the voltage obtained at the interconnection point between the resistor 48 and the diode 49 is supplied to the drive circuit 20 via the resistor 50. The drive circuit 20 connects resistors 21 and 22, between the collector and emitter of an NPN transistor 23, and a series circuit of a resistor 24 between buses A and C, and connects an output setting circuit 40 to the base of the transistor 23.
provides the output of Furthermore, a series circuit between the resistor 25 and the collector-emitter of the NPN transistor 26 is connected between the bus lines A and C. The emitter of transistor 23 is connected to the base of transistor 26 via resistor 27, and the base of transistor 26 is connected to bus line C via resistor 28. Further, a series circuit between the emitter and collector of the PNP transistor 29, a resistor 30, a diode 31, and a collector and emitter of the NPN transistor 32 is connected between the buses A and C. Then, the base of the transistor 29 is connected to the interconnection point of the resistors 21 and 22. An NPN transistor 33 is connected to the collector of the transistor 32.
The collector of this transistor 33 is connected to the base of the transistor 32, and the emitter of this transistor 33 is connected to the base of the transistor 32.
Further, a parallel circuit of a resistor 34 and a capacitor 35 is connected between the base of the transistor 33 and the collector of the transistor 26. The inverter circuit 10 constitutes a single-ended type circuit with NPN transistors 10a, 10b, 10c, 10d and diodes 10e, 10f, and each transistor is connected to a drive circuit 2.
0 output, that is, the voltage obtained at the interconnection point between the resistor 30 and the diode 31, is used to perform the switching operation. The feedback circuit 80 includes a diode 81 and a resistor 8.
2 series circuits are connected between bus lines D and C, and the collector voltage of the transistor in the inverter circuit 10 is connected to the interconnection point between the diode 81 and the resistor 82.
V _x is supplied via a resistor 83. The voltage obtained at the interconnection point is then supplied to the non-inverting input terminal (+) of the comparator 84. The inverting input terminal (-) of this comparator 84 is connected to the bus line C via a resistor 85, and the output of the DC power supply circuit 15 is connected to the interconnection point between the inverting input terminal (-) and the resistor 85 via a resistor 86. Supply voltage V _y . Furthermore, the output end of the comparator 84 is connected to the bus line D via a resistor 87, and is also connected to the bus line D via a resistor 88, a capacitor 89, and a resistor 90 in series. The base of a PNP transistor 91 is connected to the interconnection point between the capacitor 89 and the resistor 90, and the resistor 9 is connected between the emitter and collector of this transistor 91.
2,93 series circuits are connected between bus bars D and C.
Then, the voltage obtained at the interconnection point of the resistors 92 and 93 is supplied to the inverting input terminal (-) of the comparator 94. A voltage obtained at the interconnection point of the resistors 47 and 48 in the output setting circuit 40 is supplied to the non-inverting input terminal (+) of the comparator 94. Thus, the output terminal of comparator 94 is connected to the output terminal of comparator 64 in oscillation circuit 60. The input current detection circuit 140 includes resistors 141 and 14
2,143 series circuits are connected between bus bars D and C,
The resistors 142 and 143 include a capacitor 144,
145 are connected in parallel. A capacitor 145, a resistor 146, and a diode 147 are connected to the parallel circuit of the resistor 142 and the capacitor 144.
The output end of the current transformer 141 is connected through the current transformer 141. The abnormal current detection circuit 180 includes resistors 181 and 18.
2,183 series circuits are connected between bus bars D and C,
The voltage obtained at the interconnection point of the resistors 181 and 182 is supplied to the non-inverting input terminal (+) of the comparator 184. The voltage obtained at the interconnection point between the diode 148 and the capacitor 144 in the input current detection circuit 140 is supplied to the inverting input terminal (-) of the comparator 184. The small load detection circuit 160 includes a capacitor 161
and a resistor 162 are connected to the bus C, and the inverter circuit 10 is connected to the other end of the parallel circuit via a diode 163 and a resistor 164 in series.
Supplies the collector voltage of each transistor in Therefore, a series circuit of resistors 165, 166 and a semi-fixed resistor 167 is connected between the interconnection point of the parallel circuit and the resistor 164 and the bus C. A capacitor 168 is connected in parallel to the semi-fixed resistor 167. A resistor 169 and a capacitor 17 are connected between the movable terminal of the semi-fixed resistor 167 and the bus C.
A series circuit of 0 is connected, and a diode 171 is connected in parallel to the resistor 169. The voltage obtained at the interconnection point of the resistor 169 and the capacitor 170 is supplied to the inverting input terminal (-) of the comparator 172, and the non-inverting input terminal (+) of the comparator 172 is connected to the diode in the input current detection circuit 140. 148 and the resulting voltage at the interconnection point of capacitor 144. Also, the comparator 4 in the output setting circuit 40
6 is supplied to the non-inverting input terminal (+) of the comparator 173, and the inverting input terminal (-) of the comparator 173 is connected to the interconnection of the resistors 182 and 183 in the abnormal current detection circuit 180. Supply the voltage obtained at the point. The start/stop circuit 200 includes the overheat detector, such as a thermostat 220, which responds to the temperature of the load.
A series circuit of a resistor 202 and a capacitor 203 is connected between bus lines D and C. A resistor 204 is connected in parallel to the capacitor 203. And resistance 2
02 and the parallel circuit of a capacitor 203 and a resistor 204.
It is supplied to the non-inverting input terminal (+) of No. 4. The voltage obtained at the interconnection point of the resistors 181 and 182 in the abnormal current detection circuit 180 is supplied to the inverting input terminal (-) of the comparator 204. However, comparator 2
04 is connected to the interconnection point of the resistor 43 and capacitor 44 in the output setting circuit 40. The output display circuit 120 includes a light emitting diode 1 for displaying whether the heating coil 9 is in operation or not.
21 is a resistor 122 and an NPN transistor 1
23 collectors and emitters are connected in series between buses A and C. And transistor 12
The base of 3 is connected to the output setting circuit 4 via the resistor 124.
0 to the interconnection point of resistor 43 and capacitor 44. Moreover, the light emitting diode 125,
125,...125 are resistors 126, 12, respectively
6, . . . 126 to a level meter 127, and these circuits are connected between bus lines D and C. The level meter 127 inputs the voltage obtained at the interconnection point between the variable resistor 100 and the resistor 42 in the output setting circuit 40, and depending on the level of the input voltage, the light emitting diodes 125, 125,
...125 selectively activated, for example, for a Toshiba level meter called TA7655P.
IC is used. Next, the operation in the above configuration will be explained. First, a load, that is, a cooking pot (not shown) is set on the heating coil 9, the output is set by operating the variable resistor 100, and the power switch 3 is turned on.
Turn on. Then, in the oscillation circuit 60, as shown in FIG.
is charged, and the charging voltage V _c is applied to the resistors 65 and 66.
When the voltage V _ref1 obtained at the interconnection point of is reached,
The output of the comparator 64 becomes a low voltage, and the comparator 6
4 through the power supply line (not shown) to the resistor 6.
6 and 67 are connected in parallel. In other words, comparator 6
The voltage input to the non-inverting input terminal (+) of 4 is
V _ref2 is lower than V _ref1 . Then, the charging voltage V _c of the capacitor 63 is
8 and the comparator 64 power line. In this way, the charging voltage V _c of the capacitor 63
When the voltage becomes lower than the voltage V _ref2 , the capacitor 63
Charging of the capacitor 63 is started, and charging and discharging of the capacitor 63 are repeated thereafter. In other words, the charging voltage V _c of the capacitor 63 becomes the oscillation output. On the other hand, in the output setting circuit 40, as shown in FIG.
As shown in FIG. 2, a voltage from an upper limit e ₁ to a lower limit e ₂ is supplied to the non-inverting input terminal (+) of the comparator 46 in accordance with the operation of the variable resistor 100. And comparator 46
The oscillation output of the oscillation circuit 60, that is, the charging voltage _Vc of the capacitor 63 is supplied to the inverting input terminal (-) of the oscillation circuit 60. In this way, the output of the comparator 46 changes with a period T, as shown in FIG.
The off-duty is determined according to the output setting value based on the operation of the variable resistor 100. In this case, the period T is designed to be, for example, 50 μs. Therefore, the drive circuit 20 is the output setting circuit 4
0, that is, the output of the comparator 46, the transistors of the inverter circuit 10 are turned on and off, and a high frequency current is supplied to the heating coil 9. Then, the high-frequency magnetic field emitted from the heating coil 9 is applied to the cooking pot, causing eddy current loss in the cooking pot and self-heating, thereby heating the food. At this time, the feedback circuit 80 is supplied with the collector voltage V _x of the transistor in the inverter circuit 10 and the output voltage V _y of the DC power supply circuit 15 as shown in FIG. 5a, respectively. Thus, the feedback circuit 80 performs the following operation. That is, the fifth
As shown in FIG. b, the collector voltage V _x is converted by a diode 81 and resistors 82 and 83 into a voltage g ₁ that can be input to the comparator. Furthermore, the DC output voltage
V _y is converted to voltage g ₂ by resistors 85 and 86.
By comparing the voltages g ₁ and g ₂ in the comparator 84, a signal shown in FIG. This signal is differentiated by a differentiating circuit composed of resistors 88, 90, capacitor 89, transistor 91, etc., and becomes a signal having a time width _t1 as shown in FIG. 5d. This differential signal is voltage-divided by resistors 92 and 93 to become a signal at the level shown in FIG. 5e,
It is supplied to the inverting input terminal (-) of the comparator 94. The non-inverting input terminal (+) of this comparator 94 receives the output signal of the output setting circuit 40 (shown by a broken line in FIG. 5e).
is supplied. In this way, as shown in FIG. 5f, a signal whose level is low for a time width t ₂ (t ₂ <t ₁ ) is output from the comparator 94, and is supplied to the oscillation circuit 60 as a trigger signal. Therefore, when the output of the comparator 94 becomes low level, the resistors 66 and 67 in the oscillation circuit 60 are connected in parallel through the power line of the comparator 94, and the input to the non-inverting input terminal (+) of the comparator 64 is connected in parallel. voltage is forced
V _ref2 . Taking this as a trigger, the output of the comparator 64 becomes logic "0", and the comparator 64 outputs a logic "0".
The charging voltage V _c of the capacitor 63 is discharged through the power supply line No. 4. And the charging voltage V _c is the voltage
When the voltage becomes lower than V _ref2 , charging of the capacitor 63 is started again. That is, the oscillation output of the oscillation circuit 60 becomes the signal shown in FIG. Here, FIG. 6a shows changes in the collector voltage V _x of the transistor in the inverter circuit 10. That is, at the maximum set output, the change occurs as shown by the dashed line in the figure, and at the minimum set output, the change occurs as shown by the solid line in the figure. By the way, the intersection point between the collector voltage V _{x (MAX)} at the maximum set output and the output voltage V _y of the DC power supply circuit 15 is β, and as described above,
A pulse having a time width t ₁ shown in FIG. 5d is generated at the intersection point β, and the oscillation circuit 60 is triggered in synchronization with the pulse. In addition, the collector voltage V _{x (MIN)} at the minimum set output and the output voltage of the DC power supply circuit 15
The intersection with V _y is β′, and the time width is
A pulse of t ₁ is generated, and in synchronization with it, the oscillation circuit 6
0 is triggered. At the minimum set output, as is clear from FIG. 6a, the intersection point β' has a time difference of α with respect to the zero potential point of the collector voltage V _x . Therefore, if the transistors 10a and 10b are turned on at the time β', an abnormally large current flows from the capacitor 11 forming the resonant circuit to each transistor of the inverter circuit 10, and each transistor is turned on. This poses problems such as interfering with the transistor, increasing power loss, and increasing noise during switching. Therefore, in this invention, such a danger can be eliminated by the oscillation circuit 6.
This is avoided by utilizing the discharge time constant of the capacitor 63 at 0 and the change in the set voltages e ₁ to e ₂ in the output setting circuit 40. That is, FIG. 6b shows the change in the charging voltage V _c of the capacitor 63 when the set output is maximum and when the set output is minimum. As is clear from this, the charging voltage V _{c (MIN)} at the minimum set output intersects with the minimum set voltage e ₂ after a γ time delay from the intersection β′, and the intersection point is the charging voltage V c (MIN) at the maximum set output. It approximately coincides with the intersection of _c(MAX) and the maximum setting voltage _e1 . Therefore, the transistors 10a and 10b can be turned on at the same point in time from the minimum set output to the maximum set output, for example, at the time when the collector voltage Vx is approximately zero potential, and each transistor from the capacitor 11 to the inverter circuit 10 No abnormally large current will flow through. Therefore, problems such as those described above can be prevented. Next, we will discuss no-load detection. The current transformer 41 outputs a voltage according to the power supply current, and this output voltage is rectified by the load current detection circuit 140. By the way, a slight bias voltage is applied to the input current detection circuit 140 by resistors 141, 142, and 143, and when the power is turned on (when the inverter circuit 10 is not yet operating), the small load detection circuit The output of comparator 172 at 160 is configured to always maintain a logic "1". The small load detection circuit 160 first includes a diode 163, resistors 164 and 162, and a capacitor 161.
By lowering and smoothing the collector voltage of the transistor in the inverter circuit 10, a voltage that is not affected by the set output but is proportional to the power supply voltage is obtained. This voltage is determined by comparator 17
3, it changes in synchronization with the output of the output setting circuit 40. This voltage is then smoothed by a capacitor 168. Here, the voltage of capacitor 168 is
FIG. 7 shows the relationship between V _k and the output voltage V _l of the load current detection circuit 140. Therefore, the voltage V _k is adjusted to a potential lower than the voltage V _l by the semi-fixed resistor 167, and the comparator 172 uses it as a reference voltage.
supplied to In this way, the input current detection circuit 14
0 output voltage V _l and the above reference voltage V _k are the comparator 1
will be compared at 72. That is, when the load (cooking pot) is not set or the size of the load is below a certain level, the voltage V _l becomes below the reference voltage V _k and the output of the comparator 172 becomes logic "0". Then, the charging voltage of the capacitor 203 in the start/stop circuit 200 is discharged,
The output of comparator 205 becomes logic "0". When the output of this comparator 205 becomes logic "0", a discharge path is formed for the capacitor 44 in the output setting circuit 40, and the output setting circuit 40 is connected to the oscillation circuit 60.
maintains a logic "0" output without being affected by the output of Therefore, the inverter circuit 10 does not operate and heating operation is prohibited. In this case, the reference voltage
capacitor 2 without being affected by changes in V _k .
03, a delay circuit is configured in the small object load detection circuit 160 by a resistor 169 and a capacitor 170. In addition,
In the start/stop circuit 200, when the power is turned on, charging of the capacitor 203 is started, and when the charging voltage is sufficiently high, the output of the comparator 205 becomes logic "1", and the comparator 46 in the output setting circuit 40 is non-inverted. The input terminal voltage is the oscillation voltage in the oscillation circuit 60.
V _ref2 or more, thereby inverter circuit 10
operation. When the load is abnormal as described above, or when the load temperature rises abnormally, the comparator 2 is discharged by discharging the charging voltage of the capacitor 203.
The output of 05 is set to logic "0", thereby prohibiting the heating operation. Further, when the detected load current becomes abnormally large, the comparator 18 in the abnormal current detection circuit 180
4 becomes logic “0”, and the start/stop circuit 20
0 inhibits heating operation. On the other hand, in the output display circuit 120, when the output coil 9 is energized, the transistor 123 is turned on by the charging voltage of the capacitor 44 in the output setting circuit 40, and the light emitting diode 121 is operated. Further, the level meter 127 operates according to the set voltage based on the operation of the variable resistor 100, and the arbitrary light emitting diode 12 operates according to the set output.
5 works. Next, the operation in response to fluctuations in AC power supply voltage will be described. Capacitor 6 in oscillation circuit 60
The charging voltage V _c of No. 3 is expressed by the following formula. Here, E is the applied voltage, C is the capacitance of the capacitor 63, and R is the combined resistance of the resistors 61 and 62. That is, the charging voltage V _c of the capacitor 63 has a CR time constant with respect to the applied voltage E. In this case, the applied voltage E is obtained between the bus lines A and C and therefore corresponds to the AC power supply voltage, and therefore the charging voltage V _c of the capacitor 63 also corresponds to the AC power supply voltage. Figure 8a is the charging voltage
This shows the change in V _c . When the AC power supply voltage increases, the time to reach V _ref1 from V _{ref2 becomes shorter as shown by the dashed line in the figure, and when the AC power supply voltage decreases, the time to reach V ref1} becomes shorter as shown by the solid line or the dashed double dot line in the figure. The time required to reach V _ref1 from V _ref2 becomes longer. At this time, if the charging voltage of the capacitor 44 of the output setting circuit 40 based on the operation of the variable resistor 100 is e, the drive pulses for the inverter circuit 10 are as shown in FIG. It becomes like d. In other words, it is possible to substantially match the drive pulse widths for the inverter circuit 10 regardless of fluctuations in the AC power supply voltage, thereby suppressing fluctuations in the output. Here, the table below shows changes in the output state due to fluctuations in the AC power supply voltage obtained through experiments, and it can be seen that the inventive circuit has less output change than the conventional circuit.

[Table] It goes without saying that the present invention is not limited to the above-mentioned embodiments, and that various modifications can be made without departing from the gist. Effects of the Invention As described above, according to the present invention, there is provided a heating coil that is connected to a DC power source to inductively heat a load;
a single-ended inverter circuit including a transistor connected in series with the heating coil; a capacitor forming a resonant circuit with the heating coil during a period when the transistor of the inverter circuit is non-conducting; In an induction heating cooker equipped with a drive circuit that drives the transistor of the inverter circuit, the voltage across the capacitor in the CR time constant circuit that repeats charging and discharging is controlled by the drive circuit. an oscillation circuit that outputs a signal used to determine a driving start point and a driving period; and a timing at which discharge of the capacitor starts in the CR time constant circuit based on a comparison between the output voltage of the DC power source and the collector voltage of the transistor. and a synchronous circuit that controls the oscillation circuit to trigger the oscillation circuit, and a synchronous circuit that controls the voltage across the capacitor in the CR time constant circuit to trace the progress from when the capacitor starts discharging to when it starts charging again. An output setting circuit is provided which compares the voltage with a variable set voltage and controls the drive circuit using the comparison output. Therefore, according to the present invention, as is clear from the explanation of FIG. 6, since the relationship between the discharge time constant and the set voltage level in the oscillation circuit is effectively utilized, the set output can be changed from the minimum set output to the set output. Within the maximum range, no matter how the output is set, the transistor can always be turned on, for example, when the collector voltage is at approximately zero potential. Therefore, it is possible to prevent an abnormally large current from flowing through the transistors of the inverter circuit, reduce loss and prevent the generation of noise, and improve stability and reliability.

[Brief explanation of drawings]

The drawings show one embodiment of the invention.
The figure is a block diagram schematically showing the overall configuration of the control circuit, and Figure 2 is a block diagram specifically showing Figure 1.
Figure 3 is a signal waveform diagram for explaining the operation of the oscillation circuit, Figures 4a and b are signal waveform diagrams for explaining the operation of the output setting circuit, and Figures 5a, b,
c, d, e, f, and g are signal waveform diagrams for explaining the operation of the feedback circuit, respectively, and Fig. 6 a, b, and c are signal waveform diagrams for explaining the protection function for the inverter circuit when the output changes, respectively. 7 are characteristic diagrams for explaining the operation of the input current detection circuit and the small load detection circuit, and FIG. It is a signal waveform diagram. 9... Heating coil, 10... Inverter circuit,
10a, 10b, 10c, 10d... NPN type transistor, 11... Capacitor, 15... DC power supply circuit, 20... Drive circuit, 40... Output setting circuit, 60... Oscillation circuit, 80... Feedback circuit, 1
40...Input current detection circuit, 160...Small load detection circuit, 180...Abnormal current detection circuit, 200
...Start/stop circuit.

Claims (1)

[Claims] 1. A single-ended inverter circuit including a DC power source, a heating coil connected to the DC power source to inductively heat a load, a transistor connected in series to the heating coil, and the transistor of the inverter circuit The CR is mainly composed of a capacitor that forms a resonant circuit with the heating coil during a non-conducting period, a drive circuit that drives the transistor of the inverter circuit, and a CR time constant circuit, and repeats charging and discharging. a resonant circuit that outputs the voltage across the capacitor in the time constant circuit as a signal used to determine the drive start point and drive period of the drive circuit; and a resonant circuit that charges the capacitor again from the point in time when it starts discharging in the CR time constant circuit. The voltage across the capacitor during the process of starting the process is compared with a set voltage that can be continuously varied from the outside, and an output setting circuit controls the drive circuit using the comparison output, and the collector voltage of the transistor is and a synchronization circuit that varies a period from when the collector voltage of the transistor matches the output voltage of the DC power source until the transistor is turned on when the voltage is changing toward zero according to the set voltage value. An induction heating cooker that is characterized by