JPH0448018Y2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a loop filter (low-pass filter) used in a PLL (phase control circuit) synthesizer type tuner.

Figure 1 shows the basic loop of the PLL.

In the figure, r is the comparison frequency, 1 is the phase comparator and the charge pump (hereinafter, both are collectively referred to as
2 is a loop filter, 3 is a tuning voltage (hereinafter referred to as TV), 4 is a voltage controlled oscillator (VCO), and 5 is a variable frequency divider.

The loop filter 2 is composed of an emitter follower _Q1 , a Darlington transistor _Q2 , resistors _R1 to _R5 , and capacitors _C1 and _C3 .

When TV3 is low, the voltage at the PD1 terminal becomes "L", and both _Q1 and _Q2 are cut off,
It is charged through the path R ₃ , C ₁ , R ₂ , R ₁ and the TV rises.

Also, when TV is high, the voltage at the PD1 terminal becomes “H”, and both Q ₁ and Q ₂ are turned on,
When the collector-emitter voltage V _CE of Q ₂ reaches almost the saturation value, the capacitor C ₁ is discharged and TV falls.

These two actions take place instantly,
TV is held constant and PLL is locked.

Figure 2A shows the conventional FM loop filter 2A,
FIG. 2B is a circuit diagram of a conventional AM loop filter 2B.

That is, conventionally, separate loop filters 2A and 2B were used for FM and AM.

Alternatively, as shown in Figure 3, there was also a loop filter 2C for both FM and AM.

In this case, the comparison frequency in FM is 25KHz
(Pulse swallow method), it was possible to make settings that gave priority to AM, and the design was easy.

However, if the pulse swallow method is not used, the FM comparison frequency will be 5KHz,
When configured as shown in Figure 3, either FM or AM had to be sacrificed.

In this way, conventionally, as shown in Figure 2 A and B,
Since loop filters were configured separately for FM and AM, twice the number of parts was required, which was disadvantageous in terms of cost and space.

In addition, even when configured as shown in Figure 3, the number of parts is halved, which is advantageous in both cost and space, but as mentioned above, the design of the loop filter is often different between FM and AM. It was difficult.

An object of the present invention is to provide a loop filter that overcomes the drawbacks of the conventional loop filter, is advantageous in terms of cost and space, and allows FM and AM to be designed separately.

Hereinafter, the present invention will be specifically explained with reference to the drawings.

FIG. 4 is a circuit diagram of a loop filter according to an embodiment of the present invention.

In the figure, 10 is a PD for both FM and AM, 2
0 is a loop filter, 30 is an FM TV, and 40 is an AM TV.

The loop filter 20 includes an emitter follower including a transistor _Q1 having a base connected to the output of the phase comparator 10 of the charge pump, a Darlington transistor Q2 having a base connected to the emitter of the transistor _Q1 of the emitter follower, and a Darlington transistor _Q2 having a base connected to the emitter of the transistor Q1 of the emitter follower; The base of the emitter follower transistor _Q1 and the Darlington transistor
These are connected between the collector of Q ₂ and the on/off switch of the emitter follower and Darlington transistor.
It is equipped with a charging/discharging circuit consisting of a series circuit of a resistor R ₂ and a capacitor C ₁ whose charging/discharging is controlled by turning off, and a capacitor C ₂ connected in parallel with this series circuit.

In addition, the capacitor of the charging/discharging circuit is connected in parallel with the series circuit of the above resistor R ₂ and capacitor C ₁ .
_C2 is for lowering the gain in the high range.

Then, from the collector of the above Darlington transistor _Q2 , it is connected through resistors _R6 and _R5 , respectively.
Tuning voltages for AM and FM are taken out, and a capacitor _C3 is connected between the other end of the resistor _R6 , which is the output end of the tuning voltage for FM, and ground.
is connected.

What is important here is that in the present invention, the Darlington transistor of the loop filter 20
From the collector of Q ₂ , TV30 for FM and TV4 for AM
0 and 0, and each is configured to supply TV through separate routes.

In the conventional configuration shown in Figure 3, R ₅ , C ₃
However, in the present invention, in the case of FM, the cutoff frequency of the loop filter is lowered due to the influence of R ₆ and C ₃ .

On the other hand, during AM, the tuning voltage 40 is output from the collector of the Darlington transistor Q ₂ via the resistor R ₅ , but in this case the above-mentioned
The series circuit of resistor R ₆ and capacitor C ₃ on the FM side is simply connected in parallel with this Darlington transistor Q ₂ , and the function of lowering the cut-off frequency is almost eliminated.

Therefore, since the characteristics for FM reception and the characteristics for AM reception can be set separately, a highly stable loop filter can be obtained.

In addition, the electrolytic capacitor _C4 shown in the diagram as one that can be connected between the output terminal of the tuning voltage for AM and the ground can be used when adjustment is necessary to improve the C/N ratio during AM reception. It is inserted into etc.

As described above, the present invention allows loop filters with different comparison frequencies to be configured individually by sharing expensive active elements as components and adding inexpensive passive elements. It can be designed for each band, and moreover, it can be manufactured at a lower cost by reducing the number of parts than a system designed for each reception band, and has advantages such as being advantageous in terms of space.

[Brief explanation of drawings]

Figure 1 is a block diagram showing the basic loop of PLL.
Figures 2A and B are circuit diagrams of a conventional FM/AM loop filter, Figure 3 is a circuit diagram of a conventional FM/AM loop filter, and Figure 4 is an FM according to an embodiment of the present invention.・This is a circuit diagram of the AM common loop filter. 20...Loop filter, _Q1 ...Emitter follower, _Q2 ...Darlington transistor.

Claims (1)

[Claims for Utility Model Registration] A PLL that includes a voltage controlled oscillator, a variable frequency divider, a phase comparator, and a charge pump, generates a tuning voltage using a loop filter to attenuate the comparison frequency, and controls the voltage controlled oscillator. A loop filter used in a synthesizer-type tuner, wherein the loop filter includes an emitter follower including a transistor having a base connected to the phase comparator, a Darlington transistor having a base connected to the emitter of the transistor, and the transistor. and a charging/discharging circuit connected between the base of the transistor and the collector of the Darlington transistor to control charging and discharging by turning on and off the transistor and the Darlington transistor, and the collector of the Darlington transistor. A loop filter that extracts tuning voltages for AM and FM from each through a resistor, and further includes a capacitor connected between at least an output terminal of the tuning voltage for FM and ground.