JPH0455963A - Data protecting device for memory card - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a data protection device that is used in a memory card as an external storage device of a personal computer or the like and protects data from being read from the memory card.

[Conventional Example] In recent years, advances in LSI technology have led to the development of large-capacity storage elements, and IC cards have been proposed to replace magnetic cards.
There is a data protection device for a memory card that contains only a memory element.

Since memory cards are small and easy to store, they are used as external storage devices in, for example, personal computers, and are expected to become even more popular in the future.

By the way, as shown in FIG. 2, a device for reading data from a memory card 1, such as a personal computer, is equipped with a CPU 2 that controls data writing and reading, and an address bus 3 and a data bus 4 of the CPU 2. and control lines (RD, IIR, CE, etc.) 5
can be connected to memory card 1. The personal computer or the like is equipped with a ROM 6 that stores control programs for writing, reading, etc., and a RAM 7 that stores data used for various controls.

[Problems to be Solved by the Invention] However, with the personal computer or the like of the data reading device of the memory cart, anyone who can handle it can read and use the data on the memory card 1. Confidentiality may also be an issue. Namely.

There was a problem in that it was not possible to write data to the memory card that would not be known by others.

The present invention has been made in view of the above-mentioned problems, and its purpose is to provide a data protection device for a memory card that allows only a specific user to read data.

[Means for Solving the Problems] In order to achieve the above object, the present invention connects to an address bus, a data bus, etc. of a CPU.

A memory card reading device capable of writing and reading data via the data bus includes a storage means for storing a number unique to the user of the memory card, and a storage means for storing a number unique to the user of the memory card, and a storage means for storing the number unique to the user of the memory card. Compare the data of the input number input by the input means for inputting data with the data stored in the storage means.

a control means that writes data according to the comparison result to a predetermined I/O address and makes it possible to read the data of the memory card; and a control means that sets the comparison result when writing the comparison result, and a flip-flop circuit that is reset by turning on the power or a predetermined command, an I/O decoder that decodes the predetermined address/○ address and outputs a set signal for the flip-flop circuit, and a memory card that writes data to the memory card. , and a three-state buffer circuit for outputting a chip enable (CE) signal from the CPU to the memory card in a readable state as a high-power signal from the flip-flop circuit, and the memory card is stored in the storage means. The gist of the present invention is that data can be read from the memory card only when number data is input from the input means.

[Function] With the above configuration, when using the memory card, the memory card is loaded into a device with the configuration, for example, a personal computer, but before reading data from the memory card, the password must be entered using the input device. You will have to input it. Then, in the CPU of the personal computer, a storage section (for example, E (Electrically
) EP ROM) and the input password data are compared, and the comparison result is written to a predetermined I/O address. for example,
If the comparison is a match, “1” is written to the specified I/O address, and if the result is a mismatch, “1” is written to the specified I/O address.
0” is written to a predetermined I/O address, but in this write process, the “1” is written to the flip-flop circuit.
n or "O" can be set.

Since the Q output of this flip-flop circuit is the gate signal of the three-state buffer circuit, 1. For example, if the input password matches the password stored in the EEPROM, the three-state buffer circuit is set to an output enabled state, and a CE multiplication signal control signal from the CPU is input to the memory card, and the memory card is set to a data writing/reading state. However, if the input PIN number does not match the PIN number stored in the EEPROM, the output of the three-state buffer circuit is made floating, and the CE double signal from the CPU is not input to the memory card, and the memory The card is disabled from writing or reading data.

[Implementation example] Hereinafter, an embodiment of the present invention will be described based on FIG. 1.

In the figure, the same parts and corresponding parts as in FIG. 2 are designated by the same reference numerals, and redundant explanation will be omitted.

In this figure, a device for reading data from a memory card 1 includes a three-state buffer circuit 9 that controls the output of a CE multiplied signal on a control signal line 8 that selects the memory card 1, and a password for the user of the memory card 1. A rewritable storage unit (E (El) that stores numbers (data)
(EP ROM)/O, an input device (input means) 11 for inputting a password when reading data from the memory card 1, and a CPU shown in FIG.
In addition to the function 2, the CPU 12 has a processing function of comparing the input password (data) with the password (data) stored in the EEPROMIO and writing the comparison result to a predetermined I/O address. and its predetermined l/
○I/O that decodes addresses and outputs pulse signals
The decoder 13 sets the data (comparison result; for example, "1" in the case of a match) to be written to the above-mentioned predetermined address/○ address at the timing of this pulse signal, and the Q output is set to the above-mentioned
The flip signal used as the gate signal of the state buffer circuit 9
A flop circuit 14 is also provided.

Note that the password stored in the EEPROMIO is enabled by the CPU 12. Further, the flip-flop circuit 14 is reset when the device is powered on or by a command such as an interruption command.

Next, the operation of the memory card data protection device having the above configuration will be explained.

First, in order to read data from the memory card 1, the memory card is loaded into a device equipped with the data protection device, such as a personal computer, and then, prior to reading the data, the input device 211 is used to input a user-specific Enter your PIN. Then, in the CPU 12 of the personal computer, the PIN number (data)
A comparison is made between the password and the password (data) stored in the EEPROMIO. At this time, EEPROMI
If O stores the user's unique PIN number, C
The PU 12 executes a process of writing matching data (""1") to a predetermined I/O address. At this time, the predetermined /O address is output to the address bus 3, and the matching data is written to the data bus 4. Note that if the above comparison results do not match, and if the PIN stored in EEPROM lo has not been input, the CPU 12
A process of writing mismatch data (“O”) to a predetermined I/O address is executed.

Subsequently, the I/O address on the address bus 3 resulting from this processing is decoded by the I/O decoder 13, a pulse signal is output, and the data (match or non-R) on the data bus 4 is determined by the pulse signal. Flip-flop circuit 1
Set to 4. Therefore, if they match, "1" is set in the flip-flop circuit 14, so the Q output of this flip-flop circuit 14 goes "L".
level, and the three-state buffer circuit 9 becomes ready for output.

However, if there is a mismatch, "0" is set in the flip-flop circuit, so this Q output becomes "H" level, and the three-state buffer circuit 9 becomes a floating state.

Subsequently, when the operator of the personal computer performs an operation to read data from the memory card 1, the EEPR
If the password stored in OMIO and the input password match, the flip-flop circuit 14
Since this is set to "1", the GE multiplied signal of the control signal is input to the memory card 1 via the three-state buffer circuit 9, so the memory card 1 becomes ready for data reading. However, if the entered password does not match the password stored in the EEPROMIO, the flip-flop circuit 14
'' is set, the output of the three-state buffer circuit 9 is placed in a floating state, and the CE multiplied signal is not input to the memory card 1, making the memory card 1 in a state in which data cannot be read.

Therefore, if the operator of the personal computer is an EE
If you do not know the password stored in the PROM, you will not be able to use the data on the memory card 1 loaded into the personal computer).

Therefore, for example, if you temporarily leave the place after using the data on the memory card 1 on a personal computer, conventionally, the data on the memory card 1 loaded in the personal computer by another person may be lost. However, according to the present invention, if the flip-flop circuit 14 is reset by inputting a command such as cancel, or the power is turned off, it can be used by other people (persons who do not know the PIN number). ), the data on the memory card 1 will not be used. In addition, for commands such as cancellation, "O" is added to the above I/O address.
It has a processing function to write.

In other words, if another person tries to use the data on the memory card 1, the flip-flop circuit 14 will be reset by the above command, or by turning on the power, so the person will have to enter the PIN again. Because you have to.

In this way, the data protection device of the memory card is provided with an EEPROMIO that stores a user's unique password, and when the data of the loaded memory card 1 is used, the password stored in the EEPROMIO is input. Only a person who knows the password can read and use the data on the memory card 1, and the confidentiality of the data can be maintained.

[Effects of the Invention] As explained above, according to the present invention, in a memory card reading device that is connected to an address bus, a data bus, etc. of a CPU, and is capable of writing and reading data via the data bus, the above-mentioned features are provided. a storage means for storing a number unique to the user of the memory card; an input means for inputting the number of the user when reading data from the memory card; and data of the input number by the input means and the storage means. a control means that compares the data with the stored data, writes data corresponding to the comparison result to a predetermined I/O address, and makes it possible to read data from the memory card; A flip-flop circuit that sets the comparison result and resets it by turning on the power of the device or a predetermined command, and an I/O that decodes the predetermined I/O address and outputs a set signal for the flip-flop circuit. The decoder and the chip select (C
E) A three-state buffer circuit that outputs a signal to the memory card as an output signal of the flip-flop circuit, and when matching data is obtained as a result of the comparison, the three-state buffer circuit is in an output ready state. and when inconsistent data is obtained as a result of the comparison.

Since the output of the three-stay buffer circuit is set to a floating state, it is possible to do so without entering the PIN number, and
If you do not enter the same PIN as the PIN stored in the EEPROM, that is, only those who know the PIN can read and use the data on the memory card. This has the effect of protecting data from being used by others.

[Brief explanation of drawings]

FIG. 1 is a schematic partial block diagram of a data protection device for a memory card showing an embodiment of the present invention, and FIG. 2 is a schematic block diagram of a device showing data reading from a conventional memory card. In the figure, 1 is a memory card, 2 and 12 are CPUs (data reading device control means), 3 is an address bus, 4 is a data bus, 5 and 8 are control lines, 9 is a three-state buffer circuit, and /O 1 is an EEPROM (storage means), 11 is an input device, 13 is an engineering/○ decoder, and 14 is a flip-flop circuit. Patent applicant: Fujitsu General Co., Ltd. Agent: Patent attorney: Takuya Ohara

Claims (2)

[Claims] (1) In a memory card reading device connected to an address bus, a data bus, etc. of a CPU and capable of writing and reading data via the data bus, a storage means for storing a number unique to the user of the memory card. and, when reading data from the memory card, an input means for inputting the user's number, and comparing data of the number input by the input means with data stored in the storage means, and storing the comparison result. Specified I/O of data according to
a control means that writes to an address and enables reading of data from the memory card; and a flip controller that sets the comparison result when writing the comparison result and resets it by turning on the power of the device or by a predetermined command, etc. a flop circuit; and a flop circuit that decodes the predetermined I/O address and outputs the flip circuit.
an I/O decoder that outputs a set signal for the flop circuit; and a chip enable (CE) signal from the CPU that enables the memory card to write and read data to the memory card using the output signal of the flip-flop circuit. and a three-state buffer circuit for outputting data to the memory card, the memory card being capable of reading data from the memory card only when data of a number stored in the storage means is input from the input means. data protection equipment. (2) Claim (1) wherein the storage means is an EEPROM.
Memory card data protection device described.