JPH0457108B2 - - Google Patents

Info

Publication number
JPH0457108B2
JPH0457108B2 JP59247608A JP24760884A JPH0457108B2 JP H0457108 B2 JPH0457108 B2 JP H0457108B2 JP 59247608 A JP59247608 A JP 59247608A JP 24760884 A JP24760884 A JP 24760884A JP H0457108 B2 JPH0457108 B2 JP H0457108B2
Authority
JP
Japan
Prior art keywords
chip
film
layer
chips
insulating film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59247608A
Other languages
English (en)
Japanese (ja)
Other versions
JPS61129835A (ja
Inventor
Satoru Tanizawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59247608A priority Critical patent/JPS61129835A/ja
Publication of JPS61129835A publication Critical patent/JPS61129835A/ja
Publication of JPH0457108B2 publication Critical patent/JPH0457108B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/093—Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07236—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/701—Tape-automated bond [TAB] connectors

Landscapes

  • Wire Bonding (AREA)
JP59247608A 1984-11-22 1984-11-22 半導体装置 Granted JPS61129835A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59247608A JPS61129835A (ja) 1984-11-22 1984-11-22 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59247608A JPS61129835A (ja) 1984-11-22 1984-11-22 半導体装置

Publications (2)

Publication Number Publication Date
JPS61129835A JPS61129835A (ja) 1986-06-17
JPH0457108B2 true JPH0457108B2 (fr) 1992-09-10

Family

ID=17166034

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59247608A Granted JPS61129835A (ja) 1984-11-22 1984-11-22 半導体装置

Country Status (1)

Country Link
JP (1) JPS61129835A (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2817553B2 (ja) * 1992-10-30 1998-10-30 日本電気株式会社 半導体パッケージ構造及びその製造方法
DE102010039824B4 (de) * 2010-08-26 2018-03-29 Semikron Elektronik Gmbh & Co. Kg Leistungsbaugruppe mit einer flexiblen Verbindungseinrichtung

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5146874A (en) * 1974-10-18 1976-04-21 Mitsubishi Electric Corp Handotaisochino seizohoho
JPS62320Y2 (fr) * 1980-07-31 1987-01-07
JPS5734777A (en) * 1980-08-08 1982-02-25 Mitsubishi Electric Corp Inverter device
JPS59205747A (ja) * 1983-05-09 1984-11-21 Matsushita Electric Ind Co Ltd 半導体装置の製造方法

Also Published As

Publication number Publication date
JPS61129835A (ja) 1986-06-17

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees