JPH0458310A - Detection method of waiting state of microprocessor and personal computer - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to reducing the power consumption of laptop computers and the like, and more specifically, to detecting the waiting state of a microprocessor in a personal computer. , in an attempt to reduce power consumption by lowering the microprocessor's clock frequency when in the wait state.

[Prior Art 1] Recently, laptop computers, especially very small, thin, and light laptop computers called notebook or book type, have rapidly become popular. All of these can be operated on batteries, and size, weight, and battery life are very important factors for laptop computers.

Under these circumstances, computer manufacturers have been working on reducing the power consumption of their devices in order to extend the battery operating time as much as possible.Standby mode is currently widely used as a method to reduce the power consumption of devices. For example, when the microprocessor is waiting for a key input from the keyboard,
If there is no key power for a certain period of time (for example, 3 minutes), the microprocessor determines that the operator is temporarily suspending key power, and the microprocessor simply applies key power until the operator resumes key power. All you have to do is wait.
Therefore, at this time, the computer is set to a mode called standby mode, which does not consume much power. In standby mode, the clock frequency of the microprocessor is lowered, or the clock of the microprocessor is stopped in some cases. It also turns off the backlight of the LCD display and stops the hard disk drive motor. In this way, the power consumption of the device is reduced in standby mode.

Specific techniques for reducing power consumption in standby mode (such as techniques for lowering the clock frequency of the microprocessor, turning off the backlight of the liquid crystal display, and stopping the motor of the hard disk) are hardly mentioned in this specification. The present invention relates to a method for detecting the waiting state of a microprocessor to enter standby mode.

Taking input from a keyboard as an example, we will clarify the differences between the conventional method and the method of the present invention. FIG. 3 shows a general key manual processing method in the form of a flowchart, which is widely used in desktop computers. This means that the microprocessor will wait forever until the key human power is available, and when the key human power is available, it will process the key human power.If the key human power is not available for several hours, the microprocessor will simply wait. , for devices such as desktop computers where you don't have to worry much about power consumption,
There is no problem with this method, but it becomes very problematic in the case of battery-powered laptop computers.1 For example, in a laptop computer, if the operator who is using the key manually interrupts some of the key manual operations, Until the laptop is restarted, the laptop only has key power, doing no useful work during that time, and still consuming power on a normal basis. Detects key manual standby states (relatively long waiting states, such as interruptions in key manual work by operators), and reduces power consumption as much as possible since the equipment is not performing any useful work in such states. The idea of keeping things low was born. This mode in which power consumption is kept low is generally called a power save mode or standby mode. In this specification, this mode will be referred to as standby mode. In standby mode, the microprocessor is not doing any useful work, so there is no problem in lowering or even stopping the clock of the microprocessor, thereby reducing power consumption. In addition, in standby mode, no display is required and the hard disk drive is not used, so power consumption is reduced by turning off the backlight of the liquid crystal display and stopping the hard disk drive motor.

Figure 2 shows in the form of a flowchart the key manual processing method for laptop computers that incorporates the idea of standby mode, which has been explained above, and this method has been the most widely used so far (see Figure 2). The figure is representative of conventional technology). FIG. 2 will be briefly explained. Within 3 minutes after starting to wait for key personnel (these 3
There is no particular limitation on the time (minutes), but if it is too short, it is usually very difficult to use). Processing is performed. but,
If there is no key power for more than 3 minutes, the device will be set to standby mode. (Individual processing for reducing power consumption in standby mode will not be discussed.) In standby mode, the power consumption of devices is kept low. If there is key power in standby mode, first cancel standby mode, then process the key power.It detects the key power waiting state (state without key power for more than 3 minutes) as shown in 0 or more, and enters standby mode. By setting this, we were able to reduce the power consumption of the equipment.

[Problems to be Solved by the Invention] The conventional method shown in FIG. 2 has several drawbacks. Let's sort this out first.

The first point is that the program related to keyboard input must be changed.

FIG. 3 shows the basic key manual processing, and in order to create the flow as shown in FIG. 2, it is necessary to change the program.

The second point is that if an application program (such as a word processing software) were to perform key manual processing directly by itself, in other words it would If you were directly accessing the keyboard interface hardware yourself, the computer manufacturer may have to update the BIOS related to the key manually.
Even if it is configured as shown in the flowchart shown in the figure, it does not go into standby mode.

The third point is that the corresponding program must be changed for each input/output device. FIG. 2 shows only the part related to the keyboard, and it is necessary to create a flowchart as shown in FIG. 2 and change the program for each input/output device, such as a mouse, printer, modem, etc.

The fourth fish takes a long time to enter standby mode.
(3 minutes in the case of FIG. 2), the power consumption during that time cannot be saved.

[Means for Solving the Problems 1] A means for solving the problems of the above-mentioned conventional techniques is to use hardware for detecting wait states.

(Previously, this was done using software.) This method places a small cache memory between the microprocessor and main memory, and when the cache memory is hit, the microprocessor is determined to be in a waiting state. The wait state detection method of the present invention is not limited to keyboard input, but is a wait state detection method for general input/output devices.

Hereinafter, the present invention will be explained in detail according to examples.

[Embodiment] FIG. 1 shows an embodiment of a personal computer according to the present invention. 1 is a microprocessor, and 2 is a main memory in which instruction codes for the microprocessor 1 are stored. 3 is a cache memory, and the cache memory capacity is 64 bytes. Cache memory No. 3 also includes all control circuits. The cache memory 3 can be partially disabled, and the effective cache memory capacity can be freely changed from 0 bytes to 64 bytes.

The cache method is a direct mapping method.

(Cache methods include direct mapping method, 2
There are a factory set associative method, an N-way set associative method, a full set associative method, etc., but a description of each method will be omitted. This is well known to those involved in cache technology. )5 is a hit signal of cache memo 'J3, indicating that the cache memory is hit. 4 is a clock switching circuit, and 6 is a microprocessor clock signal. When the HIT signal 5 indicates a hit in the cache memory, the clock switching circuit 4 lowers the frequency of the clock signal 60 of the microprocessor (for example, to IMHz), and when it does not indicate a hit, that is, in the case of a miss, the clock switching circuit 4 lowers the frequency of the clock signal 60 of the microprocessor. Increase the frequency of 6 (e.g. 12M
Hz). It can be seen that the clock during normal operation is 12 MHz, and when the cache memory 3 is hit, the clock is dropped to IMHz. The cache memory 3 is composed of SRAM (static RAM), and the main memory 2 is composed of DRAM (dynamic RAM). Now that the configuration has been explained above, the operation of FIG. 1 will be briefly explained. Microprocessor (MP)
When the computer (denoted as U) 1 attempts to read an instruction or data from the main memory, it is first checked to see if the same data exists in the cache memory 3. If there is an instruction or data to be read in the cache memory 3, it is said that the cache memory has been hit, and the MPUI will read the instruction or data from the cache memory 3 and will not access the main memory 2. . At this time,
The hit signal 5 becomes high level, and the clock switching circuit 4 (indicating that it is a hit) changes the MPU clock signal 6.
lower to IMHz. If there is no instruction or data to be read in the cache memory 3, it is said that a cache memory miss has occurred, and the MPUI reads the instruction or data from the main memory 2. At this time, the contents of the cache memory 3 are also updated at the same time. (MP
Instructions or data read from the main memory 2 by the UI are simultaneously written to the cache memory 3. ) At this time, the hit signal 5 becomes low level (indicating a miss), and the clock switching circuit 4 sets the clock signal 6 of MPtJ to 12 MHz.

The operation of Fig. 1 has been explained above, but next we will explain the relationship between Fig. 1 and the wait state detection method. In Fig. 1, the wait state is detected by hardware. , we will analyze the most basic key human processing flow shown in Figure 3 and develop it in a form that is easy to understand at the hardware level. The key part in Figure 3 that is waiting for human power (A in Figure 3)
There are two main ways to achieve this. One is to use interrupts, and the other is to loop while checking the status. First, let's consider how to use interrupts. When using interrupts, first enable key-powered interrupts, then the program itself loops and waits for an interrupt, and when an interrupt occurs, it branches to the interrupt handling routine (processing for key-powered tasks). A simple flowchart using an interrupt is shown in FIG. 4(a), and a flowchart of a method of looping while checking the stator of the primary key manually is shown in FIG. 4(b).

What the two methods shown in Figure 4 have in common is that the program loops in the wait state, and this method attempts to detect the wait state by detecting this program loop using hardware. This is the key point of the present invention.

The portion A1 in FIG. 4(a) and the portion A2 in FIG. 4(b) are looped portions. The actual program will likely include a few more processes (instructions) other than those shown here, but in any case, a small loop (6
It is characterized by being 4 bytes or less). In the embodiment shown in FIG. 1, this loop is detected by a small capacity (64 bytes) direct mapping type cache memory 3. A1 in Figure 4(a) and A in Figure 4(b)
2 are loops of 64 bytes or less, so when this loop goes around -, all the instructions in the loop are stored in the cache memory 3 in Figure 1, and the second loop After that, the cache memory is hit. The hit in the cache memory continues until the loop is exited. That is, when the cache memory 3 in FIG. 1 is hit (when the hit signal 5 is at a high level), it can be determined that the microprocessor 1 is in a waiting state and in a loop. At this time (when it is hit) in FIG. 1, the clock 6 of the microprocessor 1 is lowered to reduce power consumption.

However, one caution is necessary here. The question is whether the cache memory 3 in FIG. 1 will be hit even when the microprocessor is not in a wait state. In order to prevent this, it is preferable to make the memory capacity of the cache memory 3 as small as possible. A program that performs repeated processing takes the form of a loop, and in this case,
Since instructions for processing are entered into the loop, the loop is considerably longer than the waiting loop shown in FIG. The memory capacity of the cache memory 3 in FIG. 1 is variable, and by adjusting it, it is possible to separate the loop for repeated processing and the loop for waiting. In other words, the memory capacity of the cache memory should be set smaller than the loop for repeated processing and longer than the loop for waiting. In this way, the cache memory 3 will be hit when the loop is in the waiting state, but it will not be hit when the program performs repeated processing.

The above is a detailed explanation of the present invention, and finally, the cache memory 3 shown in FIG. 1 will be mentioned. The cache memory 3 in FIG. 1 is completely different from how a normal cache memory is used. Normally, a cache memory is used to increase the speed of a personal computer and to increase the hit rate as much as possible. Therefore, we try to increase the memory capacity as much as possible. On the other hand, the cache memory 3 in the present invention is used to reduce the power consumption of the personal computer, and is designed to avoid being hit as much as possible except when the computer is looping in a waiting state. (Preferably, there should be no hits, except for loops in the waiting state.) Therefore, the memory capacity is also quite small.

[Advantageous Effects of the Invention 1] According to the present invention, all of the four drawbacks of the prior art mentioned in the section on problems of the prior art can be solved.

That is, (1) Since the wait state is detected by hardware, there is no need to change the program related to key manual operation.

(2) Even if an application program is directly processing keys manually, the wait state is detected by the hardware, so standby mode can be set only by the hardware, so all application programs must be set to standby mode. guaranteed to become.

(3) The embodiment shown in FIG. 1 is valid for each input/output device. That is, in the embodiment shown in FIG. 1, it is possible to detect not only the waiting state of a key but also the waiting state of other IO devices without making any particular distinction.

(4) This is done using wait state detection hardware, so
Standby mode can be set immediately. Also, when entering the wait state, the cache memory continues to be hit, so during this time the microprocessor only accesses the cache memory and does not access the main memory.

Normally, the main memory is a RAM with very high power consumption, whereas the cache memory is a SRAM with low power consumption, so the power consumption of the cache memory when it is hit, that is, in a waiting state, is quite small.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an embodiment of a personal computer according to the present invention. FIG. 2 is a flowchart showing a conventional method (waiting state detection method). FIG. 3 is a basic flowchart of key manual processing. Figure 4(a) (
b) is a diagram analyzing key manual processing.・Microprocessor ・Main memory ・Cache memory ・Clock switching circuit ・Hit signal ・Microprocessor clock signal Figure 4 (a) Figure 4 (b)

Claims (6)

[Claims] (1) In a personal computer consisting of A, a microprocessor, B, a main memory that stores instructions executed by the microprocessor, and C, a small-capacity cache memory for the main memory, a hit signal is output to the cache memory. A method for detecting a wait state of a microprocessor, characterized in that the microprocessor is determined to be in a wait state when the hit signal indicates a cache memory hit. (2) The microprocessor according to claim 1, wherein the capacity of the cache memory is 64 bytes or less, and the effective cache memory capacity can be made variable by disabling a part of the cache memory. How to detect wait state. (3) The method for detecting a waiting state of a microprocessor according to claim 1, wherein the cache memory is a direct mapping cache memory. (4) A, a microprocessor; B, a main memory that stores instructions executed by the microprocessor; C, a small-capacity cache memory for the main memory; and D, a clock that switches the frequency of the clock signal for the microprocessor. a switching circuit, wherein the cache memory has a hit signal output, and when the hit signal indicates a hit in the cache memory, the clock switching circuit lowers the frequency of the clock signal of the microprocessor. A personal computer characterized in that, when the hit signal indicates a cache memory miss, the clock switching circuit increases the frequency of the clock of the microprocessor. (5) The personal computer according to claim 4, wherein the capacity of the cache memory is 64 bytes or less, and the effective cache memory capacity can be made variable by disabling a part of the cache memory. . (6) The personal computer according to claim 4, wherein the cache memory is a direct mapping cache memory.