JPH0463173U - - Google Patents
Info
- Publication number
- JPH0463173U JPH0463173U JP10500490U JP10500490U JPH0463173U JP H0463173 U JPH0463173 U JP H0463173U JP 10500490 U JP10500490 U JP 10500490U JP 10500490 U JP10500490 U JP 10500490U JP H0463173 U JPH0463173 U JP H0463173U
- Authority
- JP
- Japan
- Prior art keywords
- board
- cable
- spacer
- boards
- sides
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 125000006850 spacer group Chemical group 0.000 claims description 11
- 238000000034 method Methods 0.000 claims description 3
- 238000005476 soldering Methods 0.000 claims description 3
- 229910000679 solder Inorganic materials 0.000 claims 3
- 239000003990 capacitor Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 8
- 239000000758 substrate Substances 0.000 description 1
Landscapes
- Multi-Conductor Connections (AREA)
- Combinations Of Printed Boards (AREA)
Description
第1図、第2図、第3図はこの考案の一実施例
を示す図であり、第1図はスペーサの形状図、第
2図は基板へのスペーサ取付図、第3図は複数基
板の総組立図、第4図、第5図、第6図は従来の
基板組立の方法を示す図であり、第4図aは基板
組立の上面視図、第4図bは基板組立の側面視図
、第5図aは基板収納方法を示す図、第5図bは
基板の収納形態を示す図、第6図はハンダ付けの
例を示す図である。
1a,1b,1c…は基板、2a,2b,2c
…はスルーホール、3a,3b,3c…はケーブ
ル、5a,5b…はスペーサ、6a,6b…はケ
ーブル通し穴、7a,7b…は表面パターンであ
る。なお、図中、同一符号は同一、又は相当部分
を示す。
Figures 1, 2, and 3 are diagrams showing an embodiment of this invention. Figure 1 is a diagram of the shape of a spacer, Figure 2 is a diagram of mounting a spacer on a board, and Figure 3 is a diagram of a plurality of boards. 4, 5, and 6 are diagrams showing the conventional board assembly method, and FIG. 4a is a top view of the board assembly, and FIG. 4b is a side view of the board assembly. FIG. 5a is a diagram showing a board storage method, FIG. 5b is a diagram showing a board storage form, and FIG. 6 is a diagram showing an example of soldering. 1a, 1b, 1c... are substrates, 2a, 2b, 2c
... are through holes, 3a, 3b, 3c... are cables, 5a, 5b... are spacers, 6a, 6b... are cable through holes, and 7a, 7b... are surface patterns. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.
Claims (1)
を実装し、一つの辺を第一辺、これと直角に位置
する二つの辺を第二辺及び第四辺、第一辺と並行
に相対する方向に位置する辺を第三辺とし、第一
辺と第三辺の縁に配置される基板間スペーサの幅
分の距離をあけた位置に各基板間接続ケーブルを
ハンダ付けする表面パターンを配置した複数の基
板、基板の第一辺と第三辺の縁に配置され基板間
を接続するケーブルを基板面に並行に貫通させる
ケーブル通し穴を設けたスペーサ、基板間を接続
するケーブルから構成され、各基板の第一辺と第
三辺の各縁にケーブル通し穴が基板に並行になる
ようにスペーサを実装した後、基板の同一番号の
辺が同一方向を向くように複数の基板を積み重ね
て第一の基板、第二の基板として番号を付し、第
一の基板の第三辺のスペーサの内側に位置するハ
ンダ付け用表面パターンにケーブルをハンダ付け
し、次いでこのケーブルを同基板の同スペーサの
ケーブル通し穴に貫通させ、さらにこのケーブル
を第二の基板の第三辺に配置されたスペーサのケ
ーブル通し穴に同基板の縁側より貫通させ、最後
に同基板の同スペーサ内側のハンダ付け用表面パ
ターンに同ケーブルをハンダ付けして固定し、次
に第二の基板の第一辺と第三の基板の第一辺を、
次に第三の基板の第三辺と第四の基板の第三辺を
の順に交互に基板間をケーブル通し穴を設けたス
ペーサを用いて直接に接続できるように構成した
ことを特徴とする基板組立方法。 Multiple electrical components such as ICs, resistors, and capacitors are mounted, one side is the first side, the two sides perpendicular to this are the second and fourth sides, and the direction facing parallel to the first side. The side located at is the third side, and the surface pattern to which each board-to-board connection cable is soldered is placed at a distance equal to the width of the board-to-board spacer placed at the edge of the first and third sides. It consists of a plurality of boards, a spacer that is arranged on the edges of the first and third sides of the boards and has a cable passage hole that allows the cables that connect the boards to pass through in parallel to the board surface, and the cable that connects the boards. After mounting spacers on each edge of the first and third sides of each board so that the cable passage holes are parallel to the board, stack multiple boards so that the sides with the same number face the same direction. Number the first board and second board, solder the cable to the soldering surface pattern located inside the spacer on the third side of the first board, and then connect the cable to the same soldering surface pattern on the third side of the first board. Pass the cable through the spacer's cable passage hole, then pass this cable through the spacer's cable passage hole placed on the third side of the second board from the edge of the same board, and finally solder the inside of the spacer on the second board. Solder and fix the same cable to the surface pattern, then connect the first side of the second board and the first side of the third board,
Next, the third side of the third board and the third side of the fourth board are alternately connected in this order using spacers having cable passage holes between the boards so that they can be directly connected. Board assembly method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10500490U JPH0463173U (en) | 1990-10-05 | 1990-10-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10500490U JPH0463173U (en) | 1990-10-05 | 1990-10-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0463173U true JPH0463173U (en) | 1992-05-29 |
Family
ID=31850509
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10500490U Pending JPH0463173U (en) | 1990-10-05 | 1990-10-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0463173U (en) |
-
1990
- 1990-10-05 JP JP10500490U patent/JPH0463173U/ja active Pending
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