JPH0467793B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a Hall element using a compound semiconductor material, and particularly to a Hall element with high output and good temperature characteristics.

(b) Conventional technology A Hall element is a magnetoelectric conversion element that converts magnetism into an electric signal, that is, a type of magnetic sensor.
It is used in a wide range of fields, such as controlling the rotation of brushless motors in VTRs, floppy disc devices, etc.

The conventional Hall element is shown in Sensor Technology (September 1985 issue, Vo1.5.No.10), pages 68 to 71 (Figure 5).
A semi-insulating GaAs substrate 2, as detailed in
and an N ⁺ type contact region 3 formed by ion-implanting silicon ions Si ⁺ into the GaAs substrate 2; and implanting silicon ions Si ⁺ into the GaAs substrate 2 so as to overlap with the contact region 3. It was composed of an N-type active region 4 formed by this method, and an electrode 7 in ohmic contact with the contact region 3.

On the other hand, the Hall element with the above-mentioned structure is
It is also described in detail in Publication No. 228783.

(c) Problems to be Solved by the Invention In general, -V group compound semiconductors such as GaAs and InSb are used as materials for Hall elements. GaAs
Although the Hall element using the above has excellent temperature characteristics, the output voltage is inferior. On the other hand, Hall elements using InSb have relatively high output, but have poor temperature characteristics.

As mentioned above, each has advantages and disadvantages, so
There is a problem that there is no element that has both of these characteristics, and the present invention provides a Hall element that solves this problem.

(d) Means for Solving the Problems The present invention has been made in view of the above-mentioned problems, and includes a Hall element using a compound semiconductor material, at least a substrate 2 made of the compound semiconductor material, and a substrate 2 made of the compound semiconductor material. This problem is solved by providing an active region 4 of one conductivity type that is deeply implanted with a low impurity concentration, and a ferromagnetic material 8 bonded to the substrate 2.

(E) Effect It is generally well known that the Hall output voltage V _H can be increased by increasing the electron mobility μ.

However, as shown in FIG. 2, although the mobility μ can be controlled by the impurity concentration, if the impurity concentration is decreased in an attempt to increase the mobility μ, the sheet resistance of the active region 4 increases.

However, experiments have shown that when implanting silicon ions, for example, into a compound semiconductor, as shown in Figures 3 and 4, if the dose is lowered and the ion implantation depth is increased, electron transfer occurs while suppressing the increase in sheet resistance. It was found that the temperature was increasing. Here, FIG. 3 is a schematic diagram illustrating a conventional impurity implantation state and an impurity implantation state of the present invention, and FIG. 4 is a schematic diagram illustrating ion implantation energy and mobility.

Therefore, the Hall output voltage V _H of the Hall element can be increased.

Furthermore, by bonding ferrite 8, which is a ferromagnetic material, the magnetic flux density applied to the Hall element part can be reduced to 1.4~
2.2x (at1KG: Magnification varies slightly depending on structure.)
was able to increase.

(F) Embodiment An embodiment of the Hall element 1 of the present invention will be described below with reference to FIG.

First, a semi-insulating substrate 2 and an N ⁺ type contact region 3 formed in the substrate 2 by ion implantation.
There is.

Here, a non-doped silicon oxide film with a thickness of approximately 5000 Å is coated on the substrate 2 by the CVD method, and a photoresist film is further coated. After that, the silicon oxide film and the photoresist film are opened in a region corresponding to the contact region 3 by etching, and then implanted. energy
Silicon ions (Si ^{+ )} are implanted through the opening at 150 KeV and a dose of 1×10 ¹³ cm ^-2 (the silicon oxide film and photoresist film serve as a mask during ion implantation) to form an N ⁺ type contact region. form 3.

Next, overlap with the N ⁺ type contact region 3,
Further, between the contact regions 3, there is an N-type active region 4 formed by ion implantation.

Here, silicon ions are implanted at an implantation energy of 360 KeV and a dose of 4.2×10 ¹² cm ⁻² in the same manner as in the N ⁺ type contact region 3 described above. Furthermore, for defect recovery and carrier recovery, a non-doped silicon oxide film is deposited on both sides of the substrate 2 to a thickness of about 5,000 yen.
After coating, lamp annealing was performed in an infrared heating furnace. As a result, an electron mobility μ=4400 cm ² /V·sec could be obtained.

There is a contact hole 6 of the N ⁺ type contact region 3 formed by etching the silicon oxide film 5 formed on the substrate 2, and an electrode 7 formed by vapor deposition through the contact hole 6. .

Here, the electrode 7 is formed by depositing AuGe, Ni, Ti, and Au to thicknesses of about 1100 Å, 400 Å, 1000 Å, and 3000 Å, respectively. Further, a lift-off method is adopted as a method for forming the electrode 7, and further, in order to alloy the electrode 7, alloying treatment is performed at 400° C. for 1 minute in an infrared heating furnace.

Finally, there is a ferrite 8 which is a ferromagnetic material and is bonded to the lower surface of the substrate 2.

Here, since the substrate 2 has a very thin thickness of 100 μm and is difficult to handle, it is attached to the ferrite 8 in the form of a wafer using an adhesive. Also board 2
Further, ferrite may be attached to the upper surface of the electrode 7, and in this case, it is attached after wire bonding to the electrode 7.

In addition, explanations and drawings of structures such as wire bonding and resin molding, which will be subsequent steps, are omitted here.

The first feature of the present invention is in the N-type active region 4, and in order to increase the Hall output voltage _VH , the implantation energy is, for example, 200 KeV or more.
The purpose is to implant silicon ions at a dose of 4.2×10 ¹² cm ^-2 .

Generally, if the carrier concentration is reduced in an attempt to increase the mobility μ, the sheet resistance of the active region 4 (the sheet resistance is preferably 400 Ω/□ to 600 Ω/□) increases. Therefore, in the present invention, silicon ions are implanted. When doing so, implantation is performed so that the impurity concentration is low and the mobility is high, and instead, the increase in sheet resistance is compensated for by increasing the acceleration voltage (implantation energy). (Here, double charge ion Si ⁺⁺ was used instead of increasing the accelerating voltage.)
Therefore, silicon ions are implanted deeply. Here, in Figure 4, the horizontal axis is the injection energy, and the vertical axis is the mobility μ.
showed that. As can be seen from the figure, a large implantation energy means that the ion implantation depth is deep. Therefore, the carrier mobility μ could be increased by implanting ions deeply.

The second feature of the present invention lies in the ferrite 8, which is a ferromagnetic material. Here, the substrate 2 is bonded to a wrap plate and back-wrapped until the thickness becomes about 100 μm. This 100 μm thick substrate 2 is extremely thin and therefore extremely difficult to work with. For this purpose, after being wrapped, the substrate 2 with the wrap plate is glued onto the ferrite 8, and then the wrap plate is removed.
Therefore, since the ferrite 8 is bonded to the wafer, the strength is increased and subsequent workability is improved.

Furthermore, by using this ferrite 8 as it is, the magnetic flux density applied to the Hall element 1 is 1.4 to 2.2.
Can be increased by 2 times (at1KG: magnification varies depending on structure).

Possible ways to increase the magnetic flux density include the shape of the ferrite, the magnetic permeability and saturation magnetic flux density of the ferrite, and the distance between the semiconductor thin film layer and the ferrite.Here, the thickness of GaAs is 100 μm, and the thickness of the lower ferrite is 200 μm. , the chip size is 350 μm.

As a result, the increase rate with only the lower ferrite is approximately
The increase rate was 1.4 times, and when a 150 μm thick and 150 μm diameter piece was installed on the upper side, an increase rate of about 2.2 times was obtained.

(g) Effects of the invention As is clear from the above explanation, by deeply implanting silicon ions, the electron mobility μ could be increased to 4400 cm ² /V·sec while suppressing the sheet resistance.

In addition, since Ferrite 8 is bonded when it is in the wafer state, workability is very good, and the magnetic flux density is
It was possible to increase it by 1.4 to 2.2 times.

Therefore, due to the above effects, the Hall output V _H can be reduced to 38mV.
~60mV, which is 1.5 to 2.4 times larger than conventional ones, temperature dependence is -0.06%/℃, and magnetic field linearity is 1.8 to 2.04.
We were able to form a Hall element that was unprecedented.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view of the Hall element of the present invention, FIG. 2 is a diagram explaining the relationship between the mobility of GaAs and impurity concentration, and FIG. 3 is a diagram explaining the conventional impurity implantation state and the impurity implantation state of the present invention. Figure 4 is a diagram showing the relationship between ion implantation energy and mobility, Figure 5 is a schematic diagram showing the relationship between ion implantation energy and mobility.
The figure is a cross-sectional view of a conventional Hall element. 1 is a Hall element, 2 is a substrate, 3 is a contact region, 4 is an active region, 5 is a silicon oxide film, 6 is a contact hole, 7 is an electrode, and 8 is a ferrite.

Claims (1)

[Claims] 1. A Hall element in which an active region of one conductivity type on a substrate using GaAs and a highly doped contact region of one conductivity type provided at the end of this active region are formed by ion implantation. In the manufacturing method, the active region has increased mobility by lowering the dose to achieve a low impurity concentration, and the increase in sheet resistance caused by the active region with the low impurity concentration is compensated for by increasing the acceleration voltage or by increasing the A method for manufacturing a Hall element characterized by correction by deeply implanting impurities using charge ions.