JPH0471220B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a runaway detection circuit that detects runaway of a microprocessor (MPU) and automatically resets it.

[Conventional technology]

When an MPU is affected by external noise, input erroneous signals, power supply voltage fluctuations, etc., the program may run out of control and not terminate normally. In this case, it is necessary to reset the MPU, and for this purpose it is common to provide an external runaway detection circuit.

FIG. 5 is an example of this, and FIG. 6 is an operational waveform diagram thereof. This runaway detection circuit is called a pumping method, and the signal a output from the specific input/output port I/O of the MPU is integrated by time constant circuits (integrator circuits) R and C, and the output b is sent to the window comparator.
Enter CMP ₁ . This comparator CMP ₁ has the level of input b as the reference value ref1, ref for the top and bottom of the window.
2, the output c is set to H (high) and the switch SW ₁ is turned on. Otherwise, the output c is set to L (low) and the switch SW ₁ is turned off.
This switch _SW1 is for instantaneous charging of the capacitor Ce, and when turned on, the capacitor Ce is instantly charged to the polarity shown, and the negative side d becomes the lowest level (ground in this case). On the other hand, during the period when the switch _SW1 is off, the battery is slowly discharged or charged via the changeover switch _SW2 . Since discharging is performed by the constant current source _I1 and charging is performed by the constant current source _I2 , both have a time constant. The switch SW ₂ is switched by the output e of the hysteresis type comparator CMP ₂ . This comparator CMP ₂ divides the output e by the resistors R ₁ to R ₃ and uses it as a reference voltage, so when the output e is H, the reference voltage rises to ref3, and when it is L, it rises to ref4 (<ref3). descend. When output e is H, switch SW ₂ is connected to current source I ₁
Switch to the _I2 side when it is L. Furthermore, the falling edge of the output e serves as a reset signal for the MPU, and the rising edge thereof serves as a start signal.

Therefore, when the MPU goes out of control and there is no change in the I/O output a as shown in the left half of Figure 6, the output c of the comparator CMP ₁ is fixed at H, so the switch SW ₁ remains off. , during this time the capacitor
The negative side d of Ce is the reference voltage ref of comparator CMP ₂
3. Since charging and discharging is performed with ref4 as the upper and lower limits, a fall and a rise appear at least once in the output e of the comparator CMP ₂ . This resets the MPU, and when it restarts and starts changing the I/O output a, the switch SW ₁ turns on, but until then, the output e of the comparator CMP ₂ , which is not associated with the charging and discharging of the capacitor Ce, is a pulse. change in shape.

Eventually, when the MPU returns to normal and the I/O output a begins to change regularly, the output c of the comparator CMP ₁ also begins to change, so the switch SW ₁ is repeatedly turned on intermittently to rapidly charge the capacitor Ce. Therefore, the negative side d of the capacitor Ce cannot rise to ref3 during the limited off period of the switch _SW1 , so the comparator _CMP2 keeps the output e at H.

[Problem that the invention seeks to solve]

By the way, the above-mentioned runaway detection circuit employs a logic that determines that the MPU is normal if the frequency of the I/O output a is above a certain value, and therefore has the following disadvantages. That is, since the integrating circuit RC is provided for the purpose of blunting the change in the input a to such an extent that the output c of the window comparator _CMP1 has a predetermined pulse width, its time constant is small. Therefore, even if the frequency range of the input a is wide, the output b passes through the reference voltages ref1 and ref2 of the comparator _CMP1 . Also, even if the duty of input a changes, output b
changes in roughly the same way, so in the above configuration,
Even if the MPU goes out of control, there is a problem in that it is not possible to reset it if the I/O accidentally generates an output with a frequency or duty different from the normal one. The present invention attempts to improve this point.

[Means for solving problems]

The present invention provides a runaway detection circuit that monitors a specific port to which a pulse train of constant frequency and duty is output when the microprocessor is normal, and automatically resets the microprocessor when a program runs out of control. It is equipped with an integrating circuit that integrates without saturation, and a hysteresis comparator that shapes the waveform of the integrated output using upper and lower reference voltages, and also applies the upper and lower reference voltages of the comparator to the normal output from the specific port. The microcomputer is characterized in that the microcomputer is set so that the integral output falls within a range of change, and when the change in the output of the comparator disappears for a certain period of time, the microcomputer is reset.

[Effect]

During normal operation of the microprocessor (MPI),
A pulse train with constant frequency and duty is output from the specific port. Therefore, if an integrating circuit with a large time constant is used to integrate the specific port output without saturating it, if an output is generated from the port output with a frequency or duty that is different from the normal one, the amplitude or average level of the integrated output will be different from the normal one. It becomes something different. The hysteresis comparator has two reference voltages set within the amplitude of the integrated output during normal operation. Therefore, under normal conditions, the output changes in synchronization with the port output of the MPU, but when the frequency or duty of the port output changes and the integral output no longer applies to either the upper or lower reference voltage, the comparator stops the output change. Therefore, if this stopped state continues for a certain period of time, it is determined that the program has gone out of control, and the MPU is reset.

This will be explained in detail below with reference to illustrated embodiments.

〔Example〕

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and the same parts as in FIG. 5 are given the same reference numerals. The difference between this example and FIG.
The point is that the time constant τ=R'·C' of R' and C' is set larger than in FIG. 5 to prevent the integral output B from being saturated. Figure 2 is an operating waveform diagram during normal operation, assuming that port output A has a period T and a duty of 50%.
For example, the time constant τ is set to T=τ. In this way, when the amplitude of the port output A is Vc.c.-0, the amplitude of the integral output B has a peak of 0.622Vc.c. and a bottom of 0.378Vc.c.

The second difference is that the comparator CMP ₁ ' receiving the integral output B is of a hysteresis type.

ref1 and ref2 are the upper and lower reference voltages, and V
It is set by dividing cc by resistors _R4 to _R6 . In the example in Figure 2, ref1=0.6Vc.c., ref2=0.4V
It is set to cc. Since the intermediate value (average level during normal operation) of the integral output B is 0.5Vc.c., this value is obtained by adding ±0.1Vc.c. to this value. This ref1 and ref
Increasing the difference between 2 will narrow the tolerance, and the MPU will be reset even if a slight frequency shift or duty deviation occurs. This holds true even if the time constant τ is made larger than T.

The operating principle of comparator CMP ₁ ′ is that of CMP ₂ in the subsequent stage.
Similarly, each time input B passes through ref1 and ref2, the level of output C is inverted, and ref1 and ref2 are switched (ref1 when C=H, ref2 when C=L). Integrator circuits R ₇ and C ₁ in the subsequent stage and exclusive OR gate EOR
constitutes a change point detection circuit (in this case, it is a delay differentiator circuit, but a one-shot circuit or the like may also be used), and generates a pulse train D corresponding to a change in the comparator output C. This pulse train D turns on and off the switch _SW1 in the same way as the pulse train C in FIG. The configuration from switch SW ₁ onwards is the same as in Figure 5.

The operation will be explained below. When the MPU is operating normally, the pulse train D is repeatedly generated at a period of T/2 as shown in FIG. 2, so the output of the comparator CMP ₂ (e in FIG. 6) is up to H.
On the other hand, if the duty of the port output A is decreased from 50% to 40% without changing the period T (fluctuation range is 20%), the integral output B changes as shown in FIG. The change in this case is peak in terms of amplitude
0.522Vc.c., bottom 0.286Vc.c., so it's not that big, but the average level has dropped significantly, so the peak of integral output B no longer reaches ref1=0.6Vc.c. Therefore, the output C of the comparator CMP ₁ ' becomes H at ref2.
After being inverted to ref1, it cannot be inverted to L and remains at H. As a result, the differential output D becomes L constant and switch SW ₁ cannot be turned on, so when the output of comparator CMP ₂ is inverted to L, the MPU
will be reset. Contrary to the above, when the duty increases from 50% to 60% (with a variation range of 20%), the average level of the integral output B increases, so it no longer decreases to ref2 and is similarly reset.

On the other hand, even if the duty is constant at 50%, the frequency may increase. For example, when the frequency increases by 20% (T=0.8τ), the amplitude of the integral output B decreases with almost no change in the average level. In the example of FIG. 4, the amplitude is reduced to a peak of 0.599Vc.c. and a bottom of 0.401Vc.c., so it changes between ref1 and ref2. Therefore, the output C of the comparator CMP ₁ ' holds either the H or L value, so the differential output D is also fixed at L, and the MPU is reset.

Note that when the frequency of the port output A decreases (the period T increases), the operating waveform becomes similar to that shown in FIG. 2. However, if the period of the differential output D becomes longer, the comparator _CMP2 can be inverted by charging and discharging the capacitor Ce, so the MPU is reset. Further, when the port output A is fixed at H or L and the integral output B is also fixed at H or L, the output C of the comparator CMP ₁ ' does not change, and the MPU is also reset.

〔Effect of the invention〕

As described above, according to the present invention, even if a specific port produces an output with a frequency or duty different from normal when the MPU runs out of control, this can be detected and a reset can be applied, so that the program runaway can be overlooked. This has the advantage of improving system reliability.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram showing one embodiment of the present invention, Figure 2 is a circuit diagram showing an embodiment of the present invention.
4 are operational waveform diagrams, FIG. 5 is a circuit diagram showing an example of a conventional runaway detection circuit, and FIG. 6 is an operational waveform diagram. In the figure, MPU is a microprocessor, R' and C' are integration circuits, and _CMP1 ' is a hysteresis comparator.

Claims (1)

[Claims] 1. In a runaway detection circuit that monitors a specific port that outputs a pulse train with a constant frequency and duty when the microprocessor is normal, and automatically resets the microprocessor when the program runs out of control, the specific port output is not saturated. and a hysteresis comparator that shapes the waveform of the integrated output using upper and lower reference voltages, and the upper and lower reference voltages of the comparator are used to integrate the integrated output when the specified port is normally output. 1. A runaway detection circuit, characterized in that the microprocessor is reset when the output change of the comparator disappears for a certain period of time by setting the change within a change range.