JPH047873A - Photoelectron integrated circuit - Google Patents

Abstract

PURPOSE:To restrain the propagation of transition from a substrate in a negligible order, and improve the reliability of a light emitting device, by interposing a semiinsulative epitaxial film between a electronic device and a conductive substrate. CONSTITUTION:An Fe doped InP semiinsulative layer 2, an n-InP layer 3 and an n-InGaAs layer 4 are formed in order on a conductive substrate 1 composed of n-InP by epitaxial growth method. An etching part 5 is formed, and the following are formed in order in the etching part 5 by epitaxial growth method; an n-InP clad layer 6, an InGaAsP active layer 7, a p-InP clad layer 8 and an InGaAsP cap layer 9. An electronic device 10 and a light emitting device 11 are arranged in each of the adjacent regions on both sides of the etching part 5, and connected electrically via wirings. Thereby the propagation of transition from the substrate is decreased in a negligible order, and the reliability of a photoelectron integrated circuit is improved.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to improvements in optoelectronic integrated circuits (OE ICs).

``Prior art'' One of the publicly known documents regarding optoelectronic integrated circuits (OEIC) is CLEO°8B/TUESDAY AFTERN.
There is OON/152, and in this document (7) TUV2, N
, 5 UZUKI et al. reported on InP-based photoelectric and optoelectronic integrated circuits.

In the case of such known technology, a MESFET is used as an electronic device of an optoelectronic integrated circuit, but in an electronic device such as an FET, a semi-insulating substrate must be used in order to suppress leakage current to the substrate side.

“Problem to be Solved by the Invention J” The above-mentioned semi-insulating substrate has a lower E P than a conductive substrate.
D [Etch Pit Derccity (cr3)
] is about two to three orders of magnitude higher.

When a substrate with such a high EPD is used in an optoelectronic integrated circuit, the propagation of dislocations from the substrate cannot be ignored, and the reliability of the light emitting device is greatly impaired.

In view of such technical problems, the present invention aims to provide a highly reliable optoelectronic integrated circuit (OE IC).

Means for Solving the RG Problem J In order to achieve the intended purpose, the optoelectronic integrated circuit according to the present invention includes an element group including an electronic device and a light emitting device provided on a conductive substrate, and at least , a semi-insulating layer made of an epitaxial film is interposed between the electronic device and the substrate.

r effect j In the case of the optoelectronic integrated circuit according to the present invention, the EP of the conductive substrate
Because D is low, the propagation of dislocations from the substrate is negligible, and a semi-insulating epitaxial film is interposed between the electronic device and the conductive substrate, or between each element group and the substrate. Therefore, leakage current to the substrate side can also be suppressed.

Therefore, in the case of the present invention, the reliability of the optoelectronic integrated circuit is increased, and a stable long-term lifespan of the optoelectronic integrated circuit can be ensured.

Embodiment J FIGS. 1 to 3 show an optoelectronic integrated circuit according to an embodiment of the present invention in the order of manufacturing steps.

In FIG. 1, a conductive substrate 1 is made of n-InP, and on top of this substrate 1 is an Fe-doped) InP semi-insulating layer 2.
．． An n-InP layer 3 and an H-11GaAsP layer 4 are sequentially formed by epitaxial growth.

In FIG. 2, Fe-doped) InP semi-insulating layer 2, n
- A part of the InP layer 3 and the n-InGaAsP layer 4, including a part of the surface side of the conductive substrate 1, is knee-etched by a dry or wet chemical etching method,
Thus, an etched portion 5 is formed on the conductive substrate 1.

As is well known, the etching in this case is carried out at the etching portion 5.
This is done by masking the other parts.

In FIG. 3, an etched portion 5 on a conductive substrate 1 includes an n-1nP cladding layer B, an InGaAsP active layer 7, a p-1nP cladding layer 8, and a TnGaAsP cladding layer B.
/b layer 9 is sequentially formed by epitaxial growth.

In the above, Fe-doped)InP semi-insulating layer 2. n-I
The portion including the nP layer 3, n-InGaAsP layer 4, etc.
This is an area for installing electronic devices such as FETs,
This region is provided with an Au and/or Au alloy-based source, drain, gate (all known or known), etc. (not shown) to provide a necessary electronic device IO.

In the above, the n-1nP cladding layer 6, InGaAs
P active layer? , p-1nP cladding layer 8, InGaA
The part including the sP cap layer 8 etc. is the LD, LE
This is a region for providing a light emitting device such as D, and a light emitting device 11 such as an LD is provided in this region.

Further, elements such as the electronic device 101 and the light emitting device 11 are electrically connected to each other via wiring such as Au.

4 to 6 show an optoelectronic integrated circuit according to the present invention in the order of manufacturing steps.

In FIG. 4, a conductive substrate 1 is made of n-GaAs, and on top of this substrate 1 is an Fe-doped (InP) semi-insulating layer 2. n-1nP cladding layer 6, InGaAsP active layer 7
, p-1nP cladding layer 8, InGaAsP key? −／
A layer 9 is sequentially formed via an epitaxial growth method.

In FIG. 5, an n-1nP cladding layer 6, an InGaA
sP active layer 7, p-InP cladding layer 8, InCaAs
A part of the P kick layer 3, including a part of the surface side of the Fe-doped InP semi-insulating layer 2, is knee-etched by the chemical etching method described above, thus forming the Fe-doped InP semi-insulating layer. An etched portion 5'' is formed on the portion 2.

In FIG. 6, an n-InP layer 3, an n-InGaAs
P layer 4 is sequentially formed by epitaxial growth.

In the above, each region adjacent to both sides of the etched portion 5' is provided with the above-mentioned electronic device 10 and the above-mentioned light emitting device 11, and the elements such as the electronic device 10 and the light emitting device 11 are connected to each other. Electrically connected via wiring.

The optoelectronic integrated circuit (OE IC) of each of these embodiments is as follows:
It is applied to optoelectronic equipment as a compound semiconductor device that combines electronic and optical functions.

Effects of the Invention J As explained above, in the optoelectronic integrated circuit according to the present invention, in which an electronic device and a light emitting device are provided on a predetermined substrate, at least between the electronic device and the conductive substrate, Since the semi-insulating epitaxial film is interposed, the propagation of dislocations from the substrate can be suppressed to a negligible extent, thereby increasing the reliability of the light emitting device.

[Brief explanation of the drawing]

FIGS. 1 to 3 are explanatory diagrams showing one embodiment of the optoelectronic integrated circuit according to the present invention in the order of its manufacturing process, and FIGS. 4 to 6 are illustrations showing the actual process of the optoelectronic integrated circuit according to the present invention. It is explanatory drawing shown sequentially. 1... Conductive substrate 2... Fe-doped) InP semi-insulating layer 3...
......n-1nP layer 4...n-InGaAsP layer 5...
...Etched part 5' ...Etched part 8...N-1nP cladding layer?・・・・・・
...Ir+GaASP active layer 8...p-
1nP cladding layer 8...InGaAsP cap layer 10...Electronic device 11...Light emitting device

Claims (1)

[Claims] An element group including an electronic device and a light emitting device is provided on a conductive substrate, and at least a semi-insulating layer made of an epitaxial film is interposed between the electronic device and the substrate. Optoelectronic integrated circuit.