JPH047875A - Manufacture of semiconductor element - Google Patents

Manufacture of semiconductor element

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Publication number
JPH047875A
JPH047875A JP10975590A JP10975590A JPH047875A JP H047875 A JPH047875 A JP H047875A JP 10975590 A JP10975590 A JP 10975590A JP 10975590 A JP10975590 A JP 10975590A JP H047875 A JPH047875 A JP H047875A
Authority
JP
Japan
Prior art keywords
oxide film
film
forming
substrate
mask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10975590A
Other languages
Japanese (ja)
Other versions
JP2623907B2 (en
Inventor
Nobuhiko Muto
信彦 武藤
Shinichi Teranishi
信一 寺西
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP2109755A priority Critical patent/JP2623907B2/en
Publication of JPH047875A publication Critical patent/JPH047875A/en
Application granted granted Critical
Publication of JP2623907B2 publication Critical patent/JP2623907B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To prevent a semiconductor substrate from turning to a recessed shape, and prevent the fluctuation of impurity distribution, by selectively thermally oxidizing a polycrystalline semiconductor film on an active region by using a nitride film as a mask. CONSTITUTION:A first oxide film 2, a polycrystalline semiconductor film 3 and a nitride film 4 are grown and laminated on the surface of a substrate 1; the nitride film 4 is selectively eliminated; impurities for channel doping are implanted by using the nitride film 4 as a mask, and a channel region 5 is formed; the polycrystalline silicon film 3 in the active region 5 is thermally oxidized, and a second thick oxide film 6 is formed; the nitride film 4 and the polycrystalline semiconductor film 3 are eliminated; boron is implanted in the substrate 1 of a channel stopper forming region by using the second oxide film 6 as a mask, and a channel stopper 7 is formed; the oxide films 2, 6 on the surface are eliminated; a gate oxide film 8 of the active region is formed by thermal oxidation; an electrode 9 is formed. Thereby the semiconductor substrate is prevented from turning to a recessed shape, and the problem of impurity distribution fluctuation can be evaded.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はMOS型半導体素子の製造方法に関し、特に狭
チャネル効果を抑制するための製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a MOS type semiconductor device, and particularly to a method of manufacturing a MOS type semiconductor device for suppressing narrow channel effects.

r従来の技術〕 高密度の半導体集積回路を実現するにあたり、素子の微
細化に伴って狭チャネル効果と呼ばれる問題が生じる。
rPrior Art] In realizing a high-density semiconductor integrated circuit, a problem called a narrow channel effect arises as elements become finer.

狭チャネル効果は、トランジスタのチャネル幅が狭くな
るにつれ、しきい値電圧■工が上昇する現象である。こ
のため、素子の駆動に必要以上に高い電圧を印加しなけ
ればならない、あるいは充分な電流が流せない等の不都
合がある。
The narrow channel effect is a phenomenon in which the threshold voltage increases as the channel width of a transistor becomes narrower. For this reason, there are disadvantages such as having to apply a voltage higher than necessary to drive the element or not being able to flow a sufficient current.

また、電荷転送素子においては充分な信号電荷が取り扱
えないという不都合がある。
Another disadvantage is that the charge transfer element cannot handle sufficient signal charges.

狭チャネル効果を抑制するための製造方法として、従来
逆LOCO5法と呼ばれる技術が知られている(特願昭
58−2]4545.またはテレビジョン学会技術報告
ED942.1986参照)。
As a manufacturing method for suppressing the narrow channel effect, a technique called the reverse LOCO5 method is conventionally known (see Japanese Patent Application No. 58-2 No. 4545, or Technical Report ED942.1986 of the Television Society of Japan).

第3図Ca)〜(e)は、従来の製造方法である逆LO
CO5法の主要工程におけるMOS型半導体素子の断面
を示す。本例ではP型半導体基板を例としている。
Figure 3 Ca) to (e) show the conventional manufacturing method of reverse LO.
1 shows a cross section of a MOS type semiconductor device in the main steps of the CO5 method. In this example, a P-type semiconductor substrate is used.

逆LOCO5法においては、まず、P型半導体基板lを
熱酸化して酸化膜22を形成した後、窒化膜4を成長さ
せる(第3図(a))。次に、将来活性領域となる領域
の窒化膜4を選択的に除去し、必要に応じて窒化膜をマ
スクとしてチャネルドープ用の不純物を注入する。本例
ではN型のチャネル領域5を形成するためにリンを注入
する(第3図(ロ))。この後、熱酸化を行い酸化膜2
6を形成する(第3図(C))。
In the reverse LOCO5 method, first, a P-type semiconductor substrate l is thermally oxidized to form an oxide film 22, and then a nitride film 4 is grown (FIG. 3(a)). Next, the nitride film 4 in a region that will become an active region in the future is selectively removed, and impurities for channel doping are implanted using the nitride film as a mask if necessary. In this example, phosphorus is implanted to form an N-type channel region 5 (FIG. 3(b)). After that, thermal oxidation is performed to form the oxide film 2.
6 (Fig. 3(C)).

次に窒化膜4を除去し、酸化膜26をマスクとしてボロ
ンを注入し、チャネルストッパ7を形成する(第3図弱
)。その後、表面の酸化膜を除去し、改めて熱酸化を行
い、ゲート酸化膜8を形成した後、電極9を形成して素
子を作成するものである(第3図(e))。
Next, the nitride film 4 is removed, and boron is implanted using the oxide film 26 as a mask to form a channel stopper 7 (see FIG. 3). Thereafter, the oxide film on the surface is removed, thermal oxidation is performed again to form a gate oxide film 8, and then an electrode 9 is formed to produce a device (FIG. 3(e)).

以上説明した逆LOCO5法によれば、第3図(c)に
示すように、窒化膜をマスクとして選択的に熱酸化を行
う際に、酸化が窒化膜端部から窒化膜下に進行するため
に生じるバーズビークは、活性領域からチャネルストッ
パ側へ延びる。このため、第3図り中LAで示した実際
の活性領域の幅は、第3図(ロ)中り、で示した当初フ
ォトマスクによって規定した幅よりも広がるため、バー
ズビークによるチャネル幅の減少を防止でき、素子が微
細化された場合でも狭チャネル効果を軽減できる。
According to the reverse LOCO5 method explained above, as shown in FIG. 3(c), when performing selective thermal oxidation using the nitride film as a mask, oxidation progresses from the edge of the nitride film to the bottom of the nitride film. The bird's beak generated in the channel extends from the active region toward the channel stopper. For this reason, the actual width of the active region indicated by LA in Figure 3 is wider than the width originally defined by the photomask shown in Figure 3 (B), which reduces the channel width due to the bird's beak. This can be prevented and the narrow channel effect can be reduced even when the device is miniaturized.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

ところが、逆LOCOS法においては、第3図(c)に
示すように、将来活性領域となる領域を熱酸化し、チャ
ネルストッパ用ボロン注入のマスクとなりつる程度の酸
化膜26を形成する必要がある。このため、すでにチャ
ネルドープ用不純物が注入されているN型チャネル領域
5が減少し、凹状にくぼんだ形状となる。また、熱酸化
に伴う不純物の酸化膜中への移動により、チャネル領域
5の不純物分布が変動するという問題点が生じていた。
However, in the reverse LOCOS method, as shown in FIG. 3(c), it is necessary to thermally oxidize a region that will become an active region in the future to form an oxide film 26 that is large enough to serve as a mask for boron implantation for a channel stopper. . Therefore, the N-type channel region 5 into which channel doping impurities have already been implanted is reduced, resulting in a concave shape. Further, there has been a problem in that the impurity distribution in the channel region 5 fluctuates due to the movement of impurities into the oxide film due to thermal oxidation.

また、チャネルドープ用の不純物を注入する場合には、
窒化膜をマスクとしているが、実用土成長できる窒化膜
厚に限度があるために、高エネルギーでチャネルドープ
用の不純物を注入できないという欠点があった。
Also, when implanting impurities for channel doping,
Although a nitride film is used as a mask, there is a limit to the thickness of the nitride film that can be grown in practical soil, so there is a drawback that impurities for channel doping cannot be implanted with high energy.

本発明の目的は、このような従来の欠点を除去した半導
体素子の製造方法を提供することにある。
An object of the present invention is to provide a method for manufacturing a semiconductor device that eliminates such conventional drawbacks.

[課題を解決するための手段] 前記目的を達成するため、本発明に係る半導体素子の製
造方法においては、第1の酸化膜形成工程と、多結晶半
導体膜・窒化膜形成工程と、第2の酸化膜形成工程と、
不純物注入工程と、電極形成工程とを含み、一導電型の
半導体基板にチャネルストッパによって区画形成された
活性領域を有する半導体素子の製造方法であって、 前記第1の酸化膜形成工程は、前記半導体基板の表面を
熱酸化することにより、該基板の表面上に第1の酸化膜
を形成する工程であり、前記多結晶半導体膜・窒化膜形
成工程は、前記第1の酸化膜上に多結晶半導体膜および
窒化膜を積層形成する工程であり、 前記第2の酸化膜形成工程は、前記窒化膜が除去された
活性領域内の前記多結晶半導体膜を熱酸化させて基板の
活性領域上に第2の酸化膜を形成する工程であり、 前記不純物注入工程は、前記多結晶半導体膜および窒化
膜が除去された基板のチャネルストッパ形成領域に前記
第2の酸化膜をマスクとして不純物を注入して該チャネ
ル形成領域にチャネルストッパを形成する工程であり、 前記電極形成工程は、前記第1及び第2の酸化膜が除去
された基板の表面に再び熱酸化を行い活性領域のゲート
酸化膜を形成し、かつ電極を形成する工程である。
[Means for Solving the Problem] In order to achieve the above object, the method for manufacturing a semiconductor device according to the present invention includes a first oxide film forming step, a polycrystalline semiconductor film/nitride film forming step, and a second step. oxide film formation step,
A method for manufacturing a semiconductor device having an active region defined by a channel stopper in a semiconductor substrate of one conductivity type, including an impurity implantation step and an electrode formation step, wherein the first oxide film formation step includes the step of forming an electrode. This is a step of forming a first oxide film on the surface of a semiconductor substrate by thermally oxidizing the surface of the substrate, and the step of forming a polycrystalline semiconductor film/nitride film is a step of forming a first oxide film on the surface of the semiconductor substrate by thermally oxidizing the surface of the substrate. The second oxide film forming step is a step of laminating a crystalline semiconductor film and a nitride film, and the second oxide film forming step is to thermally oxidize the polycrystalline semiconductor film in the active region from which the nitride film has been removed to form a layer on the active region of the substrate. The impurity implantation step includes implanting impurities into a channel stopper formation region of the substrate from which the polycrystalline semiconductor film and the nitride film have been removed, using the second oxide film as a mask. and forming a channel stopper in the channel forming region, and in the electrode forming step, thermal oxidation is again performed on the surface of the substrate from which the first and second oxide films have been removed to remove the gate oxide film in the active region. This is the step of forming the electrode and forming the electrode.

また、本発明に係る半導体素子の製造方法においては、
第1の酸化膜形成工程と、多結晶半導体膜・窒化膜・マ
スク酸化膜形成工程と、第1の不純物注入工程と、第2
の酸化膜形成工程と、第2の不純物注入工程と、電極形
成工程とを含み、導電型の半導体基板にチャネルストッ
パによって区画形成された活性領域を有する半導体素子
の製造方法であって、 前記第1の酸化膜形成工程は、前記半導体基板の表面を
熱酸化することにより、該基板の表面上に第1の酸化膜
を形成する工程であり。
Furthermore, in the method for manufacturing a semiconductor device according to the present invention,
A first oxide film formation step, a polycrystalline semiconductor film/nitride film/mask oxide film formation step, a first impurity implantation step, and a second impurity implantation step.
A method for manufacturing a semiconductor element having an active region defined by a channel stopper in a conductive type semiconductor substrate, the method comprising the steps of forming an oxide film, a second impurity implantation step, and an electrode formation step, the method comprising: The first oxide film forming step is a step of forming a first oxide film on the surface of the semiconductor substrate by thermally oxidizing the surface of the substrate.

前記多結晶半導体膜・窒化膜・マスク酸化膜形成工程は
、前記第1の酸化膜上に、多結晶半導体膜、窒化膜およ
びマスク酸化膜を形成する工程であり、 前記第1の不純物注入工程は、前記窒化膜およびマスク
酸化膜をマスクとして、窒化膜およびマスク酸化膜が除
去された活性領域の基板に不純物を注入してチャネル領
域を形成する工程であり、前記第2の酸化膜形成工程は
、チャネルストッパ形成領域のマスク酸化膜を除去した
後、活性領域上の前記多結晶半導体膜を熱酸化させて第
2の酸化膜を形成する工程であり、 前記第2の不純物注入工程は、前記多結晶半導体膜およ
び窒化膜が除去された基板のチャネルストッパ形成領域
に前記第2の酸化膜をマスクとして不純物を注入して該
チャネル形成領域にチャネルストッパを形成する工程で
あり、 前記電極形成工程は、前記第1及び第2の酸化膜が除去
された基板の表面に再び熱酸化を行い活性領域のゲート
酸化膜を形成し、かつ電極を形成する工程である。
The polycrystalline semiconductor film/nitride film/mask oxide film forming step is a step of forming a polycrystalline semiconductor film, a nitride film, and a mask oxide film on the first oxide film, and the first impurity implantation step is a step of forming a channel region by implanting impurities into the substrate in the active region from which the nitride film and mask oxide film have been removed, using the nitride film and mask oxide film as a mask, and the second oxide film forming step is a step of removing a mask oxide film in a channel stopper formation region and then thermally oxidizing the polycrystalline semiconductor film on an active region to form a second oxide film, and the second impurity implantation step is: a step of implanting impurities into a channel stopper formation region of the substrate from which the polycrystalline semiconductor film and the nitride film have been removed, using the second oxide film as a mask, to form a channel stopper in the channel formation region; forming the electrode; The step is to perform thermal oxidation again on the surface of the substrate from which the first and second oxide films have been removed to form a gate oxide film in the active region and to form an electrode.

[作用] 本願の第1の発明によれば、窒化膜をマスクとして活性
領域上の多結晶半導体膜を選択的に熱酸化処理するため
に、活性領域が直接酸化されるわけではない。従って、
半導体基板が凹状にくぼんだ形状とはならず、また不純
物分布が変動するという問題も回避できる。さらに、こ
の熱酸化処理の際に、バーズビークは活性領域からチャ
ネルストッパ側へ延びるため、バーズビークによるチャ
ネル幅の減少を防止でき、素子が微細化された場合でも
狭チャネル効果を軽減できる。
[Operation] According to the first invention of the present application, the active region is not directly oxidized because the polycrystalline semiconductor film on the active region is selectively thermally oxidized using the nitride film as a mask. Therefore,
The semiconductor substrate does not have a concave shape, and the problem of fluctuations in impurity distribution can also be avoided. Furthermore, during this thermal oxidation treatment, the bird's beak extends from the active region toward the channel stopper, so it is possible to prevent the channel width from decreasing due to the bird's beak, and even when the device is miniaturized, the narrow channel effect can be reduced.

本願の第2の発明によれば、窒化膜およびマスク酸化膜
は、チャネルドープ用の不純物を注入する場合のマスク
となるために、窒化膜のみがマスクとなる従来法と比較
して高エネルギーでチャネルドープ用の不純物を注入で
きる7 [実施例] 次に、本発明の実施例について図面を参照して説明する
According to the second invention of the present application, since the nitride film and the mask oxide film serve as masks when implanting impurities for channel doping, the energy is higher than in the conventional method in which only the nitride film is used as a mask. Impurity for channel doping can be implanted 7 [Example] Next, an example of the present invention will be described with reference to the drawings.

(実施例1) 第1図は本発明の実施例1を説明するための図で、MO
S型半導体素子の製造に適用した場合の主要工程におけ
る素子断面を示す。本例ではP型半導体基板を例として
いる。
(Embodiment 1) FIG. 1 is a diagram for explaining Embodiment 1 of the present invention.
A cross section of the device in main steps when applied to manufacturing an S-type semiconductor device is shown. In this example, a P-type semiconductor substrate is used.

図において、本実施例では、まずP型半導体基板1の表
面を熱酸化し、基板1の表面上に第1の酸化膜2を形成
し、第1の酸化膜2上に多結晶半導体膜3および窒化膜
4を積層成長させる(第1図(a))、次に、将来活性
領域となる領域の窒化膜4を選択的に除去し、必要に応
じて、窒化膜4が除去された活性領域の基板1上に、残
りの活性領域外に存在する窒化膜4をマスクとしてチャ
ネルドープ用の不純物を注入してチャネル領域(活性領
域)5を形成する。本例ではN型のチャネル領域5を形
成するためにリンを注入している(第1図(ト))。そ
の後、窒化膜4が除去されて露出した活性領域内の多結
晶半導体膜3を熱酸化させて肉厚の第2の酸化膜6を形
成する(第1図(C))。次に将来チャネルストッパ7
が形成される領域(N型チャネル領域5に隣接するチャ
ネルストッパ形成領域)の窒化膜4および多結晶半導体
膜3を除去し、第2の酸化膜6をマスクとして、チャネ
ルストッパ形成領域の基板1に、ボロンを注入し、チャ
ネルストッパ7をN型チャネル領域5の両側に形成する
(第1図(6))。その後、基板1のN型チャネル領域
5及びチャネルストッパ7上にまたがった表面の酸化膜
2,6を除去し、改めてその表面に熱酸化を行い活性領
域のゲート酸化膜8を形成し、かつ電極9を形成して素
子を作成してゆく (第1図(e))。
In the figure, in this embodiment, the surface of a P-type semiconductor substrate 1 is first thermally oxidized, a first oxide film 2 is formed on the surface of the substrate 1, and a polycrystalline semiconductor film 3 is formed on the first oxide film 2. Then, the nitride film 4 in a region that will become an active region in the future is selectively removed, and if necessary, the active region from which the nitride film 4 is removed is A channel region (active region) 5 is formed on the substrate 1 in the region by implanting impurities for channel doping using the nitride film 4 existing outside the remaining active region as a mask. In this example, phosphorus is implanted to form an N-type channel region 5 (FIG. 1(g)). Thereafter, the polycrystalline semiconductor film 3 in the active region exposed by removing the nitride film 4 is thermally oxidized to form a thick second oxide film 6 (FIG. 1(C)). Next, future channel stopper 7
The nitride film 4 and the polycrystalline semiconductor film 3 in the region where the channel stopper is formed (the channel stopper formation region adjacent to the N-type channel region 5) are removed, and the substrate 1 in the channel stopper formation region is removed using the second oxide film 6 as a mask. Next, boron is implanted to form channel stoppers 7 on both sides of the N-type channel region 5 (FIG. 1(6)). After that, the oxide films 2 and 6 on the surface extending over the N-type channel region 5 and channel stopper 7 of the substrate 1 are removed, and the surface is thermally oxidized again to form a gate oxide film 8 in the active region. 9 to create an element (Fig. 1(e)).

従来の逆LOCO5法と異なり、第1図(c)に示すよ
うに、多結晶半導体膜3を熱酸化させて第2の酸化膜6
を形成する際に、将来活性領域となるチャネル領域5は
、その領域上に多結晶半導体膜3が存在するため、直接
酸化されず、半導体基板1の表面は、第3図(c)に示
す従来例のように凹状にくぼんだ形状とはならず、また
不純物分布が変動するという問題も回避できる。さらに
、この熱酸化の際に・バーズビークによるチャネル幅の
減少を防止でき、素子が微細化された場合でも狭チャネ
ル効果を軽減できる。
Unlike the conventional reverse LOCO5 method, as shown in FIG. 1(c), the polycrystalline semiconductor film 3 is thermally oxidized to form a second oxide film 6.
When forming the channel region 5, which will become an active region in the future, since the polycrystalline semiconductor film 3 exists on that region, it is not directly oxidized, and the surface of the semiconductor substrate 1 is not directly oxidized as shown in FIG. 3(c). Unlike the conventional example, it does not have a concave shape, and the problem of fluctuations in impurity distribution can also be avoided. Furthermore, during this thermal oxidation, reduction in channel width due to bird's beak can be prevented, and narrow channel effects can be reduced even when devices are miniaturized.

(実施例2) 第2図(a)〜(→は、本発明の実施例2を説明するた
めの図で、MOS型半導体素子の製造に適用した場合の
主要工程における素子断面を示す。本例ではP型半導体
基板を例としている。
(Example 2) Figures 2(a) to (→ are diagrams for explaining Example 2 of the present invention, showing device cross sections in main steps when applied to manufacturing a MOS type semiconductor device. In this example, a P-type semiconductor substrate is used.

図において、本実施例では、まずP型半導体基板1の表
面を熱酸化し、基板lの表面に第1の酸化膜2を形成し
、第1の酸化膜2上に多結晶半導体膜3、窒化膜4およ
びマスク酸化膜11を順次積層させる(第2図0))。
In the figure, in this embodiment, first, the surface of a P-type semiconductor substrate 1 is thermally oxidized, a first oxide film 2 is formed on the surface of the substrate l, and a polycrystalline semiconductor film 3 is formed on the first oxide film 2. A nitride film 4 and a mask oxide film 11 are sequentially laminated (FIG. 20)).

次に、将来活性領域となる領域の窒化膜4およびマスク
酸化膜11を選択的に除去し、窒化膜4およびマスク酸
化膜11が除去された活性領域の基板1上に、その活性
領域外に存在する窒化膜4およびマスク酸化膜11をマ
スクとしてチャネルドープ用の不純物を注入してチャネ
ル領域(活性領域)5を形成する。本例ではN型のチャ
ネル領域5を形成するためにリンを注入している(第2
図(ロ))。その後、チャネル領域5の両側に隣接する
チャネルストッパ形成領域上のマスク酸化膜11を除去
し、活性領域上の多結晶半導体膜3を熱酸化させて肉厚
の第2の酸化膜6を形成する(第2図(C))。次にチ
ャネルストッパ形成領域上の窒化膜4および多結晶半導
体膜3を除去し、第2の酸化膜6をマスクとしてボロン
を注入しチャネルストッパ7を形成する(第2図(ハ)
)。その後、基板1の表面の酸化膜2,6を除去し、改
めて基板1の表面の熱酸化を行いゲート酸化膜8を形成
した後、電極9を形成して素子を作成してゆく (第2
図(e))。
Next, the nitride film 4 and mask oxide film 11 in a region that will become an active region in the future are selectively removed, and the nitride film 4 and mask oxide film 11 are placed on the substrate 1 in the active region from which the nitride film 4 and mask oxide film 11 have been removed. A channel region (active region) 5 is formed by implanting impurities for channel doping using the existing nitride film 4 and mask oxide film 11 as masks. In this example, phosphorus is implanted to form an N-type channel region 5 (second
Figure (b)). Thereafter, the mask oxide film 11 on the channel stopper formation region adjacent to both sides of the channel region 5 is removed, and the polycrystalline semiconductor film 3 on the active region is thermally oxidized to form a thick second oxide film 6. (Figure 2 (C)). Next, the nitride film 4 and polycrystalline semiconductor film 3 on the channel stopper formation region are removed, and boron is implanted using the second oxide film 6 as a mask to form the channel stopper 7 (FIG. 2(c)).
). After that, the oxide films 2 and 6 on the surface of the substrate 1 are removed, and the surface of the substrate 1 is thermally oxidized again to form the gate oxide film 8, and then the electrodes 9 are formed to create the device.
Figure (e)).

従来の逆LOCO5法と異なり、第2図(ロ)に示すよ
うに、チャネルドープ用の不純物を注入する場合に、窒
化膜4およびマスク酸化膜1jがマスクとなるために、
高エネルギーでチャネルドープ用の不純物を注入できる
。さらに本実施例においても実施例1と同様に、第2図
(c)に示すように、多結晶半導体膜3を熱酸化させて
第2の酸化膜6を形成する際に、将来活性領域となるチ
ャネル領域5は、直接酸化されないため、半導体基板が
凹状にくぼんだ形状とはならず、また不純物分布が変動
するという問題も回避できる。さらに、この熱酸化の際
に、バーズビークは活性領域からチャネルストッパ側へ
延びるため、バーズビークによるチ・ヤネル幅の減少を
防止でき、素子が微細化された場合でも狭チャネル効果
を軽減できる。
Unlike the conventional reverse LOCO5 method, as shown in FIG. 2(b), when implanting impurities for channel doping, the nitride film 4 and mask oxide film 1j serve as a mask.
Impurities for channel doping can be implanted at high energy. Furthermore, in this example, as in Example 1, when the polycrystalline semiconductor film 3 is thermally oxidized to form the second oxide film 6, as shown in FIG. Since the channel region 5 is not directly oxidized, the semiconductor substrate does not have a concave shape, and the problem of fluctuations in impurity distribution can also be avoided. Furthermore, during this thermal oxidation, the bird's beak extends from the active region to the channel stopper side, so it is possible to prevent the channel width from decreasing due to the bird's beak, and even when the device is miniaturized, the narrow channel effect can be reduced.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、バーズビークによ
るチャネル幅の減少を防止でき、素子が微細化された場
合でも狭チャネル効果を軽減できると同時に、半導体基
板が凹状にくぼんだ形状とはならず、また不純物分布が
変動するという問題も回避できる。さらに、高エネルギ
ーでチャネルドープ用の不純物を注入できるという利点
がある。
As explained above, according to the present invention, it is possible to prevent the channel width from decreasing due to bird's beak, and even when devices are miniaturized, the narrow channel effect can be reduced, and at the same time, the semiconductor substrate does not have a concave shape. , it is also possible to avoid the problem of fluctuations in impurity distribution. A further advantage is that impurities for channel doping can be implanted at high energy.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)〜(e)は本発明の実施例1を説明するた
めの図で、MO5型半導体素子の製造に適用した場合の
主要工程における素子断面図、第2図(a)〜(e)は
本発明の実施例2を説明するための図で、MO5型半導
体素子の製造に適用した場合の主要工程における素子断
面図、第3図(a)〜(e)は従来の製造方法である逆
LOCOS法の主要工程におけるMO3型半導体素子の
断面図である。 1・・・P型半導体基板 3・・・多結晶半導体膜 5・・・N型チャネル領域 7・・・チャネルストッパ 9・・・電極 22.26・・・酸化膜 2・・・第1の酸化膜 4・・・窒化膜 6・・・第2の酸化膜 8・・・ゲート酸化膜 11・・・マスク酸化膜
1(a)-(e) are diagrams for explaining Embodiment 1 of the present invention, and are sectional views of the device in main steps when applied to manufacturing an MO5 type semiconductor device, and FIG. 2(a)-(e). (e) is a diagram for explaining Embodiment 2 of the present invention, and is a cross-sectional view of the device in main steps when applied to manufacturing an MO5 type semiconductor device. 1 is a cross-sectional view of an MO3 type semiconductor device in the main steps of the reverse LOCOS method. 1... P-type semiconductor substrate 3... Polycrystalline semiconductor film 5... N-type channel region 7... Channel stopper 9... Electrode 22, 26... Oxide film 2... First Oxide film 4...Nitride film 6...Second oxide film 8...Gate oxide film 11...Mask oxide film

Claims (2)

【特許請求の範囲】[Claims] (1)第1の酸化膜形成工程と、多結晶半導体膜・窒化
膜形成工程と、第2の酸化膜形成工程と、不純物注入工
程と、電極形成工程とを含み、一導電型の半導体基板に
チャネルストッパによって区画形成された活性領域を有
する半導体素子の製造方法であって、 前記第1の酸化膜形成工程は、前記半導体基板の表面を
熱酸化することにより、該基板の表面上に第1の酸化膜
を形成する工程であり、 前記多結晶半導体膜・窒化膜形成工程は、前記第1の酸
化膜上に多結晶半導体膜および窒化膜を積層形成する工
程であり、 前記第2の酸化膜形成工程は、前記窒化膜が除去された
活性領域内の前記多結晶半導体膜を熱酸化させて基板の
活性領域上に第2の酸化膜を形成する工程であり、 前記不純物注入工程は、前記多結晶半導体膜および窒化
膜が除去された基板のチャネルストッパ形成領域に前記
第2の酸化膜をマスクとして不純物を注入して該チャネ
ル形成領域にチャネルストッパを形成する工程であり、 前記電極形成工程は、前記第1及び第2の酸化膜が除去
された基板の表面に再び熱酸化を行い活性領域のゲート
酸化膜を形成し、かつ電極を形成する工程であることを
特徴とする半導体素子の製造方法。
(1) A semiconductor substrate of one conductivity type, including a first oxide film formation step, a polycrystalline semiconductor film/nitride film formation step, a second oxide film formation step, an impurity implantation step, and an electrode formation step. A method for manufacturing a semiconductor device having an active region defined by a channel stopper in the first oxide film forming step, the step of forming a first oxide film on the surface of the semiconductor substrate by thermally oxidizing the surface of the semiconductor substrate. The polycrystalline semiconductor film/nitride film forming step is a step of forming a polycrystalline semiconductor film and a nitride film in layers on the first oxide film, and the second The oxide film forming step is a step of thermally oxidizing the polycrystalline semiconductor film in the active region from which the nitride film has been removed to form a second oxide film on the active region of the substrate, and the impurity implanting step is a step of forming a second oxide film on the active region of the substrate. , a step of implanting an impurity into a channel stopper formation region of the substrate from which the polycrystalline semiconductor film and the nitride film have been removed, using the second oxide film as a mask to form a channel stopper in the channel formation region; A semiconductor characterized in that the forming step is a step of again performing thermal oxidation on the surface of the substrate from which the first and second oxide films have been removed to form a gate oxide film in the active region and forming an electrode. Method of manufacturing elements.
(2)第1の酸化膜形成工程と、多結晶半導体膜・窒化
膜・マスク酸化膜形成工程と、第1の不純物注入工程と
、第2の酸化膜形成工程と、第2の不純物注入工程と、
電極形成工程とを含み、一導電型の半導体基板にチャネ
ルストッパによって区画形成された活性領域を有する半
導体素子の製造方法であって、 前記第1の酸化膜形成工程は、前記半導体基板の表面を
熱酸化することにより、該基板の表面上に第1の酸化膜
を形成する工程であり、 前記多結晶半導体膜・窒化膜・マスク酸化膜形成工程は
、前記第1の酸化膜上に、多結晶半導体膜、窒化膜およ
びマスク酸化膜を形成する工程であり、 前記第1の不純物注入工程は、前記窒化膜およびマスク
酸化膜をマスクとして、窒化膜およびマスク酸化膜が除
去された活性領域の基板に不純物を注入してチャネル領
域を形成する工程であり、前記第2の酸化膜形成工程は
、チャネルストッパ形成領域のマスク酸化膜を除去した
後、活性領域上の前記多結晶半導体膜を熱酸化させて第
2の酸化膜を形成する工程であり、 前記第2の不純物注入工程は、前記多結晶半導体膜およ
び窒化膜が除去された基板のチャネルストッパ形成領域
に前記第2の酸化膜をマスクとして不純物を注入して該
チャネル形成領域にチャネルストッパを形成する工程で
あり、 前記電極形成工程は、前記第1及び第2の酸化膜が除去
された基板の表面に再び熱酸化を行い活性領域のゲート
酸化膜を形成し、かつ電極を形成する工程であることを
特徴とする半導体素子の製造方法。
(2) First oxide film formation step, polycrystalline semiconductor film/nitride film/mask oxide film formation step, first impurity implantation step, second oxide film formation step, and second impurity implantation step and,
A method for manufacturing a semiconductor element having an active region defined by a channel stopper in a semiconductor substrate of one conductivity type, the method comprising: forming an electrode, the first oxide film forming step forming a surface of the semiconductor substrate; This is a step of forming a first oxide film on the surface of the substrate by thermal oxidation, and the step of forming a polycrystalline semiconductor film/nitride film/mask oxide film is a step of forming a first oxide film on the first oxide film. The first impurity implantation step is a step of forming a crystalline semiconductor film, a nitride film, and a mask oxide film, and the first impurity implantation step is performed by using the nitride film and the mask oxide film as a mask to implant the active region from which the nitride film and the mask oxide film have been removed. This is a step of forming a channel region by implanting impurities into the substrate, and in the second oxide film forming step, after removing the mask oxide film in the channel stopper formation region, the polycrystalline semiconductor film on the active region is heated. The step is to oxidize to form a second oxide film, and the second impurity implantation step is to apply the second oxide film to a channel stopper formation region of the substrate from which the polycrystalline semiconductor film and the nitride film have been removed. This step is a step of implanting impurities as a mask to form a channel stopper in the channel forming region, and the electrode forming step is to thermally oxidize the surface of the substrate from which the first and second oxide films have been removed again to activate it. 1. A method of manufacturing a semiconductor device, comprising a step of forming a gate oxide film in a region and forming an electrode.
JP2109755A 1990-04-25 1990-04-25 Method for manufacturing semiconductor device Expired - Fee Related JP2623907B2 (en)

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Publications (2)

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JPH047875A true JPH047875A (en) 1992-01-13
JP2623907B2 JP2623907B2 (en) 1997-06-25

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Country Status (1)

Country Link
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04367235A (en) * 1991-06-14 1992-12-18 Sharp Corp Charge transfer device and its manufacture

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5772344A (en) * 1980-10-24 1982-05-06 Toshiba Corp Manufacture of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5772344A (en) * 1980-10-24 1982-05-06 Toshiba Corp Manufacture of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04367235A (en) * 1991-06-14 1992-12-18 Sharp Corp Charge transfer device and its manufacture

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