JPH0480944A - Manufacture of dielectric-isolation substrate - Google Patents

Abstract

PURPOSE:To prevent an overetching at the time of formation of V-shaped grooves from being generated and to improve the integration degree of islands by a method wherein the film thickness of a second oxide film formed on a first recessed part is made thicker than that of a first oxide film formed on the part other than the first recessed part of the surface of a substrate. CONSTITUTION:A substrate 101 is etched using a patterned oxide film 102 and a nitride film 103 as masks to form a recessed part 104 and thereafter, an oxide film 105 thicker than the film 102 is formed on the recessed part 104 using the film 103 as a mask, the films 102 and 103 are patterned, recessed parts 107 are formed in the part other than the recessed part 104 of the substrate surface using these patterned films 102 and 103 as masks and after that, shallow V-shaped grooves 108 are formed in the recessed part 104 using the film 105 as a mask and at the same time deep V-shaped grooves 109 are formed in the recessed parts 107 using the films 102 and 103 as masks. As the recessed part 104 is covered with the film 105 at the time of formation of the recessed parts 107 prior to the formation of the deep V-shaped grooves 109, it is never etched and an overetching at the time of formation of the grooves 108 and 109 is not generated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method of manufacturing a dielectrically isolated substrate having single crystal silicon islands of different depths within the same semiconductor substrate.

[Conventional technology]

In recent years, in semiconductor integrated devices having a dielectric isolation structure, when high breakdown voltage elements and low breakdown voltage elements are mounted together on the same dielectric isolation substrate, the island on which the high breakdown voltage elements are formed has a tendency to change depending on the width of the depletion layer during reverse bias. Attempts were made to optimize the depth of the island according to the characteristics of the built-in elements, such as making the island shallower to reduce the collector resistance of the transistor (vertical NPN), and making the island shallower to reduce the collector resistance of the transistor. is being done.

Conventionally, methods for manufacturing this type of dielectric isolation substrate have been disclosed in Japanese Patent Laid-Open No. 55-105340 and Japanese Patent Laid-Open No. 575935.
There were some that were described in Publication No. 0, etc.

Hereinafter, the manufacturing method will be explained using the process cross-sectional diagram of FIG. 2.

First, as shown in FIG. 2 1fl, the surface of a single crystal silicon substrate 21 having a plane orientation of (g)00) is oxidized, and one main surface is oxidized with WI by ordinary photolithography.
22 patterns are formed.

Next, as shown in FIG. 2(b), anisotropic etching is performed on the single crystal silicon substrate 21 using the oxide film 22 as a mask to form a recess 23.

Thereafter, as shown in FIG. 2 (C1), after removing the oxide film 22, the single crystal silicon substrate 21 is oxidized again, and a predetermined pattern is formed on one main surface of the single crystal silicon substrate 21 by ordinary photolithography. An oxide film 24 is formed.

Subsequently, as shown in FIG. 2(d), anisotropic etching is performed using the oxide film 24 as a mask to form a plurality of grooves 25 adjacent to the recess 23 and other parts.

Then, as shown in FIG. 2 1fl, after removing the oxide film 24, an isolation insulating film 26 for insulation isolation is formed on one main surface of the single-crystal silicon substrate 21 including the trench 25. Insulation! A support layer 27 made of polycrystalline silicon is deposited on 26 and planarized.

Thereafter, as shown in FIG. 2 1fl, the main surface on the opposite side of the single crystal silicon substrate 21 is removed by polishing until the tips of the grooves 25 are exposed, thereby forming islands with different depths, that is, deep islands 28. A dielectric isolation substrate is obtained in which the shallow islands 29 are separated from each other via the isolation insulating film 26 and the support layer 27.

By the way, in the anisotropic etching using the oxide film 24 as a mask for forming the grooves 25, if the shape of the oxide film 24 is a simple rectangular pattern, as shown in FIG. Corner part 28 of trapezoidal island 28.29
a, 29a collapses and becomes deformed. Therefore, in order to prevent the shape of the islands 2829 from collapsing, as shown in FIG.
A square compensation pattern 24a is formed and arranged to compensate for the deformation of the shape. Optimal dimensions of this compensation pattern 24a! , is proportional to the etching depth d if the conditions such as anisotropic etching solution are constant, and l,==/Tar
...The relationship ■ holds true (JSPE-51-09,
Precision Machinery 51/9/1985).

However, f is a coefficient representing the degree of shape collapse, and is, for example, 0.3 in the case of WOH II to 1PA (isopropyl alcohol) based solution.

[Problem to be solved by the invention]

However, in the conventional manufacturing method described above, during anisotropic etching, the portion that will become the shallow island 29 is exposed to etching even after the groove 25 is formed until the V-groove 25 of the deep island 28 is formed. Therefore, in order to form the V-groove 25 of the shallow island 29, a large-sized compensation pattern 24a of the oxide film 24 is required, resulting in a problem that the degree of integration of the islands 28 and 29 formed on the dielectric isolation substrate is reduced. there were.

For example, anisotropic etching solution is converted into KOH-HzO-IP
The A system is used, the depth of the shallow V groove 25 is 20 μ, and the deep ■ groove 25
When the depth of is 60 μm, the size of the compensation pattern 24a of the island 29 shallower than the 0 type had to be increased from 8Ia to 25 μm compared to the case where only the shallow island 29 is formed. This increase in the compensation pattern 24a reduces the degree of integration of the islands 28, 29 formed on the dielectric isolation substrate. That is, if the interval i of the compensation pattern 24a is set to a minimum of 4
If the compensation pattern dimension 11 is 8B, the minimum dimension l of the bottom surface of the island 28.29 will be 12μ, but if the compensation pattern dimension 1 is 25μ, the minimum dimension 12 will be 29B. Therefore, it became impossible to reduce the size of the bottom portions of the islands 28 and 29.

This invention was made to solve the above-mentioned problems, and provides a method for manufacturing a dielectric isolation substrate that can prevent overetching during trench formation and improve the degree of island integration. The purpose is to obtain.

[Means to solve the problem]

A method for manufacturing a dielectric isolation substrate according to the present invention includes a first method using a patterned first oxide film and a mask material as a mask.
a step of forming a concave portion, and a step of forming a first recess using a mask material as a mask.
forming a second oxide film that is thicker than the first oxide film on the recessed portion of the mask, removing a predetermined region of the first oxide film and the mask material, and removing a predetermined region of the second oxide film. a step of removing the first oxide film halfway; a step of forming a second recess in a portion other than the first recess using the first oxide film and a mask material as a mask; and a step of removing the second oxide film and the first recess from a predetermined region. A step of forming a shallow square groove and a deep V groove in the first and second recesses, respectively, using the oxide film and mask material as a mask, is provided.

[For production]

In this invention, a second oxide film is formed on the first recess, which is thicker than the first oxide film formed on other parts, and when etching the first oxide film and the mask material. The second oxide film remains and the first recess is not etched during the formation of the second recess. Furthermore, since the deep groove is formed by expanding the second recess, overetching does not occur in the shallow groove.

(Example) Hereinafter, an example of the present invention will be described with reference to the drawings.
The figure is a process sectional view showing a method of manufacturing a dielectric isolation substrate according to this embodiment.

First, as shown in Figure 1 ta+, the surface orientation (g) 00)
After oxidizing one main surface of an N-type single crystal silicon substrate 101 to form an oxide film 102 with a thickness of 3000 nm,
A silicon nitride film 103 is grown to a thickness of 1000 nm on the oxidized WA 102 using chemical vapor deposition or the like. next,
After forming patterns of an oxide film 102 and a silicon nitride film 103 using ordinary photolithography technology, using these as a mask, alkali anisotropic etching is performed on the single crystal silicon substrate 101, and the portions that will become shallow islands are etched with a
A recess 104 with a depth of - is formed.

Next, as shown in FIG.
The single crystal silicon substrate 101 is oxidized using No. 3 as an oxidation-resistant mask, and an oxide film 105 with a thickness of about 1 nm is formed in the recess 104.Next, nitriding is performed on the entire main surface of one side by chemical vapor deposition or the like. Membrane 106 is formed to a thickness of approximately 1000 nm.

Next, as shown in FIG. 1 (C1), nitride films 103 and 106 and oxide films 10
Pattern 2. When etching the oxide 1102 remaining on the main surface other than the recess 104, the oxide 1
1j105 is also etched to the same thickness as oxidized 1102, but the film thickness difference between oxidized 111102°105 is about 700.
Therefore, even after the patterning of the oxide film 102 is completed, the oxide 11105 is sufficiently thick (the remaining 0-order is coated with an alkali anisotropic material on the substrate 101 using the patterned nitride films 103 and 106 and the oxide film 102 as a mask). A recess 107 having a depth of 4On is formed in the portion that will become a deep island by etching.At this time, the recess 104 is covered with the nitride film 106 and the oxide film 105 and is not etched.

Next, as shown in FIG. 1+dl, after removing the oxide film 105 by etching using the nitride film 106 as a mask, alkali anisotropic etching is performed again to form a shallow groove 108t- in the recess 104 with a depth of 204+11. At the same time, a deep V-groove 109 with a depth of 60n is formed in the recess 107.

Next, as shown in FIG. 1(e), the oxide film 102°10
5 and nitriding! After removing 1103 and 106, the substrate 10
1 to 1 on the entire main surface of one side including the grooves 108 and 109 of 1.
The next step is to deposit an isolation insulating film 110 with a thickness of 2μ.
A support layer 11 made of polycrystalline silicon or the like is formed on the isolation insulating film 110.
1 is deposited to planarize one main surface of the substrate 101.

Thereafter, as shown in FIG. 1 (fl), the other main surface of the substrate 101 is removed by polishing or the like until the tips of the V-grooves 108 and 109 are exposed, and the deep islands 112 and shallow islands 113 are separated from the insulation WX 110 and Dielectric isolation substrates separated from each other by the support layer 111 are formed.

In the above embodiment, the patterning oxide film 102
Then, using the nitride film 103 as a mask, the substrate 101 is etched to form a recess 104. Then, using the nitride film 103 as a mask, an oxide film 105 thicker than the oxide film 102 is formed on the recess 104, and the oxide film 102 and the nitride film 103 are patterned. Using these as a mask, recess 1 is formed in the area other than recess 104.
Then, using the oxide film 105 as a mask, a shallow V-groove 108 is formed in the recess 104, and an oxide M1 is formed.
A deep groove 109 is formed in the recess 107 using the 02 and nitride film 103 as a mask. Prior to forming the deep groove 109, when forming the recess 107, the recess 104 is covered with the oxide film 105, so etching is performed. Therefore, no overetching occurs when forming Vl 1108, 109. Therefore, the compensation pattern formed in the oxide film 105 may be small, and the degree of integration of the islands can be improved. That is, the compensation pattern size 1 of the oxide film 105
1 is smaller than the conventional etching depth of 60m, which is 25F, to the depth of 2OR, which is 8μ, and the minimum dimension of the bottom surface of the shallow island 113 is 11.
is reduced from 29j11m to 12#I when the compensation pattern interval i is 4μ, and the area of the bottom surface of the shallow island 113 is approximately 1
/6.

Although the nitride film 106 is provided in the above embodiment, this film is not necessarily required. However, nitriding lI! 1
If 06 is not provided, care must be taken that when etching the slope of the oxide film 105 to be removed, the region to be left as a mask is not simultaneously etched and thinned.

〔Effect of the invention〕

As described above, according to the present invention, the thickness of the second oxide film formed on the first recessed portion is made thicker than the thickness of the first oxide film formed on the other portions. The second oxide film remains when the first oxide film is patterned, and the first recess is not etched when the second recess is formed. Also, since the deep V groove is formed by expanding the second recess, the shallow
No groove overetching occurs. Therefore, the compensation pattern of the second oxide film may be small, the bottom area of the shallow island can be reduced, and the degree of integration of the island can be improved.

[Brief explanation of the drawing]

Figure 1 tal - Figure 1 (fl is a cross-sectional view of the process of this invention method, Figure 2 (at - Figure 2 (fl is a cross-sectional view of the process of the conventional method, Figure 3 is a perspective view of the conventional island region, Fig. 4 is an explanatory diagram of the compensation pattern. 101... Single crystal silicon substrate, 102, 105...
・Oxide film, 103... Nitride film, 104, 107...
Recessed portion, 108... Shallow ■ structure, 109... Deep V groove,
110... Isolation insulating film, 111... Support layer, 11
2...deep island, 113...shallow island. Figure 4 Perspective view of the decoy school 4 Maki Figure 3 Figure 3

Claims (1)

[Scope of Claims] (a) A step of forming a first oxide film and an oxidation-resistant mask material on one main surface of a semiconductor substrate and then patterning the same to form a first recessed portion using these as a mask; (b) forming a second oxide film thicker than the first oxide film on the surface of the first recess of the semiconductor substrate using the mask material as a mask; (d) using the first and second oxide films and the mask material as a mask, removing the first and second oxide films and a predetermined region of the second oxide film halfway on one main surface of the semiconductor substrate; forming a second recess in a portion other than the recess; (e) removing a predetermined region that has been partially removed from the second oxide film; and (f) removing the first and second oxide films. (g) removing the first and second oxide films and the mask material; (h) depositing an isolation insulating film on the entire main surface of one of the semiconductor substrates, depositing a support layer on the isolation insulating film and planarizing it; A method for manufacturing a dielectric isolation substrate, comprising the step of removing until the tip of each V-groove is exposed.